1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #ifndef V8_X64_ASSEMBLER_X64_INL_H_
6 #define V8_X64_ASSEMBLER_X64_INL_H_
8 #include "src/x64/assembler-x64.h"
10 #include "src/base/cpu.h"
11 #include "src/debug/debug.h"
12 #include "src/v8memory.h"
17 bool CpuFeatures::SupportsCrankshaft() { return true; }
20 // -----------------------------------------------------------------------------
21 // Implementation of Assembler
24 static const byte kCallOpcode = 0xE8;
25 // The length of pushq(rbp), movp(rbp, rsp), Push(rsi) and Push(rdi).
26 static const int kNoCodeAgeSequenceLength = kPointerSize == kInt64Size ? 6 : 17;
29 void Assembler::emitl(uint32_t x) {
30 Memory::uint32_at(pc_) = x;
31 pc_ += sizeof(uint32_t);
35 void Assembler::emitp(void* x, RelocInfo::Mode rmode) {
36 uintptr_t value = reinterpret_cast<uintptr_t>(x);
37 Memory::uintptr_at(pc_) = value;
38 if (!RelocInfo::IsNone(rmode)) {
39 RecordRelocInfo(rmode, value);
41 pc_ += sizeof(uintptr_t);
45 void Assembler::emitq(uint64_t x) {
46 Memory::uint64_at(pc_) = x;
47 pc_ += sizeof(uint64_t);
51 void Assembler::emitw(uint16_t x) {
52 Memory::uint16_at(pc_) = x;
53 pc_ += sizeof(uint16_t);
57 void Assembler::emit_code_target(Handle<Code> target,
58 RelocInfo::Mode rmode,
59 TypeFeedbackId ast_id) {
60 DCHECK(RelocInfo::IsCodeTarget(rmode) ||
61 rmode == RelocInfo::CODE_AGE_SEQUENCE);
62 if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {
63 RecordRelocInfo(RelocInfo::CODE_TARGET_WITH_ID, ast_id.ToInt());
65 RecordRelocInfo(rmode);
67 int current = code_targets_.length();
68 if (current > 0 && code_targets_.last().is_identical_to(target)) {
69 // Optimization if we keep jumping to the same code target.
72 code_targets_.Add(target);
78 void Assembler::emit_runtime_entry(Address entry, RelocInfo::Mode rmode) {
79 DCHECK(RelocInfo::IsRuntimeEntry(rmode));
80 RecordRelocInfo(rmode);
81 emitl(static_cast<uint32_t>(entry - isolate()->code_range()->start()));
85 void Assembler::emit_rex_64(Register reg, Register rm_reg) {
86 emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit());
90 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) {
91 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
95 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) {
96 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
100 void Assembler::emit_rex_64(Register reg, const Operand& op) {
101 emit(0x48 | reg.high_bit() << 2 | op.rex_);
105 void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) {
106 emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_);
110 void Assembler::emit_rex_64(Register rm_reg) {
111 DCHECK_EQ(rm_reg.code() & 0xf, rm_reg.code());
112 emit(0x48 | rm_reg.high_bit());
116 void Assembler::emit_rex_64(const Operand& op) {
117 emit(0x48 | op.rex_);
121 void Assembler::emit_rex_32(Register reg, Register rm_reg) {
122 emit(0x40 | reg.high_bit() << 2 | rm_reg.high_bit());
126 void Assembler::emit_rex_32(Register reg, const Operand& op) {
127 emit(0x40 | reg.high_bit() << 2 | op.rex_);
131 void Assembler::emit_rex_32(Register rm_reg) {
132 emit(0x40 | rm_reg.high_bit());
136 void Assembler::emit_rex_32(const Operand& op) {
137 emit(0x40 | op.rex_);
141 void Assembler::emit_optional_rex_32(Register reg, Register rm_reg) {
142 byte rex_bits = reg.high_bit() << 2 | rm_reg.high_bit();
143 if (rex_bits != 0) emit(0x40 | rex_bits);
147 void Assembler::emit_optional_rex_32(Register reg, const Operand& op) {
148 byte rex_bits = reg.high_bit() << 2 | op.rex_;
149 if (rex_bits != 0) emit(0x40 | rex_bits);
153 void Assembler::emit_optional_rex_32(XMMRegister reg, const Operand& op) {
154 byte rex_bits = (reg.code() & 0x8) >> 1 | op.rex_;
155 if (rex_bits != 0) emit(0x40 | rex_bits);
159 void Assembler::emit_optional_rex_32(XMMRegister reg, XMMRegister base) {
160 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
161 if (rex_bits != 0) emit(0x40 | rex_bits);
165 void Assembler::emit_optional_rex_32(XMMRegister reg, Register base) {
166 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
167 if (rex_bits != 0) emit(0x40 | rex_bits);
171 void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) {
172 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
173 if (rex_bits != 0) emit(0x40 | rex_bits);
177 void Assembler::emit_optional_rex_32(Register rm_reg) {
178 if (rm_reg.high_bit()) emit(0x41);
182 void Assembler::emit_optional_rex_32(XMMRegister rm_reg) {
183 if (rm_reg.high_bit()) emit(0x41);
187 void Assembler::emit_optional_rex_32(const Operand& op) {
188 if (op.rex_ != 0) emit(0x40 | op.rex_);
192 // byte 1 of 3-byte VEX
193 void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm,
195 byte rxb = ~((reg.high_bit() << 2) | rm.high_bit()) << 5;
200 // byte 1 of 3-byte VEX
201 void Assembler::emit_vex3_byte1(XMMRegister reg, const Operand& rm,
203 byte rxb = ~((reg.high_bit() << 2) | rm.rex_) << 5;
208 // byte 1 of 2-byte VEX
209 void Assembler::emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l,
211 byte rv = ~((reg.high_bit() << 4) | v.code()) << 3;
216 // byte 2 of 3-byte VEX
217 void Assembler::emit_vex3_byte2(VexW w, XMMRegister v, VectorLength l,
219 emit(w | ((~v.code() & 0xf) << 3) | l | pp);
223 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
224 XMMRegister rm, VectorLength l, SIMDPrefix pp,
225 LeadingOpcode mm, VexW w) {
226 if (rm.high_bit() || mm != k0F || w != kW0) {
228 emit_vex3_byte1(reg, rm, mm);
229 emit_vex3_byte2(w, vreg, l, pp);
232 emit_vex2_byte1(reg, vreg, l, pp);
237 void Assembler::emit_vex_prefix(Register reg, Register vreg, Register rm,
238 VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
240 XMMRegister ireg = {reg.code()};
241 XMMRegister ivreg = {vreg.code()};
242 XMMRegister irm = {rm.code()};
243 emit_vex_prefix(ireg, ivreg, irm, l, pp, mm, w);
247 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
248 const Operand& rm, VectorLength l,
249 SIMDPrefix pp, LeadingOpcode mm, VexW w) {
250 if (rm.rex_ || mm != k0F || w != kW0) {
252 emit_vex3_byte1(reg, rm, mm);
253 emit_vex3_byte2(w, vreg, l, pp);
256 emit_vex2_byte1(reg, vreg, l, pp);
261 void Assembler::emit_vex_prefix(Register reg, Register vreg, const Operand& rm,
262 VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
264 XMMRegister ireg = {reg.code()};
265 XMMRegister ivreg = {vreg.code()};
266 emit_vex_prefix(ireg, ivreg, rm, l, pp, mm, w);
270 Address Assembler::target_address_at(Address pc, Address constant_pool) {
271 return Memory::int32_at(pc) + pc + 4;
275 void Assembler::set_target_address_at(Address pc, Address constant_pool,
277 ICacheFlushMode icache_flush_mode) {
278 Memory::int32_at(pc) = static_cast<int32_t>(target - pc - 4);
279 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
280 Assembler::FlushICacheWithoutIsolate(pc, sizeof(int32_t));
285 void Assembler::deserialization_set_target_internal_reference_at(
286 Address pc, Address target, RelocInfo::Mode mode) {
287 Memory::Address_at(pc) = target;
291 Address Assembler::target_address_from_return_address(Address pc) {
292 return pc - kCallTargetAddressOffset;
296 Handle<Object> Assembler::code_target_object_handle_at(Address pc) {
297 return code_targets_[Memory::int32_at(pc)];
301 Address Assembler::runtime_entry_at(Address pc) {
302 return Memory::int32_at(pc) + isolate()->code_range()->start();
305 // -----------------------------------------------------------------------------
306 // Implementation of RelocInfo
308 // The modes possibly affected by apply must be in kApplyMask.
309 void RelocInfo::apply(intptr_t delta) {
310 if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) {
311 Memory::int32_at(pc_) -= static_cast<int32_t>(delta);
312 } else if (IsCodeAgeSequence(rmode_)) {
313 if (*pc_ == kCallOpcode) {
314 int32_t* p = reinterpret_cast<int32_t*>(pc_ + 1);
315 *p -= static_cast<int32_t>(delta); // Relocate entry.
317 } else if (IsInternalReference(rmode_)) {
318 // absolute code pointer inside code object moves with the code object.
319 Memory::Address_at(pc_) += delta;
324 Address RelocInfo::target_address() {
325 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
326 return Assembler::target_address_at(pc_, host_);
330 Address RelocInfo::target_address_address() {
331 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)
332 || rmode_ == EMBEDDED_OBJECT
333 || rmode_ == EXTERNAL_REFERENCE);
334 return reinterpret_cast<Address>(pc_);
338 Address RelocInfo::constant_pool_entry_address() {
344 int RelocInfo::target_address_size() {
345 if (IsCodedSpecially()) {
346 return Assembler::kSpecialTargetSize;
353 void RelocInfo::set_target_address(Address target,
354 WriteBarrierMode write_barrier_mode,
355 ICacheFlushMode icache_flush_mode) {
356 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
357 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
358 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
359 IsCodeTarget(rmode_)) {
360 Object* target_code = Code::GetCodeFromTargetAddress(target);
361 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
362 host(), this, HeapObject::cast(target_code));
367 Object* RelocInfo::target_object() {
368 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
369 return Memory::Object_at(pc_);
373 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
374 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
375 if (rmode_ == EMBEDDED_OBJECT) {
376 return Memory::Object_Handle_at(pc_);
378 return origin->code_target_object_handle_at(pc_);
383 Address RelocInfo::target_external_reference() {
384 DCHECK(rmode_ == RelocInfo::EXTERNAL_REFERENCE);
385 return Memory::Address_at(pc_);
389 Address RelocInfo::target_internal_reference() {
390 DCHECK(rmode_ == INTERNAL_REFERENCE);
391 return Memory::Address_at(pc_);
395 Address RelocInfo::target_internal_reference_address() {
396 DCHECK(rmode_ == INTERNAL_REFERENCE);
397 return reinterpret_cast<Address>(pc_);
401 void RelocInfo::set_target_object(Object* target,
402 WriteBarrierMode write_barrier_mode,
403 ICacheFlushMode icache_flush_mode) {
404 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
405 Memory::Object_at(pc_) = target;
406 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
407 Assembler::FlushICacheWithoutIsolate(pc_, sizeof(Address));
409 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
411 target->IsHeapObject()) {
412 host()->GetHeap()->incremental_marking()->RecordWrite(
413 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
418 Address RelocInfo::target_runtime_entry(Assembler* origin) {
419 DCHECK(IsRuntimeEntry(rmode_));
420 return origin->runtime_entry_at(pc_);
424 void RelocInfo::set_target_runtime_entry(Address target,
425 WriteBarrierMode write_barrier_mode,
426 ICacheFlushMode icache_flush_mode) {
427 DCHECK(IsRuntimeEntry(rmode_));
428 if (target_address() != target) {
429 set_target_address(target, write_barrier_mode, icache_flush_mode);
434 Handle<Cell> RelocInfo::target_cell_handle() {
435 DCHECK(rmode_ == RelocInfo::CELL);
436 Address address = Memory::Address_at(pc_);
437 return Handle<Cell>(reinterpret_cast<Cell**>(address));
441 Cell* RelocInfo::target_cell() {
442 DCHECK(rmode_ == RelocInfo::CELL);
443 return Cell::FromValueAddress(Memory::Address_at(pc_));
447 void RelocInfo::set_target_cell(Cell* cell,
448 WriteBarrierMode write_barrier_mode,
449 ICacheFlushMode icache_flush_mode) {
450 DCHECK(rmode_ == RelocInfo::CELL);
451 Address address = cell->address() + Cell::kValueOffset;
452 Memory::Address_at(pc_) = address;
453 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
454 Assembler::FlushICacheWithoutIsolate(pc_, sizeof(Address));
456 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
458 // TODO(1550) We are passing NULL as a slot because cell can never be on
459 // evacuation candidate.
460 host()->GetHeap()->incremental_marking()->RecordWrite(
466 void RelocInfo::WipeOut() {
467 if (IsEmbeddedObject(rmode_) || IsExternalReference(rmode_) ||
468 IsInternalReference(rmode_)) {
469 Memory::Address_at(pc_) = NULL;
470 } else if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) {
471 // Effectively write zero into the relocation.
472 Assembler::set_target_address_at(pc_, host_, pc_ + sizeof(int32_t));
479 bool RelocInfo::IsPatchedReturnSequence() {
480 // The recognized call sequence is:
481 // movq(kScratchRegister, address); call(kScratchRegister);
482 // It only needs to be distinguished from a return sequence
483 // movq(rsp, rbp); pop(rbp); ret(n); int3 *6
484 // The 11th byte is int3 (0xCC) in the return sequence and
485 // REX.WB (0x48+register bit) for the call sequence.
486 return pc_[Assembler::kMoveAddressIntoScratchRegisterInstructionLength] !=
491 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
492 return !Assembler::IsNop(pc());
496 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
497 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
498 DCHECK(*pc_ == kCallOpcode);
499 return origin->code_target_object_handle_at(pc_ + 1);
503 Code* RelocInfo::code_age_stub() {
504 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
505 DCHECK(*pc_ == kCallOpcode);
506 return Code::GetCodeFromTargetAddress(
507 Assembler::target_address_at(pc_ + 1, host_));
511 void RelocInfo::set_code_age_stub(Code* stub,
512 ICacheFlushMode icache_flush_mode) {
513 DCHECK(*pc_ == kCallOpcode);
514 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
515 Assembler::set_target_address_at(pc_ + 1, host_, stub->instruction_start(),
520 Address RelocInfo::debug_call_address() {
521 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
522 return Memory::Address_at(pc_ + Assembler::kPatchDebugBreakSlotAddressOffset);
526 void RelocInfo::set_debug_call_address(Address target) {
527 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
528 Memory::Address_at(pc_ + Assembler::kPatchDebugBreakSlotAddressOffset) =
530 Assembler::FlushICacheWithoutIsolate(
531 pc_ + Assembler::kPatchDebugBreakSlotAddressOffset, sizeof(Address));
532 if (host() != NULL) {
533 Object* target_code = Code::GetCodeFromTargetAddress(target);
534 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
535 host(), this, HeapObject::cast(target_code));
540 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
541 RelocInfo::Mode mode = rmode();
542 if (mode == RelocInfo::EMBEDDED_OBJECT) {
543 visitor->VisitEmbeddedPointer(this);
544 Assembler::FlushICacheWithoutIsolate(pc_, sizeof(Address));
545 } else if (RelocInfo::IsCodeTarget(mode)) {
546 visitor->VisitCodeTarget(this);
547 } else if (mode == RelocInfo::CELL) {
548 visitor->VisitCell(this);
549 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
550 visitor->VisitExternalReference(this);
551 } else if (mode == RelocInfo::INTERNAL_REFERENCE) {
552 visitor->VisitInternalReference(this);
553 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
554 visitor->VisitCodeAgeSequence(this);
555 } else if (RelocInfo::IsDebugBreakSlot(mode) &&
556 IsPatchedDebugBreakSlotSequence()) {
557 visitor->VisitDebugTarget(this);
558 } else if (RelocInfo::IsRuntimeEntry(mode)) {
559 visitor->VisitRuntimeEntry(this);
564 template<typename StaticVisitor>
565 void RelocInfo::Visit(Heap* heap) {
566 RelocInfo::Mode mode = rmode();
567 if (mode == RelocInfo::EMBEDDED_OBJECT) {
568 StaticVisitor::VisitEmbeddedPointer(heap, this);
569 Assembler::FlushICache(heap->isolate(), pc_, sizeof(Address));
570 } else if (RelocInfo::IsCodeTarget(mode)) {
571 StaticVisitor::VisitCodeTarget(heap, this);
572 } else if (mode == RelocInfo::CELL) {
573 StaticVisitor::VisitCell(heap, this);
574 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
575 StaticVisitor::VisitExternalReference(this);
576 } else if (mode == RelocInfo::INTERNAL_REFERENCE) {
577 StaticVisitor::VisitInternalReference(this);
578 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
579 StaticVisitor::VisitCodeAgeSequence(heap, this);
580 } else if (RelocInfo::IsDebugBreakSlot(mode) &&
581 IsPatchedDebugBreakSlotSequence()) {
582 StaticVisitor::VisitDebugTarget(heap, this);
583 } else if (RelocInfo::IsRuntimeEntry(mode)) {
584 StaticVisitor::VisitRuntimeEntry(this);
589 // -----------------------------------------------------------------------------
590 // Implementation of Operand
592 void Operand::set_modrm(int mod, Register rm_reg) {
593 DCHECK(is_uint2(mod));
594 buf_[0] = mod << 6 | rm_reg.low_bits();
595 // Set REX.B to the high bit of rm.code().
596 rex_ |= rm_reg.high_bit();
600 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
602 DCHECK(is_uint2(scale));
603 // Use SIB with no index register only for base rsp or r12. Otherwise we
604 // would skip the SIB byte entirely.
605 DCHECK(!index.is(rsp) || base.is(rsp) || base.is(r12));
606 buf_[1] = (scale << 6) | (index.low_bits() << 3) | base.low_bits();
607 rex_ |= index.high_bit() << 1 | base.high_bit();
611 void Operand::set_disp8(int disp) {
612 DCHECK(is_int8(disp));
613 DCHECK(len_ == 1 || len_ == 2);
614 int8_t* p = reinterpret_cast<int8_t*>(&buf_[len_]);
616 len_ += sizeof(int8_t);
619 void Operand::set_disp32(int disp) {
620 DCHECK(len_ == 1 || len_ == 2);
621 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]);
623 len_ += sizeof(int32_t);
626 void Operand::set_disp64(int64_t disp) {
628 int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]);
630 len_ += sizeof(disp);
632 } // namespace internal
635 #endif // V8_X64_ASSEMBLER_X64_INL_H_