1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
6 // Declares a Simulator for MIPS instructions if we are not generating a native
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation
8 // on regular desktop machines.
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro,
10 // which will start execution in the Simulator or forwards to the real entry
11 // on a MIPS HW platform.
13 #ifndef V8_MIPS_SIMULATOR_MIPS_H_
14 #define V8_MIPS_SIMULATOR_MIPS_H_
16 #include "allocation.h"
17 #include "constants-mips.h"
19 #if !defined(USE_SIMULATOR)
20 // Running without a simulator on a native mips platform.
25 // When running without a simulator we call the entry directly.
26 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
27 entry(p0, p1, p2, p3, p4)
29 typedef int (*mips_regexp_matcher)(String*, int, const byte*, const byte*,
30 void*, int*, int, Address, int, Isolate*);
33 // Call the generated regexp code directly. The code at the entry address
34 // should act as a function matching the type arm_regexp_matcher.
35 // The fifth argument is a dummy that reserves the space used for
36 // the return address added by the ExitFrame in native calls.
37 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \
38 (FUNCTION_CAST<mips_regexp_matcher>(entry)( \
39 p0, p1, p2, p3, NULL, p4, p5, p6, p7, p8))
41 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
42 reinterpret_cast<TryCatch*>(try_catch_address)
44 // The stack limit beyond which we will throw stack overflow errors in
45 // generated code. Because generated code on mips uses the C stack, we
46 // just use the C stack limit.
47 class SimulatorStack : public v8::internal::AllStatic {
49 static inline uintptr_t JsLimitFromCLimit(Isolate* isolate,
54 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
55 return try_catch_address;
58 static inline void UnregisterCTryCatch() { }
61 } } // namespace v8::internal
63 // Calculated the stack limit beyond which we will throw stack overflow errors.
64 // This macro must be called from a C++ method. It relies on being able to take
65 // the address of "this" to get a value on the current execution stack and then
66 // calculates the stack limit based on that value.
67 // NOTE: The check for overflow is not safe as there is no guarantee that the
68 // running thread has its stack in all memory up to address 0x00000000.
69 #define GENERATED_CODE_STACK_LIMIT(limit) \
70 (reinterpret_cast<uintptr_t>(this) >= limit ? \
71 reinterpret_cast<uintptr_t>(this) - limit : 0)
73 #else // !defined(USE_SIMULATOR)
74 // Running with a simulator.
77 #include "assembler.h"
82 // -----------------------------------------------------------------------------
87 static const int LINE_VALID = 0;
88 static const int LINE_INVALID = 1;
90 static const int kPageShift = 12;
91 static const int kPageSize = 1 << kPageShift;
92 static const int kPageMask = kPageSize - 1;
93 static const int kLineShift = 2; // The cache line is only 4 bytes right now.
94 static const int kLineLength = 1 << kLineShift;
95 static const int kLineMask = kLineLength - 1;
98 memset(&validity_map_, LINE_INVALID, sizeof(validity_map_));
101 char* ValidityByte(int offset) {
102 return &validity_map_[offset >> kLineShift];
105 char* CachedData(int offset) {
106 return &data_[offset];
110 char data_[kPageSize]; // The cached data.
111 static const int kValidityMapSize = kPageSize >> kLineShift;
112 char validity_map_[kValidityMapSize]; // One byte per line.
117 friend class MipsDebugger;
119 // Registers are declared in order. See SMRL chapter 2.
126 t0, t1, t2, t3, t4, t5, t6, t7,
127 s0, s1, s2, s3, s4, s5, s6, s7,
137 pc, // pc must be the last register.
143 // Coprocessor registers.
144 // Generated code will always use doubles. So we will only use even registers.
146 f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11,
147 f12, f13, f14, f15, // f12 and f14 are arguments FPURegisters.
148 f16, f17, f18, f19, f20, f21, f22, f23, f24, f25,
149 f26, f27, f28, f29, f30, f31,
153 explicit Simulator(Isolate* isolate);
156 // The currently executing Simulator instance. Potentially there can be one
157 // for each native thread.
158 static Simulator* current(v8::internal::Isolate* isolate);
160 // Accessors for register state. Reading the pc value adheres to the MIPS
161 // architecture specification and is off by a 8 from the currently executing
163 void set_register(int reg, int32_t value);
164 void set_dw_register(int dreg, const int* dbl);
165 int32_t get_register(int reg) const;
166 double get_double_from_register_pair(int reg);
167 // Same for FPURegisters.
168 void set_fpu_register(int fpureg, int32_t value);
169 void set_fpu_register_float(int fpureg, float value);
170 void set_fpu_register_double(int fpureg, double value);
171 int32_t get_fpu_register(int fpureg) const;
172 int64_t get_fpu_register_long(int fpureg) const;
173 float get_fpu_register_float(int fpureg) const;
174 double get_fpu_register_double(int fpureg) const;
175 void set_fcsr_bit(uint32_t cc, bool value);
176 bool test_fcsr_bit(uint32_t cc);
177 bool set_fcsr_round_error(double original, double rounded);
179 // Special case of set_register and get_register to access the raw PC value.
180 void set_pc(int32_t value);
181 int32_t get_pc() const;
184 return reinterpret_cast<Address>(static_cast<intptr_t>(get_register(sp)));
187 // Accessor to the internal simulator stack area.
188 uintptr_t StackLimit() const;
190 // Executes MIPS instructions until the PC reaches end_sim_pc.
193 // Call on program start.
194 static void Initialize(Isolate* isolate);
196 // V8 generally calls into generated JS code with 5 parameters and into
197 // generated RegExp code with 7 parameters. This is a convenience function,
198 // which sets up the simulator state and grabs the result on return.
199 int32_t Call(byte* entry, int argument_count, ...);
200 // Alternative: call a 2-argument double function.
201 double CallFP(byte* entry, double d0, double d1);
203 // Push an address onto the JS stack.
204 uintptr_t PushAddress(uintptr_t address);
206 // Pop an address from the JS stack.
207 uintptr_t PopAddress();
210 void set_last_debugger_input(char* input);
211 char* last_debugger_input() { return last_debugger_input_; }
214 static void FlushICache(v8::internal::HashMap* i_cache, void* start,
217 // Returns true if pc register contains one of the 'special_values' defined
218 // below (bad_ra, end_sim_pc).
219 bool has_bad_pc() const;
222 enum special_values {
223 // Known bad pc value to ensure that the simulator does not execute
224 // without being properly setup.
226 // A pc value used to signal the simulator to stop execution. Generally
227 // the ra is set to this value on transition from native C code to
228 // simulated execution, so that the simulator can "return" to the native
231 // Unpredictable value.
232 Unpredictable = 0xbadbeaf
235 // Unsupported instructions use Format to print an error and stop execution.
236 void Format(Instruction* instr, const char* format);
238 // Read and write memory.
239 inline uint32_t ReadBU(int32_t addr);
240 inline int32_t ReadB(int32_t addr);
241 inline void WriteB(int32_t addr, uint8_t value);
242 inline void WriteB(int32_t addr, int8_t value);
244 inline uint16_t ReadHU(int32_t addr, Instruction* instr);
245 inline int16_t ReadH(int32_t addr, Instruction* instr);
246 // Note: Overloaded on the sign of the value.
247 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr);
248 inline void WriteH(int32_t addr, int16_t value, Instruction* instr);
250 inline int ReadW(int32_t addr, Instruction* instr);
251 inline void WriteW(int32_t addr, int value, Instruction* instr);
253 inline double ReadD(int32_t addr, Instruction* instr);
254 inline void WriteD(int32_t addr, double value, Instruction* instr);
256 // Operations depending on endianness.
257 // Get Double Higher / Lower word.
258 inline int32_t GetDoubleHIW(double* addr);
259 inline int32_t GetDoubleLOW(double* addr);
260 // Set Double Higher / Lower word.
261 inline int32_t SetDoubleHIW(double* addr);
262 inline int32_t SetDoubleLOW(double* addr);
264 // Executing is handled based on the instruction type.
265 void DecodeTypeRegister(Instruction* instr);
267 // Helper function for DecodeTypeRegister.
268 void ConfigureTypeRegister(Instruction* instr,
273 int32_t& return_addr_reg,
276 void DecodeTypeImmediate(Instruction* instr);
277 void DecodeTypeJump(Instruction* instr);
279 // Used for breakpoints and traps.
280 void SoftwareInterrupt(Instruction* instr);
282 // Stop helper functions.
283 bool IsWatchpoint(uint32_t code);
284 void PrintWatchpoint(uint32_t code);
285 void HandleStop(uint32_t code, Instruction* instr);
286 bool IsStopInstruction(Instruction* instr);
287 bool IsEnabledStop(uint32_t code);
288 void EnableStop(uint32_t code);
289 void DisableStop(uint32_t code);
290 void IncreaseStopCounter(uint32_t code);
291 void PrintStopInfo(uint32_t code);
294 // Executes one instruction.
295 void InstructionDecode(Instruction* instr);
296 // Execute one instruction placed in a branch delay slot.
297 void BranchDelayInstructionDecode(Instruction* instr) {
298 if (instr->InstructionBits() == nopInstr) {
299 // Short-cut generic nop instructions. They are always valid and they
300 // never change the simulator state.
304 if (instr->IsForbiddenInBranchDelay()) {
305 V8_Fatal(__FILE__, __LINE__,
306 "Eror:Unexpected %i opcode in a branch delay slot.",
307 instr->OpcodeValue());
309 InstructionDecode(instr);
313 static void CheckICache(v8::internal::HashMap* i_cache, Instruction* instr);
314 static void FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start,
316 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page);
325 int16_t exceptions[kNumExceptions];
328 void SignalExceptions();
330 // Runtime call support.
331 static void* RedirectExternalReference(void* external_function,
332 ExternalReference::Type type);
334 // Handle arguments and return value for runtime FP functions.
335 void GetFpArgs(double* x, double* y, int32_t* z);
336 void SetFpResult(const double& result);
338 void CallInternal(byte* entry);
340 // Architecture state.
342 int32_t registers_[kNumSimuRegisters];
343 // Coprocessor Registers.
344 int32_t FPUregisters_[kNumFPURegisters];
345 // FPU control register.
348 // Simulator support.
349 // Allocate 1MB for stack.
350 static const size_t stack_size_ = 1 * 1024*1024;
357 char* last_debugger_input_;
359 // Icache simulation.
360 v8::internal::HashMap* i_cache_;
362 v8::internal::Isolate* isolate_;
364 // Registered breakpoints.
365 Instruction* break_pc_;
368 // Stop is disabled if bit 31 is set.
369 static const uint32_t kStopDisabledBit = 1 << 31;
371 // A stop is enabled, meaning the simulator will stop when meeting the
372 // instruction, if bit 31 of watched_stops_[code].count is unset.
373 // The value watched_stops_[code].count & ~(1 << 31) indicates how many times
374 // the breakpoint was hit or gone through.
375 struct StopCountAndDesc {
379 StopCountAndDesc watched_stops_[kMaxStopCode + 1];
383 // When running with the simulator transition into simulated execution at this
385 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
386 reinterpret_cast<Object*>(Simulator::current(Isolate::Current())->Call( \
387 FUNCTION_ADDR(entry), 5, p0, p1, p2, p3, p4))
389 #define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6, p7, p8) \
390 Simulator::current(Isolate::Current())->Call( \
391 entry, 10, p0, p1, p2, p3, NULL, p4, p5, p6, p7, p8)
393 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
394 try_catch_address == NULL ? \
395 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address))
398 // The simulator has its own stack. Thus it has a different stack limit from
399 // the C-based native code. Setting the c_limit to indicate a very small
400 // stack cause stack overflow errors, since the simulator ignores the input.
401 // This is unlikely to be an issue in practice, though it might cause testing
402 // trouble down the line.
403 class SimulatorStack : public v8::internal::AllStatic {
405 static inline uintptr_t JsLimitFromCLimit(Isolate* isolate,
407 return Simulator::current(isolate)->StackLimit();
410 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
411 Simulator* sim = Simulator::current(Isolate::Current());
412 return sim->PushAddress(try_catch_address);
415 static inline void UnregisterCTryCatch() {
416 Simulator::current(Isolate::Current())->PopAddress();
420 } } // namespace v8::internal
422 #endif // !defined(USE_SIMULATOR)
423 #endif // V8_MIPS_SIMULATOR_MIPS_H_