1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
7 #if V8_TARGET_ARCH_IA32
9 #include "ia32/lithium-gap-resolver-ia32.h"
10 #include "ia32/lithium-codegen-ia32.h"
15 LGapResolver::LGapResolver(LCodeGen* owner)
17 moves_(32, owner->zone()),
20 spilled_register_(-1) {}
23 void LGapResolver::Resolve(LParallelMove* parallel_move) {
24 ASSERT(HasBeenReset());
25 // Build up a worklist of moves.
26 BuildInitialMoveList(parallel_move);
28 for (int i = 0; i < moves_.length(); ++i) {
29 LMoveOperands move = moves_[i];
30 // Skip constants to perform them last. They don't block other moves
31 // and skipping such moves with register destinations keeps those
32 // registers free for the whole algorithm.
33 if (!move.IsEliminated() && !move.source()->IsConstantOperand()) {
38 // Perform the moves with constant sources.
39 for (int i = 0; i < moves_.length(); ++i) {
40 if (!moves_[i].IsEliminated()) {
41 ASSERT(moves_[i].source()->IsConstantOperand());
47 ASSERT(HasBeenReset());
51 void LGapResolver::BuildInitialMoveList(LParallelMove* parallel_move) {
52 // Perform a linear sweep of the moves to add them to the initial list of
53 // moves to perform, ignoring any move that is redundant (the source is
54 // the same as the destination, the destination is ignored and
55 // unallocated, or the move was already eliminated).
56 const ZoneList<LMoveOperands>* moves = parallel_move->move_operands();
57 for (int i = 0; i < moves->length(); ++i) {
58 LMoveOperands move = moves->at(i);
59 if (!move.IsRedundant()) AddMove(move);
65 void LGapResolver::PerformMove(int index) {
66 // Each call to this function performs a move and deletes it from the move
67 // graph. We first recursively perform any move blocking this one. We
68 // mark a move as "pending" on entry to PerformMove in order to detect
69 // cycles in the move graph. We use operand swaps to resolve cycles,
70 // which means that a call to PerformMove could change any source operand
73 ASSERT(!moves_[index].IsPending());
74 ASSERT(!moves_[index].IsRedundant());
76 // Clear this move's destination to indicate a pending move. The actual
77 // destination is saved on the side.
78 ASSERT(moves_[index].source() != NULL); // Or else it will look eliminated.
79 LOperand* destination = moves_[index].destination();
80 moves_[index].set_destination(NULL);
82 // Perform a depth-first traversal of the move graph to resolve
83 // dependencies. Any unperformed, unpending move with a source the same
84 // as this one's destination blocks this one so recursively perform all
86 for (int i = 0; i < moves_.length(); ++i) {
87 LMoveOperands other_move = moves_[i];
88 if (other_move.Blocks(destination) && !other_move.IsPending()) {
89 // Though PerformMove can change any source operand in the move graph,
90 // this call cannot create a blocking move via a swap (this loop does
91 // not miss any). Assume there is a non-blocking move with source A
92 // and this move is blocked on source B and there is a swap of A and
93 // B. Then A and B must be involved in the same cycle (or they would
94 // not be swapped). Since this move's destination is B and there is
95 // only a single incoming edge to an operand, this move must also be
96 // involved in the same cycle. In that case, the blocking move will
97 // be created but will be "pending" when we return from PerformMove.
102 // We are about to resolve this move and don't need it marked as
103 // pending, so restore its destination.
104 moves_[index].set_destination(destination);
106 // This move's source may have changed due to swaps to resolve cycles and
107 // so it may now be the last move in the cycle. If so remove it.
108 if (moves_[index].source()->Equals(destination)) {
113 // The move may be blocked on a (at most one) pending move, in which case
114 // we have a cycle. Search for such a blocking move and perform a swap to
116 for (int i = 0; i < moves_.length(); ++i) {
117 LMoveOperands other_move = moves_[i];
118 if (other_move.Blocks(destination)) {
119 ASSERT(other_move.IsPending());
125 // This move is not blocked.
130 void LGapResolver::AddMove(LMoveOperands move) {
131 LOperand* source = move.source();
132 if (source->IsRegister()) ++source_uses_[source->index()];
134 LOperand* destination = move.destination();
135 if (destination->IsRegister()) ++destination_uses_[destination->index()];
137 moves_.Add(move, cgen_->zone());
141 void LGapResolver::RemoveMove(int index) {
142 LOperand* source = moves_[index].source();
143 if (source->IsRegister()) {
144 --source_uses_[source->index()];
145 ASSERT(source_uses_[source->index()] >= 0);
148 LOperand* destination = moves_[index].destination();
149 if (destination->IsRegister()) {
150 --destination_uses_[destination->index()];
151 ASSERT(destination_uses_[destination->index()] >= 0);
154 moves_[index].Eliminate();
158 int LGapResolver::CountSourceUses(LOperand* operand) {
160 for (int i = 0; i < moves_.length(); ++i) {
161 if (!moves_[i].IsEliminated() && moves_[i].source()->Equals(operand)) {
169 Register LGapResolver::GetFreeRegisterNot(Register reg) {
170 int skip_index = reg.is(no_reg) ? -1 : Register::ToAllocationIndex(reg);
171 for (int i = 0; i < Register::NumAllocatableRegisters(); ++i) {
172 if (source_uses_[i] == 0 && destination_uses_[i] > 0 && i != skip_index) {
173 return Register::FromAllocationIndex(i);
180 bool LGapResolver::HasBeenReset() {
181 if (!moves_.is_empty()) return false;
182 if (spilled_register_ >= 0) return false;
184 for (int i = 0; i < Register::NumAllocatableRegisters(); ++i) {
185 if (source_uses_[i] != 0) return false;
186 if (destination_uses_[i] != 0) return false;
192 void LGapResolver::Verify() {
193 #ifdef ENABLE_SLOW_ASSERTS
194 // No operand should be the destination for more than one move.
195 for (int i = 0; i < moves_.length(); ++i) {
196 LOperand* destination = moves_[i].destination();
197 for (int j = i + 1; j < moves_.length(); ++j) {
198 SLOW_ASSERT(!destination->Equals(moves_[j].destination()));
205 #define __ ACCESS_MASM(cgen_->masm())
207 void LGapResolver::Finish() {
208 if (spilled_register_ >= 0) {
209 __ pop(Register::FromAllocationIndex(spilled_register_));
210 spilled_register_ = -1;
216 void LGapResolver::EnsureRestored(LOperand* operand) {
217 if (operand->IsRegister() && operand->index() == spilled_register_) {
218 __ pop(Register::FromAllocationIndex(spilled_register_));
219 spilled_register_ = -1;
224 Register LGapResolver::EnsureTempRegister() {
225 // 1. We may have already spilled to create a temp register.
226 if (spilled_register_ >= 0) {
227 return Register::FromAllocationIndex(spilled_register_);
230 // 2. We may have a free register that we can use without spilling.
231 Register free = GetFreeRegisterNot(no_reg);
232 if (!free.is(no_reg)) return free;
234 // 3. Prefer to spill a register that is not used in any remaining move
235 // because it will not need to be restored until the end.
236 for (int i = 0; i < Register::NumAllocatableRegisters(); ++i) {
237 if (source_uses_[i] == 0 && destination_uses_[i] == 0) {
238 Register scratch = Register::FromAllocationIndex(i);
240 spilled_register_ = i;
245 // 4. Use an arbitrary register. Register 0 is as arbitrary as any other.
246 Register scratch = Register::FromAllocationIndex(0);
248 spilled_register_ = 0;
253 void LGapResolver::EmitMove(int index) {
254 LOperand* source = moves_[index].source();
255 LOperand* destination = moves_[index].destination();
256 EnsureRestored(source);
257 EnsureRestored(destination);
259 // Dispatch on the source and destination operand kinds. Not all
260 // combinations are possible.
261 if (source->IsRegister()) {
262 ASSERT(destination->IsRegister() || destination->IsStackSlot());
263 Register src = cgen_->ToRegister(source);
264 Operand dst = cgen_->ToOperand(destination);
267 } else if (source->IsStackSlot()) {
268 ASSERT(destination->IsRegister() || destination->IsStackSlot());
269 Operand src = cgen_->ToOperand(source);
270 if (destination->IsRegister()) {
271 Register dst = cgen_->ToRegister(destination);
274 // Spill on demand to use a temporary register for memory-to-memory
276 Register tmp = EnsureTempRegister();
277 Operand dst = cgen_->ToOperand(destination);
282 } else if (source->IsConstantOperand()) {
283 LConstantOperand* constant_source = LConstantOperand::cast(source);
284 if (destination->IsRegister()) {
285 Register dst = cgen_->ToRegister(destination);
286 Representation r = cgen_->IsSmi(constant_source)
287 ? Representation::Smi() : Representation::Integer32();
288 if (cgen_->IsInteger32(constant_source)) {
289 __ Move(dst, cgen_->ToImmediate(constant_source, r));
291 __ LoadObject(dst, cgen_->ToHandle(constant_source));
293 } else if (destination->IsDoubleRegister()) {
294 double v = cgen_->ToDouble(constant_source);
295 uint64_t int_val = BitCast<uint64_t, double>(v);
296 int32_t lower = static_cast<int32_t>(int_val);
297 int32_t upper = static_cast<int32_t>(int_val >> kBitsPerInt);
298 if (CpuFeatures::IsSupported(SSE2)) {
299 CpuFeatureScope scope(cgen_->masm(), SSE2);
300 XMMRegister dst = cgen_->ToDoubleRegister(destination);
304 __ push(Immediate(upper));
305 __ push(Immediate(lower));
306 __ movsd(dst, Operand(esp, 0));
307 __ add(esp, Immediate(kDoubleSize));
310 __ push(Immediate(upper));
311 __ push(Immediate(lower));
312 X87Register dst = cgen_->ToX87Register(destination);
313 cgen_->X87Mov(dst, MemOperand(esp, 0));
314 __ add(esp, Immediate(kDoubleSize));
317 ASSERT(destination->IsStackSlot());
318 Operand dst = cgen_->ToOperand(destination);
319 Representation r = cgen_->IsSmi(constant_source)
320 ? Representation::Smi() : Representation::Integer32();
321 if (cgen_->IsInteger32(constant_source)) {
322 __ Move(dst, cgen_->ToImmediate(constant_source, r));
324 Register tmp = EnsureTempRegister();
325 __ LoadObject(tmp, cgen_->ToHandle(constant_source));
330 } else if (source->IsDoubleRegister()) {
331 if (CpuFeatures::IsSupported(SSE2)) {
332 CpuFeatureScope scope(cgen_->masm(), SSE2);
333 XMMRegister src = cgen_->ToDoubleRegister(source);
334 if (destination->IsDoubleRegister()) {
335 XMMRegister dst = cgen_->ToDoubleRegister(destination);
338 ASSERT(destination->IsDoubleStackSlot());
339 Operand dst = cgen_->ToOperand(destination);
343 // load from the register onto the stack, store in destination, which must
344 // be a double stack slot in the non-SSE2 case.
345 ASSERT(destination->IsDoubleStackSlot());
346 Operand dst = cgen_->ToOperand(destination);
347 X87Register src = cgen_->ToX87Register(source);
348 cgen_->X87Mov(dst, src);
350 } else if (source->IsDoubleStackSlot()) {
351 if (CpuFeatures::IsSupported(SSE2)) {
352 CpuFeatureScope scope(cgen_->masm(), SSE2);
353 ASSERT(destination->IsDoubleRegister() ||
354 destination->IsDoubleStackSlot());
355 Operand src = cgen_->ToOperand(source);
356 if (destination->IsDoubleRegister()) {
357 XMMRegister dst = cgen_->ToDoubleRegister(destination);
360 // We rely on having xmm0 available as a fixed scratch register.
361 Operand dst = cgen_->ToOperand(destination);
366 // load from the stack slot on top of the floating point stack, and then
367 // store in destination. If destination is a double register, then it
368 // represents the top of the stack and nothing needs to be done.
369 if (destination->IsDoubleStackSlot()) {
370 Register tmp = EnsureTempRegister();
371 Operand src0 = cgen_->ToOperand(source);
372 Operand src1 = cgen_->HighOperand(source);
373 Operand dst0 = cgen_->ToOperand(destination);
374 Operand dst1 = cgen_->HighOperand(destination);
375 __ mov(tmp, src0); // Then use tmp to copy source to destination.
380 Operand src = cgen_->ToOperand(source);
381 X87Register dst = cgen_->ToX87Register(destination);
382 cgen_->X87Mov(dst, src);
385 } else if (source->IsSIMD128Register()) {
386 ASSERT(CpuFeatures::IsSupported(SSE2));
387 CpuFeatureScope scope(cgen_->masm(), SSE2);
388 XMMRegister src = cgen_->ToSIMD128Register(source);
389 if (destination->IsSIMD128Register()) {
390 __ movaps(cgen_->ToSIMD128Register(destination), src);
392 ASSERT(destination->IsSIMD128StackSlot());
393 __ movups(cgen_->ToOperand(destination), src);
395 } else if (source->IsSIMD128StackSlot()) {
396 ASSERT(CpuFeatures::IsSupported(SSE2));
397 CpuFeatureScope scope(cgen_->masm(), SSE2);
398 Operand src = cgen_->ToOperand(source);
399 if (destination->IsSIMD128Register()) {
400 __ movups(cgen_->ToSIMD128Register(destination), src);
402 ASSERT(destination->IsSIMD128StackSlot());
403 __ movups(xmm0, src);
404 __ movups(cgen_->ToOperand(destination), xmm0);
414 void LGapResolver::EmitSwap(int index) {
415 LOperand* source = moves_[index].source();
416 LOperand* destination = moves_[index].destination();
417 EnsureRestored(source);
418 EnsureRestored(destination);
420 // Dispatch on the source and destination operand kinds. Not all
421 // combinations are possible.
422 if (source->IsRegister() && destination->IsRegister()) {
423 // Register-register.
424 Register src = cgen_->ToRegister(source);
425 Register dst = cgen_->ToRegister(destination);
428 } else if ((source->IsRegister() && destination->IsStackSlot()) ||
429 (source->IsStackSlot() && destination->IsRegister())) {
430 // Register-memory. Use a free register as a temp if possible. Do not
431 // spill on demand because the simple spill implementation cannot avoid
432 // spilling src at this point.
433 Register tmp = GetFreeRegisterNot(no_reg);
435 cgen_->ToRegister(source->IsRegister() ? source : destination);
437 cgen_->ToOperand(source->IsRegister() ? destination : source);
438 if (tmp.is(no_reg)) {
448 } else if (source->IsStackSlot() && destination->IsStackSlot()) {
449 // Memory-memory. Spill on demand to use a temporary. If there is a
450 // free register after that, use it as a second temporary.
451 Register tmp0 = EnsureTempRegister();
452 Register tmp1 = GetFreeRegisterNot(tmp0);
453 Operand src = cgen_->ToOperand(source);
454 Operand dst = cgen_->ToOperand(destination);
455 if (tmp1.is(no_reg)) {
456 // Only one temp register available to us.
468 } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) {
469 CpuFeatureScope scope(cgen_->masm(), SSE2);
470 // XMM register-register swap. We rely on having xmm0
471 // available as a fixed scratch register.
472 XMMRegister src = cgen_->ToDoubleRegister(source);
473 XMMRegister dst = cgen_->ToDoubleRegister(destination);
474 __ movaps(xmm0, src);
476 __ movaps(dst, xmm0);
477 } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) {
478 CpuFeatureScope scope(cgen_->masm(), SSE2);
479 // XMM register-memory swap. We rely on having xmm0
480 // available as a fixed scratch register.
481 ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot());
482 XMMRegister reg = cgen_->ToDoubleRegister(source->IsDoubleRegister()
486 cgen_->ToOperand(source->IsDoubleRegister() ? destination : source);
487 __ movsd(xmm0, other);
488 __ movsd(other, reg);
489 __ movaps(reg, xmm0);
490 } else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) {
491 CpuFeatureScope scope(cgen_->masm(), SSE2);
492 // Double-width memory-to-memory. Spill on demand to use a general
493 // purpose temporary register and also rely on having xmm0 available as
494 // a fixed scratch register.
495 Register tmp = EnsureTempRegister();
496 Operand src0 = cgen_->ToOperand(source);
497 Operand src1 = cgen_->HighOperand(source);
498 Operand dst0 = cgen_->ToOperand(destination);
499 Operand dst1 = cgen_->HighOperand(destination);
500 __ movsd(xmm0, dst0); // Save destination in xmm0.
501 __ mov(tmp, src0); // Then use tmp to copy source to destination.
505 __ movsd(src0, xmm0);
507 } else if ((source->IsSIMD128StackSlot() &&
508 destination->IsSIMD128StackSlot())) {
509 CpuFeatureScope scope(cgen_->masm(), SSE2);
510 // Swap two XMM stack slots.
511 Operand src = cgen_->ToOperand(source);
512 Operand dst = cgen_->ToOperand(destination);
513 Register tmp = EnsureTempRegister();
514 __ movups(xmm0, src);
515 for (int offset = 0; offset < kSIMD128Size; offset += kPointerSize) {
516 __ mov(tmp, Operand(dst, offset));
517 __ mov(Operand(src, offset), tmp);
519 __ movups(dst, xmm0);
521 } else if (source->IsSIMD128Register() && destination->IsSIMD128Register()) {
522 CpuFeatureScope scope(cgen_->masm(), SSE2);
523 // Swap two XMM registers.
524 XMMRegister source_reg = cgen_->ToSIMD128Register(source);
525 XMMRegister destination_reg = cgen_->ToSIMD128Register(destination);
526 __ movaps(xmm0, source_reg);
527 __ movaps(source_reg, destination_reg);
528 __ movaps(destination_reg, xmm0);
530 } else if (source->IsSIMD128Register() || destination->IsSIMD128Register()) {
531 CpuFeatureScope scope(cgen_->masm(), SSE2);
532 // Swap a xmm register and a xmm stack slot.
533 ASSERT((source->IsSIMD128Register() &&
534 destination->IsSIMD128StackSlot()) ||
535 (source->IsSIMD128StackSlot() &&
536 destination->IsSIMD128Register()));
537 XMMRegister reg = cgen_->ToSIMD128Register(source->IsSIMD128Register()
540 LOperand* other = source->IsSIMD128Register() ? destination : source;
541 ASSERT(other->IsSIMD128StackSlot());
542 Operand other_operand = cgen_->ToOperand(other);
543 __ movups(xmm0, other_operand);
544 __ movups(other_operand, reg);
545 __ movaps(reg, xmm0);
548 // No other combinations are possible.
552 // The swap of source and destination has executed a move from source to
556 // Any unperformed (including pending) move with a source of either
557 // this move's source or destination needs to have their source
558 // changed to reflect the state of affairs after the swap.
559 for (int i = 0; i < moves_.length(); ++i) {
560 LMoveOperands other_move = moves_[i];
561 if (other_move.Blocks(source)) {
562 moves_[i].set_source(destination);
563 } else if (other_move.Blocks(destination)) {
564 moves_[i].set_source(source);
568 // In addition to swapping the actual uses as sources, we need to update
570 if (source->IsRegister() && destination->IsRegister()) {
571 int temp = source_uses_[source->index()];
572 source_uses_[source->index()] = source_uses_[destination->index()];
573 source_uses_[destination->index()] = temp;
574 } else if (source->IsRegister()) {
575 // We don't have use counts for non-register operands like destination.
576 // Compute those counts now.
577 source_uses_[source->index()] = CountSourceUses(source);
578 } else if (destination->IsRegister()) {
579 source_uses_[destination->index()] = CountSourceUses(destination);
585 } } // namespace v8::internal
587 #endif // V8_TARGET_ARCH_IA32