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31 * Author: Sanjay Ghemawat
34 // Implementation of atomic operations using Windows API
35 // functions. This file should not be included directly. Clients
36 // should instead include "base/atomicops.h".
38 #ifndef BASE_ATOMICOPS_INTERNALS_WINDOWS_H_
39 #define BASE_ATOMICOPS_INTERNALS_WINDOWS_H_
43 #include "base/basictypes.h" // For COMPILE_ASSERT
45 typedef int32 Atomic32;
48 #define BASE_HAS_ATOMIC64 1 // Use only in tests and base/atomic*
54 typedef int64 Atomic64;
56 // 32-bit low-level operations on any platform
59 // We use windows intrinsics when we can (they seem to be supported
60 // well on MSVC 8.0 and above). Unfortunately, in some
61 // environments, <windows.h> and <intrin.h> have conflicting
62 // declarations of some other intrinsics, breaking compilation:
63 // http://connect.microsoft.com/VisualStudio/feedback/details/262047
64 // Therefore, we simply declare the relevant intrinsics ourself.
66 // MinGW has a bug in the header files where it doesn't indicate the
67 // first argument is volatile -- they're not up to date. See
68 // http://readlist.com/lists/lists.sourceforge.net/mingw-users/0/3861.html
69 // We have to const_cast away the volatile to avoid compiler warnings.
70 // TODO(csilvers): remove this once MinGW has updated MinGW/include/winbase.h
71 #if defined(__MINGW32__)
72 inline LONG FastInterlockedCompareExchange(volatile LONG* ptr,
73 LONG newval, LONG oldval) {
74 return ::InterlockedCompareExchange(const_cast<LONG*>(ptr), newval, oldval);
76 inline LONG FastInterlockedExchange(volatile LONG* ptr, LONG newval) {
77 return ::InterlockedExchange(const_cast<LONG*>(ptr), newval);
79 inline LONG FastInterlockedExchangeAdd(volatile LONG* ptr, LONG increment) {
80 return ::InterlockedExchangeAdd(const_cast<LONG*>(ptr), increment);
83 #elif _MSC_VER >= 1400 // intrinsics didn't work so well before MSVC 8.0
84 // Unfortunately, in some environments, <windows.h> and <intrin.h>
85 // have conflicting declarations of some intrinsics, breaking
86 // compilation. So we declare the intrinsics we need ourselves. See
87 // http://connect.microsoft.com/VisualStudio/feedback/details/262047
88 LONG _InterlockedCompareExchange(volatile LONG* ptr, LONG newval, LONG oldval);
89 #pragma intrinsic(_InterlockedCompareExchange)
90 inline LONG FastInterlockedCompareExchange(volatile LONG* ptr,
91 LONG newval, LONG oldval) {
92 return _InterlockedCompareExchange(ptr, newval, oldval);
95 LONG _InterlockedExchange(volatile LONG* ptr, LONG newval);
96 #pragma intrinsic(_InterlockedExchange)
97 inline LONG FastInterlockedExchange(volatile LONG* ptr, LONG newval) {
98 return _InterlockedExchange(ptr, newval);
101 LONG _InterlockedExchangeAdd(volatile LONG* ptr, LONG increment);
102 #pragma intrinsic(_InterlockedExchangeAdd)
103 inline LONG FastInterlockedExchangeAdd(volatile LONG* ptr, LONG increment) {
104 return _InterlockedExchangeAdd(ptr, increment);
108 inline LONG FastInterlockedCompareExchange(volatile LONG* ptr,
109 LONG newval, LONG oldval) {
110 return ::InterlockedCompareExchange(ptr, newval, oldval);
112 inline LONG FastInterlockedExchange(volatile LONG* ptr, LONG newval) {
113 return ::InterlockedExchange(ptr, newval);
115 inline LONG FastInterlockedExchangeAdd(volatile LONG* ptr, LONG increment) {
116 return ::InterlockedExchangeAdd(ptr, increment);
119 #endif // ifdef __MINGW32__
122 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
124 Atomic32 new_value) {
125 LONG result = FastInterlockedCompareExchange(
126 reinterpret_cast<volatile LONG*>(ptr),
127 static_cast<LONG>(new_value),
128 static_cast<LONG>(old_value));
129 return static_cast<Atomic32>(result);
132 inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
133 Atomic32 new_value) {
134 LONG result = FastInterlockedExchange(
135 reinterpret_cast<volatile LONG*>(ptr),
136 static_cast<LONG>(new_value));
137 return static_cast<Atomic32>(result);
140 inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
141 Atomic32 increment) {
142 return FastInterlockedExchangeAdd(
143 reinterpret_cast<volatile LONG*>(ptr),
144 static_cast<LONG>(increment)) + increment;
147 inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
148 Atomic32 increment) {
149 return Barrier_AtomicIncrement(ptr, increment);
152 } // namespace base::subtle
156 // In msvc8/vs2005, winnt.h already contains a definition for
157 // MemoryBarrier in the global namespace. Add it there for earlier
158 // versions and forward to it from within the namespace.
159 #if !(defined(_MSC_VER) && _MSC_VER >= 1400)
160 inline void MemoryBarrier() {
162 base::subtle::NoBarrier_AtomicExchange(&value, 0);
163 // actually acts as a barrier in thisd implementation
170 inline void MemoryBarrier() {
174 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
176 Atomic32 new_value) {
177 return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
180 inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
182 Atomic32 new_value) {
183 return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
186 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
190 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
191 NoBarrier_AtomicExchange(ptr, value);
192 // acts as a barrier in this implementation
195 inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
196 *ptr = value; // works w/o barrier for current Intel chips as of June 2005
197 // See comments in Atomic64 version of Release_Store() below.
200 inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
204 inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
205 Atomic32 value = *ptr;
209 inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
216 #if defined(_WIN64) || defined(__MINGW64__)
218 // 64-bit low-level operations on 64-bit platform.
220 COMPILE_ASSERT(sizeof(Atomic64) == sizeof(PVOID), atomic_word_is_atomic);
222 // These are the intrinsics needed for 64-bit operations. Similar to the
223 // 32-bit case above.
226 #if defined(__MINGW64__)
227 inline PVOID FastInterlockedCompareExchangePointer(volatile PVOID* ptr,
228 PVOID newval, PVOID oldval) {
229 return ::InterlockedCompareExchangePointer(const_cast<PVOID*>(ptr),
232 inline PVOID FastInterlockedExchangePointer(volatile PVOID* ptr, PVOID newval) {
233 return ::InterlockedExchangePointer(const_cast<PVOID*>(ptr), newval);
235 inline LONGLONG FastInterlockedExchangeAdd64(volatile LONGLONG* ptr,
236 LONGLONG increment) {
237 return ::InterlockedExchangeAdd64(const_cast<LONGLONG*>(ptr), increment);
240 #elif _MSC_VER >= 1400 // intrinsics didn't work so well before MSVC 8.0
241 // Like above, we need to declare the intrinsics ourselves.
242 PVOID _InterlockedCompareExchangePointer(volatile PVOID* ptr,
243 PVOID newval, PVOID oldval);
244 #pragma intrinsic(_InterlockedCompareExchangePointer)
245 inline PVOID FastInterlockedCompareExchangePointer(volatile PVOID* ptr,
246 PVOID newval, PVOID oldval) {
247 return _InterlockedCompareExchangePointer(const_cast<PVOID*>(ptr),
251 PVOID _InterlockedExchangePointer(volatile PVOID* ptr, PVOID newval);
252 #pragma intrinsic(_InterlockedExchangePointer)
253 inline PVOID FastInterlockedExchangePointer(volatile PVOID* ptr, PVOID newval) {
254 return _InterlockedExchangePointer(const_cast<PVOID*>(ptr), newval);
257 LONGLONG _InterlockedExchangeAdd64(volatile LONGLONG* ptr, LONGLONG increment);
258 #pragma intrinsic(_InterlockedExchangeAdd64)
259 inline LONGLONG FastInterlockedExchangeAdd64(volatile LONGLONG* ptr,
260 LONGLONG increment) {
261 return _InterlockedExchangeAdd64(const_cast<LONGLONG*>(ptr), increment);
265 inline PVOID FastInterlockedCompareExchangePointer(volatile PVOID* ptr,
266 PVOID newval, PVOID oldval) {
267 return ::InterlockedCompareExchangePointer(ptr, newval, oldval);
269 inline PVOID FastInterlockedExchangePointer(volatile PVOID* ptr, PVOID newval) {
270 return ::InterlockedExchangePointer(ptr, newval);
272 inline LONGLONG FastInterlockedExchangeAdd64(volatile LONGLONG* ptr,
273 LONGLONG increment) {
274 return ::InterlockedExchangeAdd64(ptr, increment);
277 #endif // ifdef __MINGW64__
280 inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
282 Atomic64 new_value) {
283 PVOID result = FastInterlockedCompareExchangePointer(
284 reinterpret_cast<volatile PVOID*>(ptr),
285 reinterpret_cast<PVOID>(new_value), reinterpret_cast<PVOID>(old_value));
286 return reinterpret_cast<Atomic64>(result);
289 inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
290 Atomic64 new_value) {
291 PVOID result = FastInterlockedExchangePointer(
292 reinterpret_cast<volatile PVOID*>(ptr),
293 reinterpret_cast<PVOID>(new_value));
294 return reinterpret_cast<Atomic64>(result);
297 inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
298 Atomic64 increment) {
299 return FastInterlockedExchangeAdd64(
300 reinterpret_cast<volatile LONGLONG*>(ptr),
301 static_cast<LONGLONG>(increment)) + increment;
304 inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
305 Atomic64 increment) {
306 return Barrier_AtomicIncrement(ptr, increment);
309 inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
313 inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
314 NoBarrier_AtomicExchange(ptr, value);
315 // acts as a barrier in this implementation
318 inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
319 *ptr = value; // works w/o barrier for current Intel chips as of June 2005
321 // When new chips come out, check:
322 // IA-32 Intel Architecture Software Developer's Manual, Volume 3:
323 // System Programming Guide, Chatper 7: Multiple-processor management,
324 // Section 7.2, Memory Ordering.
326 // http://developer.intel.com/design/pentium4/manuals/index_new.htm
329 inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
333 inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
334 Atomic64 value = *ptr;
338 inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
343 #else // defined(_WIN64) || defined(__MINGW64__)
345 // 64-bit low-level operations on 32-bit platform
347 // TODO(vchen): The GNU assembly below must be converted to MSVC inline
348 // assembly. Then the file should be renamed to ...-x86-msvc.h, probably.
350 inline void NotImplementedFatalError(const char *function_name) {
351 fprintf(stderr, "64-bit %s() not implemented on this platform\n",
356 inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
358 Atomic64 new_value) {
359 #if 0 // Not implemented
361 __asm__ __volatile__("movl (%3), %%ebx\n\t" // Move 64-bit new_value into
362 "movl 4(%3), %%ecx\n\t" // ecx:ebx
363 "lock; cmpxchg8b %1\n\t" // If edx:eax (old_value) same
364 : "=A" (prev) // as contents of ptr:
365 : "m" (*ptr), // ecx:ebx => ptr
366 "0" (old_value), // else:
367 "r" (&new_value) // old *ptr => edx:eax
368 : "memory", "%ebx", "%ecx");
371 NotImplementedFatalError("NoBarrier_CompareAndSwap");
376 inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
377 Atomic64 new_value) {
378 #if 0 // Not implemented
379 __asm__ __volatile__(
380 "movl (%2), %%ebx\n\t" // Move 64-bit new_value into
381 "movl 4(%2), %%ecx\n\t" // ecx:ebx
383 "movl %1, %%eax\n\t" // Read contents of ptr into
384 "movl 4%1, %%edx\n\t" // edx:eax
385 "lock; cmpxchg8b %1\n\t" // Attempt cmpxchg; if *ptr
386 "jnz 0b\n\t" // is no longer edx:eax, loop
390 : "memory", "%ebx", "%ecx");
391 return new_value; // Now it's the previous value.
393 NotImplementedFatalError("NoBarrier_AtomicExchange");
398 inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
399 Atomic64 increment) {
400 #if 0 // Not implemented
401 Atomic64 temp = increment;
402 __asm__ __volatile__(
404 "movl (%3), %%ebx\n\t" // Move 64-bit increment into
405 "movl 4(%3), %%ecx\n\t" // ecx:ebx
406 "movl (%2), %%eax\n\t" // Read contents of ptr into
407 "movl 4(%2), %%edx\n\t" // edx:eax
408 "add %%eax, %%ebx\n\t" // sum => ecx:ebx
409 "adc %%edx, %%ecx\n\t" // edx:eax still has old *ptr
410 "lock; cmpxchg8b (%2)\n\t"// Attempt cmpxchg; if *ptr
411 "jnz 0b\n\t" // is no longer edx:eax, loop
412 : "=A"(temp), "+m"(*ptr)
413 : "D" (ptr), "S" (&increment)
414 : "memory", "%ebx", "%ecx");
415 // temp now contains the previous value of *ptr
416 return temp + increment;
418 NotImplementedFatalError("NoBarrier_AtomicIncrement");
423 inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
424 Atomic64 increment) {
425 #if 0 // Not implemented
426 Atomic64 new_val = NoBarrier_AtomicIncrement(ptr, increment);
427 if (AtomicOps_Internalx86CPUFeatures.has_amd_lock_mb_bug) {
428 __asm__ __volatile__("lfence" : : : "memory");
432 NotImplementedFatalError("Barrier_AtomicIncrement");
437 inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
438 #if 0 // Not implemented
440 mov mm0, value; // Use mmx reg for 64-bit atomic moves
442 emms; // Empty mmx state to enable FP registers
445 NotImplementedFatalError("NoBarrier_Store");
449 inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
450 NoBarrier_AtomicExchange(ptr, value);
451 // acts as a barrier in this implementation
454 inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
455 NoBarrier_Store(ptr, value);
458 inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
459 #if 0 // Not implemented
462 mov mm0, ptr; // Use mmx reg for 64-bit atomic moves
464 emms; // Empty mmx state to enable FP registers
468 NotImplementedFatalError("NoBarrier_Store");
473 inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
474 Atomic64 value = NoBarrier_Load(ptr);
478 inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
480 return NoBarrier_Load(ptr);
483 #endif // defined(_WIN64) || defined(__MINGW64__)
486 inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
488 Atomic64 new_value) {
489 return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
492 inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
494 Atomic64 new_value) {
495 return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
498 } // namespace base::subtle
501 #endif // BASE_ATOMICOPS_INTERNALS_WINDOWS_H_