1 // Protocol Buffers - Google's data interchange format
2 // Copyright 2012 Google Inc. All rights reserved.
3 // http://code.google.com/p/protobuf/
5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are
9 // * Redistributions of source code must retain the above copyright
10 // notice, this list of conditions and the following disclaimer.
11 // * Redistributions in binary form must reproduce the above
12 // copyright notice, this list of conditions and the following disclaimer
13 // in the documentation and/or other materials provided with the
15 // * Neither the name of Google Inc. nor the names of its
16 // contributors may be used to endorse or promote products derived from
17 // this software without specific prior written permission.
19 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
22 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
23 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 // This file is an internal atomic implementation, use atomicops.h instead.
33 #ifndef GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_ARM64_GCC_H_
34 #define GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_ARM64_GCC_H_
40 inline void MemoryBarrier() {
41 __asm__ __volatile__ ("dmb ish" ::: "memory"); // NOLINT
44 // NoBarrier versions of the operation include "memory" in the clobber list.
45 // This is not required for direct usage of the NoBarrier versions of the
46 // operations. However this is required for correctness when they are used as
47 // part of the Acquire or Release versions, to ensure that nothing from outside
48 // the call is reordered between the operation and the memory barrier. This does
49 // not change the code generated, so has no or minimal impact on the
50 // NoBarrier operations.
52 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
58 __asm__ __volatile__ ( // NOLINT
60 "ldxr %w[prev], %[ptr] \n\t" // Load the previous value.
61 "cmp %w[prev], %w[old_value] \n\t"
63 "stxr %w[temp], %w[new_value], %[ptr] \n\t" // Try to store the new value.
64 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
69 : [old_value]"IJr" (old_value),
70 [new_value]"r" (new_value)
77 inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
82 __asm__ __volatile__ ( // NOLINT
84 "ldxr %w[result], %[ptr] \n\t" // Load the previous value.
85 "stxr %w[temp], %w[new_value], %[ptr] \n\t" // Try to store the new value.
86 "cbnz %w[temp], 0b \n\t" // Retry if it did not work.
87 : [result]"=&r" (result),
90 : [new_value]"r" (new_value)
97 inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
102 __asm__ __volatile__ ( // NOLINT
104 "ldxr %w[result], %[ptr] \n\t" // Load the previous value.
105 "add %w[result], %w[result], %w[increment]\n\t"
106 "stxr %w[temp], %w[result], %[ptr] \n\t" // Try to store the result.
107 "cbnz %w[temp], 0b \n\t" // Retry on failure.
108 : [result]"=&r" (result),
111 : [increment]"IJr" (increment)
118 inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
119 Atomic32 increment) {
121 Atomic32 result = NoBarrier_AtomicIncrement(ptr, increment);
127 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
129 Atomic32 new_value) {
130 Atomic32 prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
136 inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
138 Atomic32 new_value) {
140 Atomic32 prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
145 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
149 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
154 inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
155 __asm__ __volatile__ ( // NOLINT
156 "stlr %w[value], %[ptr] \n\t"
163 inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
167 inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
170 __asm__ __volatile__ ( // NOLINT
171 "ldar %w[value], %[ptr] \n\t"
172 : [value]"=r" (value)
180 inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
185 // 64-bit versions of the operations.
186 // See the 32-bit versions for comments.
188 inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
190 Atomic64 new_value) {
194 __asm__ __volatile__ ( // NOLINT
196 "ldxr %[prev], %[ptr] \n\t"
197 "cmp %[prev], %[old_value] \n\t"
199 "stxr %w[temp], %[new_value], %[ptr] \n\t"
200 "cbnz %w[temp], 0b \n\t"
202 : [prev]"=&r" (prev),
205 : [old_value]"IJr" (old_value),
206 [new_value]"r" (new_value)
213 inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
214 Atomic64 new_value) {
218 __asm__ __volatile__ ( // NOLINT
220 "ldxr %[result], %[ptr] \n\t"
221 "stxr %w[temp], %[new_value], %[ptr] \n\t"
222 "cbnz %w[temp], 0b \n\t"
223 : [result]"=&r" (result),
226 : [new_value]"r" (new_value)
233 inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
234 Atomic64 increment) {
238 __asm__ __volatile__ ( // NOLINT
240 "ldxr %[result], %[ptr] \n\t"
241 "add %[result], %[result], %[increment] \n\t"
242 "stxr %w[temp], %[result], %[ptr] \n\t"
243 "cbnz %w[temp], 0b \n\t"
244 : [result]"=&r" (result),
247 : [increment]"IJr" (increment)
254 inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
255 Atomic64 increment) {
257 Atomic64 result = NoBarrier_AtomicIncrement(ptr, increment);
263 inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
265 Atomic64 new_value) {
266 Atomic64 prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
272 inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
274 Atomic64 new_value) {
276 Atomic64 prev = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
281 inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
285 inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
290 inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
291 __asm__ __volatile__ ( // NOLINT
292 "stlr %x[value], %[ptr] \n\t"
299 inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
303 inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
306 __asm__ __volatile__ ( // NOLINT
307 "ldar %x[value], %[ptr] \n\t"
308 : [value]"=r" (value)
316 inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
321 } // namespace internal
322 } // namespace protobuf
323 } // namespace google
325 #endif // GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_ARM64_GCC_H_