2 * Copyright 2011 The LibYuv Project Authors. All rights reserved.
4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree.
11 #include "libyuv/cpu_id.h"
13 #if defined(_MSC_VER) && !defined(__clang__)
14 #include <intrin.h> // For __cpuidex()
16 #if !defined(__pnacl__) && !defined(__CLR_VER) && \
17 !defined(__native_client__) && \
18 defined(_MSC_VER) && (_MSC_FULL_VER >= 160040219) && \
19 (defined(_M_IX86) || defined(_M_X64))
20 #include <immintrin.h> // For _xgetbv()
23 #if !defined(__native_client__)
24 #include <stdlib.h> // For getenv()
27 // For ArmCpuCaps() but unittested on all platforms
31 #include "libyuv/basic_types.h" // For CPU_X86
38 // For functions that use the stack and have runtime checks for overflow,
39 // use SAFEBUFFERS to avoid additional check.
40 #if defined(_MSC_VER) && (_MSC_FULL_VER >= 160040219)
41 #define SAFEBUFFERS __declspec(safebuffers)
46 // Low level cpuid for X86. Returns zeros on other CPUs.
47 #if !defined(__pnacl__) && !defined(__CLR_VER) && \
48 (defined(_M_IX86) || defined(_M_X64) || \
49 defined(__i386__) || defined(__x86_64__))
51 void CpuId(uint32 info_eax, uint32 info_ecx, uint32* cpu_info) {
52 #if defined(_MSC_VER) && !defined(__clang__)
53 #if (_MSC_FULL_VER >= 160040219)
54 __cpuidex((int*)(cpu_info), info_eax, info_ecx);
69 __cpuid((int*)(cpu_info), info_eax);
71 cpu_info[3] = cpu_info[2] = cpu_info[1] = cpu_info[0] = 0;
74 #else // defined(_MSC_VER)
75 uint32 info_ebx, info_edx;
76 asm volatile ( // NOLINT
77 #if defined( __i386__) && defined(__PIC__)
78 // Preserve ebx for fpic 32 bit.
81 "xchg %%edi, %%ebx \n"
86 #endif // defined( __i386__) && defined(__PIC__)
87 "+a" (info_eax), "+c" (info_ecx), "=d" (info_edx));
88 cpu_info[0] = info_eax;
89 cpu_info[1] = info_ebx;
90 cpu_info[2] = info_ecx;
91 cpu_info[3] = info_edx;
92 #endif // defined(_MSC_VER)
95 #if !defined(__native_client__)
97 // X86 CPUs have xgetbv to detect OS saves high parts of ymm registers.
100 #if defined(_MSC_VER) && (_MSC_FULL_VER >= 160040219)
101 xcr0 = (uint32)(_xgetbv(0)); // VS2010 SP1 required.
103 #if defined(_M_IX86) && defined(_MSC_VER)
105 xor ecx, ecx // xcr 0
106 _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0 // For VS2010 and earlier.
110 #if defined(__i386__) || defined(__x86_64__)
111 asm(".byte 0x0f, 0x01, 0xd0" : "=a" (xcr0) : "c" (0) : "%edx");
112 #endif // defined(_MSC_VER)
113 return((xcr0 & 6) == 6); // Is ymm saved?
115 #endif // !defined(__native_client__)
118 void CpuId(uint32 eax, uint32 ecx, uint32* cpu_info) {
119 cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0;
123 // based on libvpx arm_cpudetect.c
124 // For Arm, but public to allow testing on any CPU
125 LIBYUV_API SAFEBUFFERS
126 int ArmCpuCaps(const char* cpuinfo_name) {
127 char cpuinfo_line[512];
128 FILE* f = fopen(cpuinfo_name, "r");
130 // Assume Neon if /proc/cpuinfo is unavailable.
131 // This will occur for Chrome sandbox for Pepper or Render process.
134 while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
135 if (memcmp(cpuinfo_line, "Features", 8) == 0) {
136 char* p = strstr(cpuinfo_line, " neon");
137 if (p && (p[5] == ' ' || p[5] == '\n')) {
141 // aarch64 uses asimd for Neon.
142 p = strstr(cpuinfo_line, " asimd");
143 if (p && (p[6] == ' ' || p[6] == '\n')) {
153 #if defined(__mips__) && defined(__linux__)
154 static int MipsCpuCaps(const char* search_string) {
155 char cpuinfo_line[512];
156 const char* file_name = "/proc/cpuinfo";
157 FILE* f = fopen(file_name, "r");
159 // Assume DSP if /proc/cpuinfo is unavailable.
160 // This will occur for Chrome sandbox for Pepper or Render process.
161 return kCpuHasMIPS_DSP;
163 while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f) != NULL) {
164 if (strstr(cpuinfo_line, search_string) != NULL) {
166 return kCpuHasMIPS_DSP;
174 // CPU detect function for SIMD instruction sets.
176 int cpu_info_ = kCpuInit; // cpu_info is not initialized yet.
178 // Test environment variable for disabling CPU features. Any non-zero value
179 // to disable. Zero ignored to make it easy to set the variable on/off.
180 #if !defined(__native_client__) && !defined(_M_ARM)
182 static LIBYUV_BOOL TestEnv(const char* name) {
183 const char* var = getenv(name);
191 #else // nacl does not support getenv().
192 static LIBYUV_BOOL TestEnv(const char*) {
197 LIBYUV_API SAFEBUFFERS
198 int InitCpuFlags(void) {
199 #if !defined(__pnacl__) && !defined(__CLR_VER) && defined(CPU_X86)
201 uint32 cpu_info0[4] = { 0, 0, 0, 0 };
202 uint32 cpu_info1[4] = { 0, 0, 0, 0 };
203 uint32 cpu_info7[4] = { 0, 0, 0, 0 };
204 CpuId(0, 0, cpu_info0);
205 CpuId(1, 0, cpu_info1);
206 if (cpu_info0[0] >= 7) {
207 CpuId(7, 0, cpu_info7);
209 cpu_info_ = ((cpu_info1[3] & 0x04000000) ? kCpuHasSSE2 : 0) |
210 ((cpu_info1[2] & 0x00000200) ? kCpuHasSSSE3 : 0) |
211 ((cpu_info1[2] & 0x00080000) ? kCpuHasSSE41 : 0) |
212 ((cpu_info1[2] & 0x00100000) ? kCpuHasSSE42 : 0) |
213 ((cpu_info7[1] & 0x00000200) ? kCpuHasERMS : 0) |
214 ((cpu_info1[2] & 0x00001000) ? kCpuHasFMA3 : 0) |
218 if ((cpu_info1[2] & 0x18000000) == 0x18000000 && // AVX and OSSave
219 TestOsSaveYmm()) { // Saves YMM.
220 cpu_info_ |= ((cpu_info7[1] & 0x00000020) ? kCpuHasAVX2 : 0) |
224 // Environment variable overrides for testing.
225 if (TestEnv("LIBYUV_DISABLE_X86")) {
226 cpu_info_ &= ~kCpuHasX86;
228 if (TestEnv("LIBYUV_DISABLE_SSE2")) {
229 cpu_info_ &= ~kCpuHasSSE2;
231 if (TestEnv("LIBYUV_DISABLE_SSSE3")) {
232 cpu_info_ &= ~kCpuHasSSSE3;
234 if (TestEnv("LIBYUV_DISABLE_SSE41")) {
235 cpu_info_ &= ~kCpuHasSSE41;
237 if (TestEnv("LIBYUV_DISABLE_SSE42")) {
238 cpu_info_ &= ~kCpuHasSSE42;
240 if (TestEnv("LIBYUV_DISABLE_AVX")) {
241 cpu_info_ &= ~kCpuHasAVX;
243 if (TestEnv("LIBYUV_DISABLE_AVX2")) {
244 cpu_info_ &= ~kCpuHasAVX2;
246 if (TestEnv("LIBYUV_DISABLE_ERMS")) {
247 cpu_info_ &= ~kCpuHasERMS;
249 if (TestEnv("LIBYUV_DISABLE_FMA3")) {
250 cpu_info_ &= ~kCpuHasFMA3;
253 #if defined(__mips__) && defined(__linux__)
254 // Linux mips parse text file for dsp detect.
255 cpu_info_ = MipsCpuCaps("dsp"); // set kCpuHasMIPS_DSP.
256 #if defined(__mips_dspr2)
257 cpu_info_ |= kCpuHasMIPS_DSPR2;
259 cpu_info_ |= kCpuHasMIPS;
261 if (getenv("LIBYUV_DISABLE_MIPS")) {
262 cpu_info_ &= ~kCpuHasMIPS;
264 if (getenv("LIBYUV_DISABLE_MIPS_DSP")) {
265 cpu_info_ &= ~kCpuHasMIPS_DSP;
267 if (getenv("LIBYUV_DISABLE_MIPS_DSPR2")) {
268 cpu_info_ &= ~kCpuHasMIPS_DSPR2;
271 #if defined(__arm__) || defined(__aarch64__)
272 // gcc -mfpu=neon defines __ARM_NEON__
273 // __ARM_NEON__ generates code that requires Neon. NaCL also requires Neon.
274 // For Linux, /proc/cpuinfo can be tested but without that assume Neon.
275 #if defined(__ARM_NEON__) || defined(__native_client__) || !defined(__linux__)
276 cpu_info_ = kCpuHasNEON;
277 // For aarch64(arm64), /proc/cpuinfo's feature is not complete, e.g. no neon
279 // So for aarch64, neon enabling is hard coded here.
281 #if defined(__aarch64__)
282 cpu_info_ = kCpuHasNEON;
284 // Linux arm parse text file for neon detect.
285 cpu_info_ = ArmCpuCaps("/proc/cpuinfo");
287 cpu_info_ |= kCpuHasARM;
288 if (TestEnv("LIBYUV_DISABLE_NEON")) {
289 cpu_info_ &= ~kCpuHasNEON;
292 if (TestEnv("LIBYUV_DISABLE_ASM")) {
299 void MaskCpuFlags(int enable_flags) {
300 cpu_info_ = InitCpuFlags() & enable_flags;
305 } // namespace libyuv