2 ; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
4 ; Use of this source code is governed by a BSD-style license
5 ; that can be found in the LICENSE file in the root of the source
6 ; tree. An additional intellectual property rights grant can be found
7 ; in the file PATENTS. All contributing project authors may
8 ; be found in the AUTHORS file in the root of the source tree.
12 EXPORT |vp8_sixtap_predict4x4_neon|
17 AREA ||.text||, CODE, READONLY, ALIGN=2
20 DCD 0, 0, 128, 0, 0, 0, 0, 0
21 DCD 0, -6, 123, 12, -1, 0, 0, 0
22 DCD 2, -11, 108, 36, -8, 1, 0, 0
23 DCD 0, -9, 93, 50, -6, 0, 0, 0
24 DCD 3, -16, 77, 77, -16, 3, 0, 0
25 DCD 0, -6, 50, 93, -9, 0, 0, 0
26 DCD 1, -8, 36, 108, -11, 2, 0, 0
27 DCD 0, -1, 12, 123, -6, 0, 0, 0
29 ; r0 unsigned char *src_ptr,
30 ; r1 int src_pixels_per_line,
33 ; stack(r4) unsigned char *dst_ptr,
34 ; stack(lr) int dst_pitch
36 |vp8_sixtap_predict4x4_neon| PROC
39 adr r12, filter4_coeff
40 ldr r4, [sp, #8] ;load parameters from stack
41 ldr lr, [sp, #12] ;load parameters from stack
43 cmp r2, #0 ;skip first_pass filter if xoffset=0
44 beq secondpass_filter4x4_only
46 add r2, r12, r2, lsl #5 ;calculate filter location
48 cmp r3, #0 ;skip second_pass filter if yoffset=0
49 vld1.s32 {q14, q15}, [r2] ;load first_pass filter
51 beq firstpass_filter4x4_only
53 vabs.s32 q12, q14 ;get abs(filer_parameters)
56 sub r0, r0, #2 ;go back 2 columns of src data
57 sub r0, r0, r1, lsl #1 ;go back 2 lines of src data
59 ;First pass: output_height lines x output_width columns (9x4)
60 vld1.u8 {q3}, [r0], r1 ;load first 4-line src data
61 vdup.8 d0, d24[0] ;first_pass filter (d0-d5)
62 vld1.u8 {q4}, [r0], r1
64 vld1.u8 {q5}, [r0], r1
66 vld1.u8 {q6}, [r0], r1
75 vext.8 d18, d6, d7, #5 ;construct src_ptr[3]
76 vext.8 d19, d8, d9, #5
77 vext.8 d20, d10, d11, #5
78 vext.8 d21, d12, d13, #5
80 vswp d7, d8 ;discard 2nd half data after src_ptr[3] is done
83 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[3])
85 vmull.u8 q7, d18, d5 ;(src_ptr[3] * vp8_filter[5])
88 vmov q4, q3 ;keep original src data in q4 q6
91 vzip.32 d6, d7 ;construct src_ptr[-2], and put 2-line data together
93 vshr.u64 q9, q4, #8 ;construct src_ptr[-1]
95 vmlal.u8 q7, d6, d0 ;+(src_ptr[-2] * vp8_filter[0])
98 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[-1])
100 vshr.u64 q3, q4, #32 ;construct src_ptr[2]
102 vmlsl.u8 q7, d18, d1 ;-(src_ptr[-1] * vp8_filter[1])
105 vzip.32 d6, d7 ;put 2-line data in 1 register (src_ptr[2])
107 vshr.u64 q9, q4, #16 ;construct src_ptr[0]
108 vshr.u64 q10, q6, #16
109 vmlsl.u8 q7, d6, d4 ;-(src_ptr[2] * vp8_filter[4])
112 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[0])
114 vshr.u64 q3, q4, #24 ;construct src_ptr[1]
116 vmlal.u8 q7, d18, d2 ;(src_ptr[0] * vp8_filter[2])
119 vzip.32 d6, d7 ;put 2-line data in 1 register (src_ptr[1])
121 vmull.u8 q9, d6, d3 ;(src_ptr[1] * vp8_filter[3])
122 vmull.u8 q10, d10, d3
124 vld1.u8 {q3}, [r0], r1 ;load rest 5-line src data
125 vld1.u8 {q4}, [r0], r1
127 vqadd.s16 q7, q9 ;sum of all (src_data*filter_parameters)
130 vld1.u8 {q5}, [r0], r1
131 vld1.u8 {q6}, [r0], r1
133 vqrshrun.s16 d27, q7, #7 ;shift/round/saturate to u8
134 vqrshrun.s16 d28, q8, #7
136 ;First Pass on rest 5-line data
137 vld1.u8 {q11}, [r0], r1
139 vext.8 d18, d6, d7, #5 ;construct src_ptr[3]
140 vext.8 d19, d8, d9, #5
141 vext.8 d20, d10, d11, #5
142 vext.8 d21, d12, d13, #5
144 vswp d7, d8 ;discard 2nd half data after src_ptr[3] is done
147 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[3])
149 vext.8 d31, d22, d23, #5 ;construct src_ptr[3]
150 vmull.u8 q7, d18, d5 ;(src_ptr[3] * vp8_filter[5])
152 vmull.u8 q12, d31, d5 ;(src_ptr[3] * vp8_filter[5])
154 vmov q4, q3 ;keep original src data in q4 q6
157 vzip.32 d6, d7 ;construct src_ptr[-2], and put 2-line data together
159 vshr.u64 q9, q4, #8 ;construct src_ptr[-1]
162 vmlal.u8 q7, d6, d0 ;+(src_ptr[-2] * vp8_filter[0])
164 vmlal.u8 q12, d22, d0 ;(src_ptr[-2] * vp8_filter[0])
166 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[-1])
168 vshr.u64 q3, q4, #32 ;construct src_ptr[2]
170 vext.8 d31, d22, d23, #1 ;construct src_ptr[-1]
172 vmlsl.u8 q7, d18, d1 ;-(src_ptr[-1] * vp8_filter[1])
174 vmlsl.u8 q12, d31, d1 ;-(src_ptr[-1] * vp8_filter[1])
176 vzip.32 d6, d7 ;put 2-line data in 1 register (src_ptr[2])
178 vshr.u64 q9, q4, #16 ;construct src_ptr[0]
179 vshr.u64 q10, q6, #16
180 vext.8 d31, d22, d23, #4 ;construct src_ptr[2]
182 vmlsl.u8 q7, d6, d4 ;-(src_ptr[2] * vp8_filter[4])
184 vmlsl.u8 q12, d31, d4 ;-(src_ptr[2] * vp8_filter[4])
186 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[0])
188 vshr.u64 q3, q4, #24 ;construct src_ptr[1]
190 vext.8 d31, d22, d23, #2 ;construct src_ptr[0]
192 vmlal.u8 q7, d18, d2 ;(src_ptr[0] * vp8_filter[2])
194 vmlal.u8 q12, d31, d2 ;(src_ptr[0] * vp8_filter[2])
196 vzip.32 d6, d7 ;put 2-line data in 1 register (src_ptr[1])
198 vext.8 d31, d22, d23, #3 ;construct src_ptr[1]
199 vmull.u8 q9, d6, d3 ;(src_ptr[1] * vp8_filter[3])
200 vmull.u8 q10, d10, d3
201 vmull.u8 q11, d31, d3 ;(src_ptr[1] * vp8_filter[3])
203 add r3, r12, r3, lsl #5
205 vqadd.s16 q7, q9 ;sum of all (src_data*filter_parameters)
209 vext.8 d23, d27, d28, #4
210 vld1.s32 {q5, q6}, [r3] ;load second_pass filter
212 vqrshrun.s16 d29, q7, #7 ;shift/round/saturate to u8
213 vqrshrun.s16 d30, q8, #7
214 vqrshrun.s16 d31, q12, #7
220 vext.8 d24, d28, d29, #4
221 vext.8 d25, d29, d30, #4
222 vext.8 d26, d30, d31, #4
224 vdup.8 d0, d14[0] ;second_pass filter parameters (d0-d5)
231 vmull.u8 q3, d27, d0 ;(src_ptr[-2] * vp8_filter[0])
234 vmull.u8 q5, d25, d5 ;(src_ptr[3] * vp8_filter[5])
237 vmlsl.u8 q3, d29, d4 ;-(src_ptr[2] * vp8_filter[4])
240 vmlsl.u8 q5, d23, d1 ;-(src_ptr[-1] * vp8_filter[1])
243 vmlal.u8 q3, d28, d2 ;(src_ptr[0] * vp8_filter[2])
246 vmlal.u8 q5, d24, d3 ;(src_ptr[1] * vp8_filter[3])
253 vqadd.s16 q5, q3 ;sum of all (src_data*filter_parameters)
256 vqrshrun.s16 d3, q5, #7 ;shift/round/saturate to u8
257 vqrshrun.s16 d4, q6, #7
259 vst1.32 {d3[0]}, [r4] ;store result
260 vst1.32 {d3[1]}, [r0]
261 vst1.32 {d4[0]}, [r1]
262 vst1.32 {d4[1]}, [r2]
267 ;---------------------
268 firstpass_filter4x4_only
269 vabs.s32 q12, q14 ;get abs(filer_parameters)
272 sub r0, r0, #2 ;go back 2 columns of src data
274 ;First pass: output_height lines x output_width columns (4x4)
275 vld1.u8 {q3}, [r0], r1 ;load first 4-line src data
276 vdup.8 d0, d24[0] ;first_pass filter (d0-d5)
277 vld1.u8 {q4}, [r0], r1
279 vld1.u8 {q5}, [r0], r1
281 vld1.u8 {q6}, [r0], r1
287 vext.8 d18, d6, d7, #5 ;construct src_ptr[3]
288 vext.8 d19, d8, d9, #5
289 vext.8 d20, d10, d11, #5
290 vext.8 d21, d12, d13, #5
292 vswp d7, d8 ;discard 2nd half data after src_ptr[3] is done
295 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[3])
297 vmull.u8 q7, d18, d5 ;(src_ptr[3] * vp8_filter[5])
300 vmov q4, q3 ;keep original src data in q4 q6
303 vzip.32 d6, d7 ;construct src_ptr[-2], and put 2-line data together
305 vshr.u64 q9, q4, #8 ;construct src_ptr[-1]
307 vmlal.u8 q7, d6, d0 ;+(src_ptr[-2] * vp8_filter[0])
310 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[-1])
312 vshr.u64 q3, q4, #32 ;construct src_ptr[2]
314 vmlsl.u8 q7, d18, d1 ;-(src_ptr[-1] * vp8_filter[1])
317 vzip.32 d6, d7 ;put 2-line data in 1 register (src_ptr[2])
319 vshr.u64 q9, q4, #16 ;construct src_ptr[0]
320 vshr.u64 q10, q6, #16
321 vmlsl.u8 q7, d6, d4 ;-(src_ptr[2] * vp8_filter[4])
324 vzip.32 d18, d19 ;put 2-line data in 1 register (src_ptr[0])
326 vshr.u64 q3, q4, #24 ;construct src_ptr[1]
328 vmlal.u8 q7, d18, d2 ;(src_ptr[0] * vp8_filter[2])
331 vzip.32 d6, d7 ;put 2-line data in 1 register (src_ptr[1])
333 vmull.u8 q9, d6, d3 ;(src_ptr[1] * vp8_filter[3])
334 vmull.u8 q10, d10, d3
340 vqadd.s16 q7, q9 ;sum of all (src_data*filter_parameters)
343 vqrshrun.s16 d27, q7, #7 ;shift/round/saturate to u8
344 vqrshrun.s16 d28, q8, #7
346 vst1.32 {d27[0]}, [r4] ;store result
347 vst1.32 {d27[1]}, [r0]
348 vst1.32 {d28[0]}, [r1]
349 vst1.32 {d28[1]}, [r2]
354 ;---------------------
355 secondpass_filter4x4_only
356 sub r0, r0, r1, lsl #1
357 add r3, r12, r3, lsl #5
359 vld1.32 {d27[0]}, [r0], r1 ;load src data
360 vld1.s32 {q5, q6}, [r3] ;load second_pass filter
361 vld1.32 {d27[1]}, [r0], r1
363 vld1.32 {d28[0]}, [r0], r1
365 vld1.32 {d28[1]}, [r0], r1
366 vdup.8 d0, d14[0] ;second_pass filter parameters (d0-d5)
367 vld1.32 {d29[0]}, [r0], r1
369 vld1.32 {d29[1]}, [r0], r1
371 vld1.32 {d30[0]}, [r0], r1
373 vld1.32 {d30[1]}, [r0], r1
375 vld1.32 {d31[0]}, [r0], r1
378 vext.8 d23, d27, d28, #4
379 vext.8 d24, d28, d29, #4
380 vext.8 d25, d29, d30, #4
381 vext.8 d26, d30, d31, #4
383 vmull.u8 q3, d27, d0 ;(src_ptr[-2] * vp8_filter[0])
386 vmull.u8 q5, d25, d5 ;(src_ptr[3] * vp8_filter[5])
389 vmlsl.u8 q3, d29, d4 ;-(src_ptr[2] * vp8_filter[4])
392 vmlsl.u8 q5, d23, d1 ;-(src_ptr[-1] * vp8_filter[1])
395 vmlal.u8 q3, d28, d2 ;(src_ptr[0] * vp8_filter[2])
398 vmlal.u8 q5, d24, d3 ;(src_ptr[1] * vp8_filter[3])
405 vqadd.s16 q5, q3 ;sum of all (src_data*filter_parameters)
408 vqrshrun.s16 d3, q5, #7 ;shift/round/saturate to u8
409 vqrshrun.s16 d4, q6, #7
411 vst1.32 {d3[0]}, [r4] ;store result
412 vst1.32 {d3[1]}, [r0]
413 vst1.32 {d4[0]}, [r1]
414 vst1.32 {d4[1]}, [r2]