1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2012 x264 project
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Jason Garrett-Glaser <darkshikari@gmail.com>
9 ;* Henrik Gramner <hengar-6@student.ltu.se>
11 ;* Permission to use, copy, modify, and/or distribute this software for any
12 ;* purpose with or without fee is hereby granted, provided that the above
13 ;* copyright notice and this permission notice appear in all copies.
15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 ;*****************************************************************************
24 ; This is a header file for the x264ASM assembly language, which uses
25 ; NASM/YASM syntax combined with a large number of macros to provide easy
26 ; abstraction between different calling conventions (x86_32, win64, linux64).
27 ; It also has various other useful features to simplify writing the kind of
28 ; DSP functions that are most often used in x264.
30 ; Unlike the rest of x264, this file is available under an ISC license, as it
31 ; has significant usefulness outside of x264 and we want it to be available
32 ; to the largest audience possible. Of course, if you modify it for your own
33 ; purposes to add a new feature, we strongly encourage contributing a patch
34 ; as this feature might be useful for others as well. Send patches or ideas
35 ; to x264-devel@videolan.org .
37 ; Local changes for libyuv:
38 ; remove %define program_name and references in labels
39 ; rename cpus to uppercase
44 %ifidn __OUTPUT_FORMAT__,win32
46 %elifidn __OUTPUT_FORMAT__,win64
54 %define mangle(x) _ %+ x
59 ; Name of the .rodata section.
60 ; Kludge: Something on OS X fails to align .rodata even given an align attribute,
61 ; so use a different read-only section.
62 %macro SECTION_RODATA 0-1 16
63 %ifidn __OUTPUT_FORMAT__,macho64
64 SECTION .text align=%1
65 %elifidn __OUTPUT_FORMAT__,macho
66 SECTION .text align=%1
68 %elifidn __OUTPUT_FORMAT__,aout
71 SECTION .rodata align=%1
75 ; aout does not support align=
76 %macro SECTION_TEXT 0-1 16
77 %ifidn __OUTPUT_FORMAT__,aout
80 SECTION .text align=%1
86 %elif ARCH_X86_64 == 0
87 ; x86_32 doesn't require PIC.
88 ; Some distros prefer shared objects to be PIC, but nothing breaks if
89 ; the code contains a few textrels, so we'll skip that complexity.
96 ; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
99 ; Macros to eliminate most code duplication between x86_32 and x86_64:
100 ; Currently this works only for leaf functions which load all their arguments
101 ; into registers at the start, and make no other use of the stack. Luckily that
102 ; covers most of x264's asm.
105 ; %1 = number of arguments. loads them from stack if needed.
106 ; %2 = number of registers used. pushes callee-saved regs if needed.
107 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
108 ; %4 = list of names to define to registers
109 ; PROLOGUE can also be invoked by adding the same options to cglobal
112 ; cglobal foo, 2,3,0, dst, src, tmp
113 ; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
115 ; TODO Some functions can use some args directly from the stack. If they're the
116 ; last args then you can just not declare them, but if they're in the middle
117 ; we need more flexible macro.
120 ; Pops anything that was pushed by PROLOGUE, and returns.
123 ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
124 ; which are slow when a normal ret follows a branch.
127 ; rN and rNq are the native-size register holding function argument N
128 ; rNd, rNw, rNb are dword, word, and byte size
129 ; rNh is the high 8 bits of the word size
130 ; rNm is the original location of arg N (a register or on the stack), dword
131 ; rNmp is native size
133 %macro DECLARE_REG 2-3
142 %elif ARCH_X86_64 ; memory
143 %define r%1m [rsp + stack_offset + %3]
144 %define r%1mp qword r %+ %1m
146 %define r%1m [esp + stack_offset + %3]
147 %define r%1mp dword r %+ %1m
152 %macro DECLARE_REG_SIZE 3
168 DECLARE_REG_SIZE ax, al, ah
169 DECLARE_REG_SIZE bx, bl, bh
170 DECLARE_REG_SIZE cx, cl, ch
171 DECLARE_REG_SIZE dx, dl, dh
172 DECLARE_REG_SIZE si, sil, null
173 DECLARE_REG_SIZE di, dil, null
174 DECLARE_REG_SIZE bp, bpl, null
176 ; t# defines for when per-arch register allocation is more complex than just function arguments
178 %macro DECLARE_REG_TMP 1-*
181 CAT_XDEFINE t, %%i, r%1
187 %macro DECLARE_REG_TMP_SIZE 0-*
189 %define t%1q t%1 %+ q
190 %define t%1d t%1 %+ d
191 %define t%1w t%1 %+ w
192 %define t%1h t%1 %+ h
193 %define t%1b t%1 %+ b
198 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
208 %assign stack_offset stack_offset+gprsize
213 %assign stack_offset stack_offset-gprsize
216 %macro PUSH_IF_USED 1-*
225 %macro POP_IF_USED 1-*
234 %macro LOAD_IF_USED 1-*
237 mov r%1, r %+ %1 %+ mp
246 %assign stack_offset stack_offset+(%2)
253 %assign stack_offset stack_offset-(%2)
263 %macro movsxdifnidn 2
275 %macro DEFINE_ARGS 0-*
279 CAT_UNDEF arg_name %+ %%i, q
280 CAT_UNDEF arg_name %+ %%i, d
281 CAT_UNDEF arg_name %+ %%i, w
282 CAT_UNDEF arg_name %+ %%i, h
283 CAT_UNDEF arg_name %+ %%i, b
284 CAT_UNDEF arg_name %+ %%i, m
285 CAT_UNDEF arg_name %+ %%i, mp
286 CAT_UNDEF arg_name, %%i
291 %xdefine %%stack_offset stack_offset
292 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
295 %xdefine %1q r %+ %%i %+ q
296 %xdefine %1d r %+ %%i %+ d
297 %xdefine %1w r %+ %%i %+ w
298 %xdefine %1h r %+ %%i %+ h
299 %xdefine %1b r %+ %%i %+ b
300 %xdefine %1m r %+ %%i %+ m
301 %xdefine %1mp r %+ %%i %+ mp
302 CAT_XDEFINE arg_name, %%i, %1
306 %xdefine stack_offset %%stack_offset
307 %assign n_arg_names %0
310 %if WIN64 ; Windows x64 ;=================================================
316 DECLARE_REG 4, R10, 40
317 DECLARE_REG 5, R11, 48
318 DECLARE_REG 6, rax, 56
319 DECLARE_REG 7, rdi, 64
320 DECLARE_REG 8, rsi, 72
321 DECLARE_REG 9, rbx, 80
322 DECLARE_REG 10, rbp, 88
323 DECLARE_REG 11, R12, 96
324 DECLARE_REG 12, R13, 104
325 DECLARE_REG 13, R14, 112
326 DECLARE_REG 14, R15, 120
328 %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names...
331 ASSERT regs_used >= num_args
332 ASSERT regs_used <= 15
333 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
335 %assign xmm_regs_used 0
339 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
343 %macro WIN64_SPILL_XMM 1
344 %assign xmm_regs_used %1
345 ASSERT xmm_regs_used <= 16
346 %if xmm_regs_used > 6
347 SUB rsp, (xmm_regs_used-6)*16+16
348 %assign %%i xmm_regs_used
349 %rep (xmm_regs_used-6)
351 movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i
356 %macro WIN64_RESTORE_XMM_INTERNAL 1
357 %if xmm_regs_used > 6
358 %assign %%i xmm_regs_used
359 %rep (xmm_regs_used-6)
361 movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)]
363 add %1, (xmm_regs_used-6)*16+16
367 %macro WIN64_RESTORE_XMM 1
368 WIN64_RESTORE_XMM_INTERNAL %1
369 %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16
370 %assign xmm_regs_used 0
373 %define has_epilogue regs_used > 7 || xmm_regs_used > 6 || mmsize == 32
376 WIN64_RESTORE_XMM_INTERNAL rsp
377 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
384 %elif ARCH_X86_64 ; *nix x64 ;=============================================
392 DECLARE_REG 6, rax, 8
393 DECLARE_REG 7, R10, 16
394 DECLARE_REG 8, R11, 24
395 DECLARE_REG 9, rbx, 32
396 DECLARE_REG 10, rbp, 40
397 DECLARE_REG 11, R12, 48
398 DECLARE_REG 12, R13, 56
399 DECLARE_REG 13, R14, 64
400 DECLARE_REG 14, R15, 72
402 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
405 ASSERT regs_used >= num_args
406 ASSERT regs_used <= 15
407 PUSH_IF_USED 9, 10, 11, 12, 13, 14
408 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
412 %define has_epilogue regs_used > 9 || mmsize == 32
415 POP_IF_USED 14, 13, 12, 11, 10, 9
422 %else ; X86_32 ;==============================================================
424 DECLARE_REG 0, eax, 4
425 DECLARE_REG 1, ecx, 8
426 DECLARE_REG 2, edx, 12
427 DECLARE_REG 3, ebx, 16
428 DECLARE_REG 4, esi, 20
429 DECLARE_REG 5, edi, 24
430 DECLARE_REG 6, ebp, 28
433 %macro DECLARE_ARG 1-*
435 %define r%1m [esp + stack_offset + 4*%1 + 4]
436 %define r%1mp dword r%1m
441 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
443 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
449 ASSERT regs_used >= num_args
450 PUSH_IF_USED 3, 4, 5, 6
451 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
455 %define has_epilogue regs_used > 3 || mmsize == 32
458 POP_IF_USED 6, 5, 4, 3
465 %endif ;======================================================================
468 %macro WIN64_SPILL_XMM 1
470 %macro WIN64_RESTORE_XMM 1
482 %macro TAIL_CALL 2 ; callee, is_nonadjacent
491 ;=============================================================================
492 ; arch-independent part
493 ;=============================================================================
495 %assign function_align 16
498 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
499 ; subsequent uses of the function name automatically refer to the mangled version.
500 ; Appends cpuflags to the function name if cpuflags has been specified.
501 %macro cglobal 1-2+ ; name, [PROLOGUE args]
503 cglobal_internal %1 %+ SUFFIX
505 cglobal_internal %1 %+ SUFFIX, %2
508 %macro cglobal_internal 1-2+
510 %xdefine %1 mangle(%1)
511 %xdefine %1.skip_prologue %1 %+ .skip_prologue
512 CAT_XDEFINE cglobaled_, %1, 1
514 %xdefine current_function %1
515 %ifidn __OUTPUT_FORMAT__,elf
516 global %1:function hidden
522 RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
523 %assign stack_offset 0
530 %xdefine %1 mangle(%1)
531 CAT_XDEFINE cglobaled_, %1, 1
535 ; like cextern, but without the prefix
536 %macro cextern_naked 1
537 %xdefine %1 mangle(%1)
538 CAT_XDEFINE cglobaled_, %1, 1
543 %xdefine %1 mangle(%1)
548 ; This is needed for ELF, otherwise the GNU linker assumes the stack is
549 ; executable by default.
550 %ifidn __OUTPUT_FORMAT__,elf
551 SECTION .note.GNU-stack noalloc noexec nowrite progbits
553 %ifidn __OUTPUT_FORMAT__,elf32
554 section .note.GNU-stack noalloc noexec nowrite progbits
556 %ifidn __OUTPUT_FORMAT__,elf64
557 section .note.GNU-stack noalloc noexec nowrite progbits
562 %assign cpuflags_MMX (1<<0)
563 %assign cpuflags_MMX2 (1<<1) | cpuflags_MMX
564 %assign cpuflags_3dnow (1<<2) | cpuflags_MMX
565 %assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow
566 %assign cpuflags_SSE (1<<4) | cpuflags_MMX2
567 %assign cpuflags_SSE2 (1<<5) | cpuflags_SSE
568 %assign cpuflags_SSE2slow (1<<6) | cpuflags_SSE2
569 %assign cpuflags_SSE3 (1<<7) | cpuflags_SSE2
570 %assign cpuflags_SSSE3 (1<<8) | cpuflags_SSE3
571 %assign cpuflags_SSE4 (1<<9) | cpuflags_SSSE3
572 %assign cpuflags_SSE42 (1<<10)| cpuflags_SSE4
573 %assign cpuflags_AVX (1<<11)| cpuflags_SSE42
574 %assign cpuflags_xop (1<<12)| cpuflags_AVX
575 %assign cpuflags_fma4 (1<<13)| cpuflags_AVX
576 %assign cpuflags_AVX2 (1<<14)| cpuflags_AVX
577 %assign cpuflags_fma3 (1<<15)| cpuflags_AVX
579 %assign cpuflags_cache32 (1<<16)
580 %assign cpuflags_cache64 (1<<17)
581 %assign cpuflags_slowctz (1<<18)
582 %assign cpuflags_lzcnt (1<<19)
583 %assign cpuflags_misalign (1<<20)
584 %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
585 %assign cpuflags_atom (1<<22)
586 %assign cpuflags_bmi1 (1<<23)
587 %assign cpuflags_bmi2 (1<<24)|cpuflags_bmi1
588 %assign cpuflags_tbm (1<<25)|cpuflags_bmi1
590 %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
591 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
593 ; Takes up to 2 cpuflags from the above list.
594 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
595 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
596 %macro INIT_CPUFLAGS 0-2
599 %assign cpuflags cpuflags_%1
601 %xdefine cpuname %1_%2
602 %assign cpuflags cpuflags | cpuflags_%2
604 %xdefine SUFFIX _ %+ cpuname
606 %assign AVX_enabled 1
608 %if mmsize == 16 && notcpuflag(SSE2)
611 %define movnta movntps
636 %assign AVX_enabled 0
637 %define RESET_MM_PERMUTATION INIT_MMX %1
643 %define movnta movntq
646 CAT_XDEFINE m, %%i, mm %+ %%i
647 CAT_XDEFINE nmm, %%i, %%i
659 %assign AVX_enabled 0
660 %define RESET_MM_PERMUTATION INIT_XMM %1
664 %define num_mmregs 16
669 %define movnta movntdq
672 CAT_XDEFINE m, %%i, xmm %+ %%i
673 CAT_XDEFINE nxmm, %%i, %%i
680 %assign AVX_enabled 1
681 %define RESET_MM_PERMUTATION INIT_YMM %1
685 %define num_mmregs 16
690 %define movnta vmovntps
693 CAT_XDEFINE m, %%i, ymm %+ %%i
694 CAT_XDEFINE nymm, %%i, %%i
702 ; I often want to use macros that permute their arguments. e.g. there's no
703 ; efficient way to implement butterfly or transpose or dct without swapping some
706 ; I would like to not have to manually keep track of the permutations:
707 ; If I insert a permutation in the middle of a function, it should automatically
708 ; change everything that follows. For more complex macros I may also have multiple
709 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
711 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
712 ; permutes its arguments. It's equivalent to exchanging the contents of the
713 ; registers, except that this way you exchange the register names instead, so it
714 ; doesn't cost any cycles.
716 %macro PERMUTE 2-* ; takes a list of pairs to swap
731 %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
737 CAT_XDEFINE n, m%1, %1
738 CAT_XDEFINE n, m%2, %2
740 ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
741 ; Be careful using this mode in nested macros though, as in some cases there may be
742 ; other copies of m# that have already been dereferenced and don't get updated correctly.
743 %xdefine %%n1 n %+ %1
744 %xdefine %%n2 n %+ %2
745 %xdefine tmp m %+ %%n1
746 CAT_XDEFINE m, %%n1, m %+ %%n2
747 CAT_XDEFINE m, %%n2, tmp
748 CAT_XDEFINE n, m %+ %%n1, %%n1
749 CAT_XDEFINE n, m %+ %%n2, %%n2
756 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
757 ; calls to that function will automatically load the permutation, so values can
758 ; be returned in mmregs.
759 %macro SAVE_MM_PERMUTATION 0-1
763 %xdefine %%f current_function %+ _m
767 CAT_XDEFINE %%f, %%i, m %+ %%i
772 %macro LOAD_MM_PERMUTATION 1 ; name to load from
776 CAT_XDEFINE m, %%i, %1_m %+ %%i
777 CAT_XDEFINE n, m %+ %%i, %%i
783 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
785 call_internal %1, %1 %+ SUFFIX
787 %macro call_internal 2
795 LOAD_MM_PERMUTATION %%i
798 ; Substitutions that reduce instruction size but are functionally equivalent
823 ;=============================================================================
824 ; AVX abstraction layer
825 ;=============================================================================
830 CAT_XDEFINE sizeofmm, i, 8
832 CAT_XDEFINE sizeofxmm, i, 16
833 CAT_XDEFINE sizeofymm, i, 32
838 %macro CHECK_AVX_INSTR_EMU 3-*
843 %error non-AVX emulation of ``%%opcode'' is not supported
850 ;%2 == 1 if float, 0 if int
851 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
852 ;%4 == number of operands given
854 %macro RUN_AVX_INSTR 6-7+
856 %define %%sizeofreg sizeof%6
858 %define %%sizeofreg sizeof%5
860 %define %%sizeofreg mmsize
870 %define %%regmov movq
872 %define %%regmov movaps
874 %define %%regmov movdqa
879 %if AVX_enabled && %%sizeofreg==16
882 CHECK_AVX_INSTR_EMU {%1 %5, %6, %7}, %5, %7
897 ; 3arg AVX ops with a memory arg can only have it in src2,
898 ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
899 ; So, if the op is symmetric and the wrong one is memory, swap them.
900 %macro RUN_AVX_INSTR1 8
911 %if %%swap && %3 == 0 && %8 == 1
912 RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
914 RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
919 ;%2 == 1 if float, 0 if int
920 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
921 ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
923 %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
925 RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
927 RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
929 RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
931 RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
936 AVX_INSTR addpd, 1, 0, 1
937 AVX_INSTR addps, 1, 0, 1
938 AVX_INSTR addsd, 1, 0, 1
939 AVX_INSTR addss, 1, 0, 1
940 AVX_INSTR addsubpd, 1, 0, 0
941 AVX_INSTR addsubps, 1, 0, 0
942 AVX_INSTR andpd, 1, 0, 1
943 AVX_INSTR andps, 1, 0, 1
944 AVX_INSTR andnpd, 1, 0, 0
945 AVX_INSTR andnps, 1, 0, 0
946 AVX_INSTR blendpd, 1, 0, 0
947 AVX_INSTR blendps, 1, 0, 0
948 AVX_INSTR blendvpd, 1, 0, 0
949 AVX_INSTR blendvps, 1, 0, 0
950 AVX_INSTR cmppd, 1, 0, 0
951 AVX_INSTR cmpps, 1, 0, 0
952 AVX_INSTR cmpsd, 1, 0, 0
953 AVX_INSTR cmpss, 1, 0, 0
954 AVX_INSTR cvtdq2ps, 1, 0, 0
955 AVX_INSTR cvtps2dq, 1, 0, 0
956 AVX_INSTR divpd, 1, 0, 0
957 AVX_INSTR divps, 1, 0, 0
958 AVX_INSTR divsd, 1, 0, 0
959 AVX_INSTR divss, 1, 0, 0
960 AVX_INSTR dppd, 1, 1, 0
961 AVX_INSTR dpps, 1, 1, 0
962 AVX_INSTR haddpd, 1, 0, 0
963 AVX_INSTR haddps, 1, 0, 0
964 AVX_INSTR hsubpd, 1, 0, 0
965 AVX_INSTR hsubps, 1, 0, 0
966 AVX_INSTR maxpd, 1, 0, 1
967 AVX_INSTR maxps, 1, 0, 1
968 AVX_INSTR maxsd, 1, 0, 1
969 AVX_INSTR maxss, 1, 0, 1
970 AVX_INSTR minpd, 1, 0, 1
971 AVX_INSTR minps, 1, 0, 1
972 AVX_INSTR minsd, 1, 0, 1
973 AVX_INSTR minss, 1, 0, 1
974 AVX_INSTR movhlps, 1, 0, 0
975 AVX_INSTR movlhps, 1, 0, 0
976 AVX_INSTR movsd, 1, 0, 0
977 AVX_INSTR movss, 1, 0, 0
978 AVX_INSTR mpsadbw, 0, 1, 0
979 AVX_INSTR mulpd, 1, 0, 1
980 AVX_INSTR mulps, 1, 0, 1
981 AVX_INSTR mulsd, 1, 0, 1
982 AVX_INSTR mulss, 1, 0, 1
983 AVX_INSTR orpd, 1, 0, 1
984 AVX_INSTR orps, 1, 0, 1
985 AVX_INSTR pabsb, 0, 0, 0
986 AVX_INSTR pabsw, 0, 0, 0
987 AVX_INSTR pabsd, 0, 0, 0
988 AVX_INSTR packsswb, 0, 0, 0
989 AVX_INSTR packssdw, 0, 0, 0
990 AVX_INSTR packuswb, 0, 0, 0
991 AVX_INSTR packusdw, 0, 0, 0
992 AVX_INSTR paddb, 0, 0, 1
993 AVX_INSTR paddw, 0, 0, 1
994 AVX_INSTR paddd, 0, 0, 1
995 AVX_INSTR paddq, 0, 0, 1
996 AVX_INSTR paddsb, 0, 0, 1
997 AVX_INSTR paddsw, 0, 0, 1
998 AVX_INSTR paddusb, 0, 0, 1
999 AVX_INSTR paddusw, 0, 0, 1
1000 AVX_INSTR palignr, 0, 1, 0
1001 AVX_INSTR pand, 0, 0, 1
1002 AVX_INSTR pandn, 0, 0, 0
1003 AVX_INSTR pavgb, 0, 0, 1
1004 AVX_INSTR pavgw, 0, 0, 1
1005 AVX_INSTR pblendvb, 0, 0, 0
1006 AVX_INSTR pblendw, 0, 1, 0
1007 AVX_INSTR pcmpestri, 0, 0, 0
1008 AVX_INSTR pcmpestrm, 0, 0, 0
1009 AVX_INSTR pcmpistri, 0, 0, 0
1010 AVX_INSTR pcmpistrm, 0, 0, 0
1011 AVX_INSTR pcmpeqb, 0, 0, 1
1012 AVX_INSTR pcmpeqw, 0, 0, 1
1013 AVX_INSTR pcmpeqd, 0, 0, 1
1014 AVX_INSTR pcmpeqq, 0, 0, 1
1015 AVX_INSTR pcmpgtb, 0, 0, 0
1016 AVX_INSTR pcmpgtw, 0, 0, 0
1017 AVX_INSTR pcmpgtd, 0, 0, 0
1018 AVX_INSTR pcmpgtq, 0, 0, 0
1019 AVX_INSTR phaddw, 0, 0, 0
1020 AVX_INSTR phaddd, 0, 0, 0
1021 AVX_INSTR phaddsw, 0, 0, 0
1022 AVX_INSTR phsubw, 0, 0, 0
1023 AVX_INSTR phsubd, 0, 0, 0
1024 AVX_INSTR phsubsw, 0, 0, 0
1025 AVX_INSTR pmaddwd, 0, 0, 1
1026 AVX_INSTR pmaddubsw, 0, 0, 0
1027 AVX_INSTR pmaxsb, 0, 0, 1
1028 AVX_INSTR pmaxsw, 0, 0, 1
1029 AVX_INSTR pmaxsd, 0, 0, 1
1030 AVX_INSTR pmaxub, 0, 0, 1
1031 AVX_INSTR pmaxuw, 0, 0, 1
1032 AVX_INSTR pmaxud, 0, 0, 1
1033 AVX_INSTR pminsb, 0, 0, 1
1034 AVX_INSTR pminsw, 0, 0, 1
1035 AVX_INSTR pminsd, 0, 0, 1
1036 AVX_INSTR pminub, 0, 0, 1
1037 AVX_INSTR pminuw, 0, 0, 1
1038 AVX_INSTR pminud, 0, 0, 1
1039 AVX_INSTR pmovmskb, 0, 0, 0
1040 AVX_INSTR pmulhuw, 0, 0, 1
1041 AVX_INSTR pmulhrsw, 0, 0, 1
1042 AVX_INSTR pmulhw, 0, 0, 1
1043 AVX_INSTR pmullw, 0, 0, 1
1044 AVX_INSTR pmulld, 0, 0, 1
1045 AVX_INSTR pmuludq, 0, 0, 1
1046 AVX_INSTR pmuldq, 0, 0, 1
1047 AVX_INSTR por, 0, 0, 1
1048 AVX_INSTR psadbw, 0, 0, 1
1049 AVX_INSTR pshufb, 0, 0, 0
1050 AVX_INSTR pshufd, 0, 1, 0
1051 AVX_INSTR pshufhw, 0, 1, 0
1052 AVX_INSTR pshuflw, 0, 1, 0
1053 AVX_INSTR psignb, 0, 0, 0
1054 AVX_INSTR psignw, 0, 0, 0
1055 AVX_INSTR psignd, 0, 0, 0
1056 AVX_INSTR psllw, 0, 0, 0
1057 AVX_INSTR pslld, 0, 0, 0
1058 AVX_INSTR psllq, 0, 0, 0
1059 AVX_INSTR pslldq, 0, 0, 0
1060 AVX_INSTR psraw, 0, 0, 0
1061 AVX_INSTR psrad, 0, 0, 0
1062 AVX_INSTR psrlw, 0, 0, 0
1063 AVX_INSTR psrld, 0, 0, 0
1064 AVX_INSTR psrlq, 0, 0, 0
1065 AVX_INSTR psrldq, 0, 0, 0
1066 AVX_INSTR psubb, 0, 0, 0
1067 AVX_INSTR psubw, 0, 0, 0
1068 AVX_INSTR psubd, 0, 0, 0
1069 AVX_INSTR psubq, 0, 0, 0
1070 AVX_INSTR psubsb, 0, 0, 0
1071 AVX_INSTR psubsw, 0, 0, 0
1072 AVX_INSTR psubusb, 0, 0, 0
1073 AVX_INSTR psubusw, 0, 0, 0
1074 AVX_INSTR ptest, 0, 0, 0
1075 AVX_INSTR punpckhbw, 0, 0, 0
1076 AVX_INSTR punpckhwd, 0, 0, 0
1077 AVX_INSTR punpckhdq, 0, 0, 0
1078 AVX_INSTR punpckhqdq, 0, 0, 0
1079 AVX_INSTR punpcklbw, 0, 0, 0
1080 AVX_INSTR punpcklwd, 0, 0, 0
1081 AVX_INSTR punpckldq, 0, 0, 0
1082 AVX_INSTR punpcklqdq, 0, 0, 0
1083 AVX_INSTR pxor, 0, 0, 1
1084 AVX_INSTR shufps, 1, 1, 0
1085 AVX_INSTR subpd, 1, 0, 0
1086 AVX_INSTR subps, 1, 0, 0
1087 AVX_INSTR subsd, 1, 0, 0
1088 AVX_INSTR subss, 1, 0, 0
1089 AVX_INSTR unpckhpd, 1, 0, 0
1090 AVX_INSTR unpckhps, 1, 0, 0
1091 AVX_INSTR unpcklpd, 1, 0, 0
1092 AVX_INSTR unpcklps, 1, 0, 0
1093 AVX_INSTR xorpd, 1, 0, 1
1094 AVX_INSTR xorps, 1, 0, 1
1096 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1097 AVX_INSTR pfadd, 1, 0, 1
1098 AVX_INSTR pfsub, 1, 0, 0
1099 AVX_INSTR pfmul, 1, 0, 1
1101 ; base-4 constants for shuffles
1104 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1106 CAT_XDEFINE q000, j, i
1108 CAT_XDEFINE q00, j, i
1110 CAT_XDEFINE q0, j, i
1120 %macro %1 4-7 %1, %2, %3
1130 FMA_INSTR pmacsdd, pmulld, paddd
1131 FMA_INSTR pmacsww, pmullw, paddw
1132 FMA_INSTR pmadcswd, pmaddwd, paddd
1134 ; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf.
1135 ; This lets us use tzcnt without bumping the yasm version requirement yet.
1136 %define tzcnt rep bsf