1 /**************************************************************************
5 Copyright 2014 Samsung Electronics co., Ltd. All Rights Reserved.
7 Contact: SooChan Lim <sc1.lim@samsung.com>, Sangjin Lee <lsj119@samsung.com>
8 Boram Park <boram1288.park@samsung.com>, Changyeon Lee <cyeon.lee@samsung.com>
10 Permission is hereby granted, free of charge, to any person obtaining a
11 copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sub license, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial portions
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
23 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
25 IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
26 ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
27 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
28 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
32 #ifndef _TBM_SURFACE_QUEUE_H_
33 #define _TBM_SURFACE_QUEUE_H_
35 #include <tbm_surface.h>
38 TBM_SURFACE_QUEUE_ERROR_NONE = 0, /**< Successful */
39 TBM_SURFACE_QUEUE_ERROR_INVALID_SURFACE = -1,
40 TBM_SURFACE_QUEUE_ERROR_INVALID_QUEUE = -2,
41 TBM_SURFACE_QUEUE_ERROR_EMPTY = -3,
42 TBM_SURFACE_QUEUE_ERROR_INVALID_PARAMETER = -4,
43 TBM_SURFACE_QUEUE_ERROR_SURFACE_ALLOC_FAILED = -5,
44 TBM_SURFACE_QUEUE_ERROR_ALREADY_EXIST = -6,
45 TBM_SURFACE_QUEUE_ERROR_UNKNOWN_SURFACE = -7,
46 } tbm_surface_queue_error_e;
49 TBM_SURFACE_QUEUE_TRACE_NONE = 0, /**< Successful */
50 TBM_SURFACE_QUEUE_TRACE_DEQUEUE = 1,
51 TBM_SURFACE_QUEUE_TRACE_ENQUEUE = 2,
52 TBM_SURFACE_QUEUE_TRACE_ACQUIRE = 3,
53 TBM_SURFACE_QUEUE_TRACE_RELEASE = 4,
54 TBM_SURFACE_QUEUE_TRACE_CANCEL_DEQUEUE = 5,
55 TBM_SURFACE_QUEUE_TRACE_CANCEL_ACQUIRE = 6,
56 } tbm_surface_queue_trace;
59 TBM_SURFACE_QUEUE_MODE_NONE = 0,
61 * GUARANTEE_CYCLE mode must do enqueue/aquire/release or cancel_dequeue
62 * for the tbm_surface which is dequeued before tbm_surface_queue is reset.
64 TBM_SURFACE_QUEUE_MODE_GUARANTEE_CYCLE = (1 << 0),
65 } tbm_surface_queue_mode;
67 typedef struct _tbm_surface_queue *tbm_surface_queue_h;
69 typedef void (*tbm_surface_queue_notify_cb)(tbm_surface_queue_h surface_queue,
72 typedef tbm_surface_h(*tbm_surface_alloc_cb)(tbm_surface_queue_h surface_queue,
75 typedef void (*tbm_surface_free_cb)(tbm_surface_queue_h surface_queue,
76 void *data, tbm_surface_h surface);
78 typedef void (*tbm_surface_queue_trace_cb)(tbm_surface_queue_h surface_queue,
79 tbm_surface_h surface, tbm_surface_queue_trace trace, void *data);
85 tbm_surface_queue_error_e tbm_surface_queue_enqueue(
86 tbm_surface_queue_h surface_queue, tbm_surface_h surface);
88 tbm_surface_queue_error_e tbm_surface_queue_cancel_dequeue(
89 tbm_surface_queue_h surface_queue, tbm_surface_h surface);
91 tbm_surface_queue_error_e tbm_surface_queue_dequeue(
92 tbm_surface_queue_h surface_queue, tbm_surface_h *surface);
94 tbm_surface_queue_error_e tbm_surface_queue_release(
95 tbm_surface_queue_h surface_queue, tbm_surface_h surface);
97 tbm_surface_queue_error_e tbm_surface_queue_cancel_acquire(
98 tbm_surface_queue_h surface_queue, tbm_surface_h surface);
100 tbm_surface_queue_error_e tbm_surface_queue_acquire(
101 tbm_surface_queue_h surface_queue, tbm_surface_h *surface);
103 int tbm_surface_queue_can_dequeue(tbm_surface_queue_h surface_queue, int wait);
105 int tbm_surface_queue_can_acquire(tbm_surface_queue_h surface_queue, int wait);
107 void tbm_surface_queue_destroy(tbm_surface_queue_h surface_queue);
109 int tbm_surface_queue_get_width(tbm_surface_queue_h surface_queue);
111 int tbm_surface_queue_get_height(tbm_surface_queue_h surface_queue);
113 int tbm_surface_queue_get_format(tbm_surface_queue_h surface_queue);
115 int tbm_surface_queue_get_size(tbm_surface_queue_h surface_queue);
117 tbm_surface_queue_error_e tbm_surface_queue_reset(
118 tbm_surface_queue_h surface_queue, int width, int height, int format);
120 tbm_surface_queue_error_e tbm_surface_queue_set_size(
121 tbm_surface_queue_h surface_queue, int queue_size, int flush);
123 tbm_surface_queue_error_e tbm_surface_queue_flush(tbm_surface_queue_h surface_queue);
124 tbm_surface_queue_error_e tbm_surface_queue_free_flush(tbm_surface_queue_h surface_queue);
126 tbm_surface_queue_error_e tbm_surface_queue_notify_reset(tbm_surface_queue_h surface_queue);
128 tbm_surface_queue_error_e tbm_surface_queue_add_reset_cb(
129 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb reset_cb,
132 tbm_surface_queue_error_e tbm_surface_queue_remove_reset_cb(
133 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb reset_cb,
136 tbm_surface_queue_error_e tbm_surface_queue_add_destroy_cb(
137 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb destroy_cb,
140 tbm_surface_queue_error_e tbm_surface_queue_remove_destroy_cb(
141 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb destroy_cb,
144 tbm_surface_queue_error_e tbm_surface_queue_add_dequeuable_cb(
145 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb dequeuable_cb,
148 tbm_surface_queue_error_e tbm_surface_queue_remove_dequeuable_cb(
149 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb dequeuable_cb,
152 tbm_surface_queue_error_e tbm_surface_queue_add_dequeue_cb(
153 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb dequeue_cb,
156 tbm_surface_queue_error_e tbm_surface_queue_remove_dequeue_cb(
157 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb dequeue_cb,
160 tbm_surface_queue_error_e tbm_surface_queue_add_can_dequeue_cb(
161 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb can_dequeue_cb,
164 tbm_surface_queue_error_e tbm_surface_queue_remove_can_dequeue_cb(
165 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb can_dequeue_cb,
168 tbm_surface_queue_error_e tbm_surface_queue_add_acquirable_cb(
169 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb acquirable_cb,
172 tbm_surface_queue_error_e tbm_surface_queue_remove_acquirable_cb(
173 tbm_surface_queue_h surface_queue, tbm_surface_queue_notify_cb acquirable_cb,
176 tbm_surface_queue_error_e tbm_surface_queue_add_trace_cb(
177 tbm_surface_queue_h surface_queue, tbm_surface_queue_trace_cb trace_cb,
180 tbm_surface_queue_error_e tbm_surface_queue_remove_trace_cb(
181 tbm_surface_queue_h surface_queue, tbm_surface_queue_trace_cb trace_cb,
184 tbm_surface_queue_error_e tbm_surface_queue_set_alloc_cb(
185 tbm_surface_queue_h surface_queue,
186 tbm_surface_alloc_cb alloc_cb,
187 tbm_surface_free_cb free_cb,
190 tbm_surface_queue_error_e tbm_surface_queue_get_surfaces(
191 tbm_surface_queue_h surface_queue,
192 tbm_surface_h *surfaces, int *num);
194 tbm_surface_queue_error_e tbm_surface_queue_get_trace_surface_num(
195 tbm_surface_queue_h surface_queue, tbm_surface_queue_trace trace, int *num);
197 tbm_surface_queue_error_e tbm_surface_queue_set_modes(
198 tbm_surface_queue_h surface_queue, int modes);
200 /*The functions of queue factory*/
201 tbm_surface_queue_h tbm_surface_queue_create(int queue_size, int width,
202 int height, int format, int flags);
203 tbm_surface_queue_h tbm_surface_queue_sequence_create(int queue_size, int width,
204 int height, int format, int flags);
209 #endif /* _TBM_SURFACE_H_ */