2 * Copyright © <2010>, Intel Corporation.
4 * This program is licensed under the terms and conditions of the
5 * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
6 * http://www.opensource.org/licenses/eclipse-1.0.php.
9 // Modual name: IntraFrame.asm
11 // Make intra predition estimation for Intra frame
15 // Now, begin source code....
22 mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1};
23 mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1};
29 mul (2) tmp_reg0.8<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* Source = (x, y) * 16 */
32 mul (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1};
33 add (1) tmp_reg0.0<1>:W tmp_reg0.0<2,2,1>:W -16:W {align1}; /* Reference = (x-16,y-12)-(x+32,y+24) */
34 add (1) tmp_reg0.2<1>:W tmp_reg0.2<2,2,1>:W -12:W {align1};
36 mov (1) tmp_reg0.0<1>:W -16:W {align1} ; /* Reference = (x-16,y-12)-(x+32,y+24) */
37 mov (1) tmp_reg0.2<1>:W -12:W {align1} ;
40 mov (1) tmp_reg0.12<1>:UD INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER:UD {align1}; /* 16x16 Source, 1/4 pixel, harr */
43 mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
44 mov (1) tmp_reg0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */
45 mov (8) vme_msg_0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1};
48 mov (1) tmp_reg1.4<1>:UD MAX_NUM_MV:UD {align1}; /* Default value MAX 32 MVs */
49 mov (1) tmp_reg1.8<1>:UD SEARCH_PATH_LEN:UD {align1};
51 mov (8) vme_msg_1<1>:UD tmp_reg1.0<8,8,1>:UD {align1};
54 mov (8) vme_msg_2<1>:UD 0x0:UD {align1};
57 mov (8) vme_msg_3<1>:UD 0x0:UD {align1};
60 mov (8) vme_msg_4<1>:UD 0x0:UD {align1};
70 VME_MESSAGE_TYPE_INTER
73 rlen vme_inter_wb_length
77 * Oword Block Write message
79 mul (1) tmp_reg3.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1};
80 add (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1};
81 mul (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD 0x4:UD {align1};
82 mov (1) tmp_reg3.20<1>:UB thread_id_ub {align1}; /* dispatch id */
83 mov (8) msg_reg0.0<1>:UD tmp_reg3.0<8,8,1>:UD {align1};
86 mov (2) tmp_reg3.0<1>:UW vme_wb1.0<2,2,1>:UB {align1};
87 add (1) tmp_reg3.0<1>:W tmp_reg3.0<2,2,1>:W -64:W {align1};
88 add (1) tmp_reg3.2<1>:W tmp_reg3.2<2,2,1>:W -48:W {align1};
90 mov (2) tmp_reg3.0<1>:UW vme_wb1.0<2,2,1>:B {align1};
93 mov (8) msg_reg1.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1};
95 mov (8) msg_reg2.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1};
97 /* bind index 3, write 4 oword, msg type: 8(OWord Block Write) */
107 OBW_WRITE_COMMIT_CATEGORY,
117 mov (8) msg_reg0<1>:UD r0<8,8,1>:UD {align1};
118 send (16) msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};