src/shaders/vme/gen7_batchbuffer_header.inc

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Xiang Haihao <haihao.xiang@intel.com>
  25  */
  26
  27 define(`BIND_IDX_OUTPUT',               `0')
  28 define(`BIND_IDX_VME',                  `1')
  29 define(`BIND_IDX_VME_REF0',             `2')
  30 define(`BIND_IDX_VME_REF1',             `3')
  31 define(`BIND_IDX_INEP',                 `4')
  32 define(`BIND_IDX_VME_BATCHBUFFER',      `5')
  33
  34 define(`OBW_CACHE_TYPE',                `10')
  35
  36 define(`OBW_MESSAGE_TYPE',              `8')
  37
  38 define(`OBW_BIND_IDX',                  `BIND_IDX_VME_BATCHBUFFER')
  39
  40 define(`OBW_CONTROL_0',                 `0')    /* 1 OWord, low 128 bits */
  41 define(`OBW_CONTROL_1',                 `1')    /* 1 OWord, high 128 bits */
  42 define(`OBW_CONTROL_2',                 `2')    /* 2 OWords */
  43 define(`OBW_CONTROL_3',                 `3')    /* 4 OWords */
  44 define(`OBW_CONTROL_4',                 `4')    /* 8 OWords */
  45
  46 define(`OBW_WRITE_COMMIT_CATEGORY',     `0')    /* category on Ivybridge */
  47
  48 define(`OBW_HEADER_PRESENT',            `1')
  49
  50 define(`CMD_MEDIA_OBJECT',              `0x71000006:UD')
  51 define(`MI_BATCH_BUFFER_END',           `0x05000000:UD')
  52
  53 /* GRF registers
  54  * r0 header
  55  * r1~r4 constant buffer (reserved)
  56  * r5 inline data
  57  * r6~r7 reserved
  58  * r8~r15 temporary registers
  59  * r16 write back of Oword Block Write
  60  */
  61 /*
  62  * GRF 0 -- header
  63  */
  64 define(`thread_id_ub',          `r0.20<0,1,0>:UB')  /* thread id in payload */
  65
  66 /*
  67  * GRF 1~4 -- Constant Buffer (reserved)
  68  */
  69
  70 /*
  71  * GRF 5 -- inline data
  72  */
  73 define(`inline_reg0',           `r5')
  74 define(`width_in_mb',           `inline_reg0.0') /* the picture width in macroblocks */
  75 define(`transform_8x8_ub',      `inline_reg0.2') /* transform_8x8 flag */
  76 define(`mtype_ub',              `inline_reg0.3') /* 0: INTRA, 1: INTER */
  77 define(`mb_x',                  `inline_reg0.4')
  78 define(`mb_y',                  `inline_reg0.5')
  79 define(`mb_xy',                 `inline_reg0.4')
  80 define(`total_mbs',             `inline_reg0.6') /* the number of macroblock commands
  81                                                   * being processed by the kernel
  82                                                   */
  83 define(`last_object',           `inline_reg0.8') /* the last object flag */
  84 /*
  85  * GRF 8~15 -- temporary registers
  86  */
  87 define(`tmp_reg0',              `r8')
  88 define(`tmp_reg1',              `r9')
  89 define(`tmp_reg2',              `r10')
  90 define(`tmp_reg3',              `r11')
  91 define(`tmp_reg4',              `r12')
  92 define(`tmp_reg5',              `r13')
  93 define(`tmp_reg6',              `r14')
  94 define(`tmp_reg7',              `r15')
  95
  96 /*
  97  * GRF 16
  98  */
  99 define(`media_object_ud',       `r16.0')
 100 define(`media_object0_ud',      `r16.0')
 101 define(`media_object1_ud',      `r16.4')
 102 define(`media_object2_ud',      `r16.8')
 103 define(`media_object3_ud',      `r16.12')
 104 define(`media_object4_ud',      `r16.16')
 105 define(`media_object5_ud',      `r16.20')
 106 define(`media_object6_ud',      `r16.24')
 107 define(`media_object6_xy',      `r16.24')
 108 define(`media_object6_width',   `r16.26')
 109 define(`media_object7_ud',      `r16.28')
 110
 111 /*
 112  * GRF 17
 113  */
 114 define(`remainder_cmds',        `r17.0')
 115
 116 /*
 117  * GRF 16 write back for Oword Block Write message
 118  */
 119
 120 /*
 121  * write commit is removed on Ivybridge
 122  */
 123 define(`obw_wb',                `null<1>:W')
 124 define(`obw_wb_length',         `0')
 125
 126
 127 /*
 128  * Message Payload registers
 129  */
 130 define(`msg_ind',               `64')
 131 define(`msg_reg0',              `g64')
 132 define(`msg_reg1',              `g65')
 133 define(`msg_reg2',              `g66')
 134 define(`msg_reg3',              `g67')
 135 define(`msg_reg4',              `g68')
 136 define(`msg_reg5',              `g69')
 137 define(`msg_reg6',              `g70')
 138 define(`msg_reg7',              `g71')
 139 define(`msg_reg8',              `g72')