1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved.
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5 // modification, are permitted provided that the following conditions
8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer.
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22 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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24 // COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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26 // (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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30 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
31 // OF THE POSSIBILITY OF SUCH DAMAGE.
33 // The original source code covered by the above license above has been modified
34 // significantly by Google Inc.
35 // Copyright 2014 the V8 project authors. All rights reserved.
37 #ifndef V8_PPC_ASSEMBLER_PPC_INL_H_
38 #define V8_PPC_ASSEMBLER_PPC_INL_H_
40 #include "src/ppc/assembler-ppc.h"
42 #include "src/assembler.h"
43 #include "src/debug.h"
50 bool CpuFeatures::SupportsCrankshaft() { return true; }
53 void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
54 // absolute code pointer inside code object moves with the code object.
55 if (IsInternalReference(rmode_)) {
57 Address target = Memory::Address_at(pc_);
58 Memory::Address_at(pc_) = target + delta;
61 DCHECK(IsInternalReferenceEncoded(rmode_));
62 Address target = Assembler::target_address_at(pc_, host_);
63 Assembler::set_target_address_at(pc_, host_, target + delta,
69 Address RelocInfo::target_internal_reference() {
70 if (IsInternalReference(rmode_)) {
72 return Memory::Address_at(pc_);
75 DCHECK(IsInternalReferenceEncoded(rmode_));
76 return Assembler::target_address_at(pc_, host_);
81 Address RelocInfo::target_internal_reference_address() {
82 DCHECK(IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_));
83 return reinterpret_cast<Address>(pc_);
87 Address RelocInfo::target_address() {
88 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
89 return Assembler::target_address_at(pc_, host_);
93 Address RelocInfo::target_address_address() {
94 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) ||
95 rmode_ == EMBEDDED_OBJECT || rmode_ == EXTERNAL_REFERENCE);
97 if (FLAG_enable_embedded_constant_pool &&
98 Assembler::IsConstantPoolLoadStart(pc_)) {
99 // We return the PC for ool constant pool since this function is used by the
100 // serializer and expects the address to reside within the code object.
101 return reinterpret_cast<Address>(pc_);
104 // Read the address of the word containing the target_address in an
105 // instruction stream.
106 // The only architecture-independent user of this function is the serializer.
107 // The serializer uses it to find out how many raw bytes of instruction to
108 // output before the next target.
109 // For an instruction like LIS/ORI where the target bits are mixed into the
110 // instruction bits, the size of the target will be zero, indicating that the
111 // serializer should not step forward in memory after a target is resolved
113 return reinterpret_cast<Address>(pc_);
117 Address RelocInfo::constant_pool_entry_address() {
118 if (FLAG_enable_embedded_constant_pool) {
119 Address constant_pool = host_->constant_pool();
120 DCHECK(constant_pool);
121 ConstantPoolEntry::Access access;
122 if (Assembler::IsConstantPoolLoadStart(pc_, &access))
123 return Assembler::target_constant_pool_address_at(
124 pc_, constant_pool, access, ConstantPoolEntry::INTPTR);
131 int RelocInfo::target_address_size() { return Assembler::kSpecialTargetSize; }
134 void RelocInfo::set_target_address(Address target,
135 WriteBarrierMode write_barrier_mode,
136 ICacheFlushMode icache_flush_mode) {
137 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
138 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
139 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
140 IsCodeTarget(rmode_)) {
141 Object* target_code = Code::GetCodeFromTargetAddress(target);
142 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
143 host(), this, HeapObject::cast(target_code));
148 Address Assembler::break_address_from_return_address(Address pc) {
149 return target_address_from_return_address(pc);
153 Address Assembler::target_address_from_return_address(Address pc) {
154 // Returns the address of the call target from the return address that will
155 // be returned to after a call.
156 // Call sequence is :
157 // mov ip, @ call address
162 ConstantPoolEntry::Access access;
163 if (FLAG_enable_embedded_constant_pool &&
164 IsConstantPoolLoadEnd(pc - 3 * kInstrSize, &access)) {
165 len = (access == ConstantPoolEntry::OVERFLOWED) ? 2 : 1;
167 len = kMovInstructionsNoConstantPool;
169 return pc - (len + 2) * kInstrSize;
173 Address Assembler::return_address_from_call_start(Address pc) {
175 ConstantPoolEntry::Access access;
176 if (FLAG_enable_embedded_constant_pool &&
177 IsConstantPoolLoadStart(pc, &access)) {
178 len = (access == ConstantPoolEntry::OVERFLOWED) ? 2 : 1;
180 len = kMovInstructionsNoConstantPool;
182 return pc + (len + 2) * kInstrSize;
186 Object* RelocInfo::target_object() {
187 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
188 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_));
192 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
193 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
194 return Handle<Object>(
195 reinterpret_cast<Object**>(Assembler::target_address_at(pc_, host_)));
199 void RelocInfo::set_target_object(Object* target,
200 WriteBarrierMode write_barrier_mode,
201 ICacheFlushMode icache_flush_mode) {
202 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
203 Assembler::set_target_address_at(
204 pc_, host_, reinterpret_cast<Address>(target), icache_flush_mode);
205 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
206 target->IsHeapObject()) {
207 host()->GetHeap()->incremental_marking()->RecordWrite(
208 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
213 Address RelocInfo::target_external_reference() {
214 DCHECK(rmode_ == EXTERNAL_REFERENCE);
215 return Assembler::target_address_at(pc_, host_);
219 Address RelocInfo::target_runtime_entry(Assembler* origin) {
220 DCHECK(IsRuntimeEntry(rmode_));
221 return target_address();
225 void RelocInfo::set_target_runtime_entry(Address target,
226 WriteBarrierMode write_barrier_mode,
227 ICacheFlushMode icache_flush_mode) {
228 DCHECK(IsRuntimeEntry(rmode_));
229 if (target_address() != target)
230 set_target_address(target, write_barrier_mode, icache_flush_mode);
234 Handle<Cell> RelocInfo::target_cell_handle() {
235 DCHECK(rmode_ == RelocInfo::CELL);
236 Address address = Memory::Address_at(pc_);
237 return Handle<Cell>(reinterpret_cast<Cell**>(address));
241 Cell* RelocInfo::target_cell() {
242 DCHECK(rmode_ == RelocInfo::CELL);
243 return Cell::FromValueAddress(Memory::Address_at(pc_));
247 void RelocInfo::set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode,
248 ICacheFlushMode icache_flush_mode) {
249 DCHECK(rmode_ == RelocInfo::CELL);
250 Address address = cell->address() + Cell::kValueOffset;
251 Memory::Address_at(pc_) = address;
252 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
253 // TODO(1550) We are passing NULL as a slot because cell can never be on
254 // evacuation candidate.
255 host()->GetHeap()->incremental_marking()->RecordWrite(host(), NULL, cell);
260 static const int kNoCodeAgeInstructions =
261 FLAG_enable_embedded_constant_pool ? 7 : 6;
262 static const int kCodeAgingInstructions =
263 Assembler::kMovInstructionsNoConstantPool + 3;
264 static const int kNoCodeAgeSequenceInstructions =
265 ((kNoCodeAgeInstructions >= kCodeAgingInstructions)
266 ? kNoCodeAgeInstructions
267 : kCodeAgingInstructions);
268 static const int kNoCodeAgeSequenceNops =
269 (kNoCodeAgeSequenceInstructions - kNoCodeAgeInstructions);
270 static const int kCodeAgingSequenceNops =
271 (kNoCodeAgeSequenceInstructions - kCodeAgingInstructions);
272 static const int kCodeAgingTargetDelta = 1 * Assembler::kInstrSize;
273 static const int kNoCodeAgeSequenceLength =
274 (kNoCodeAgeSequenceInstructions * Assembler::kInstrSize);
277 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
278 UNREACHABLE(); // This should never be reached on PPC.
279 return Handle<Object>();
283 Code* RelocInfo::code_age_stub() {
284 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
285 return Code::GetCodeFromTargetAddress(
286 Assembler::target_address_at(pc_ + kCodeAgingTargetDelta, host_));
290 void RelocInfo::set_code_age_stub(Code* stub,
291 ICacheFlushMode icache_flush_mode) {
292 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
293 Assembler::set_target_address_at(pc_ + kCodeAgingTargetDelta, host_,
294 stub->instruction_start(),
299 Address RelocInfo::call_address() {
300 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
301 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
302 // The pc_ offset of 0 assumes patched return sequence per
303 // BreakLocation::SetDebugBreakAtReturn(), or debug break
304 // slot per BreakLocation::SetDebugBreakAtSlot().
305 return Assembler::target_address_at(pc_, host_);
309 void RelocInfo::set_call_address(Address target) {
310 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
311 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
312 Assembler::set_target_address_at(pc_, host_, target);
313 if (host() != NULL) {
314 Object* target_code = Code::GetCodeFromTargetAddress(target);
315 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
316 host(), this, HeapObject::cast(target_code));
321 Object* RelocInfo::call_object() { return *call_object_address(); }
324 void RelocInfo::set_call_object(Object* target) {
325 *call_object_address() = target;
329 Object** RelocInfo::call_object_address() {
330 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
331 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
332 return reinterpret_cast<Object**>(pc_ + 2 * Assembler::kInstrSize);
336 void RelocInfo::WipeOut() {
337 DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) ||
338 IsRuntimeEntry(rmode_) || IsExternalReference(rmode_) ||
339 IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_));
340 if (IsInternalReference(rmode_)) {
342 Memory::Address_at(pc_) = NULL;
343 } else if (IsInternalReferenceEncoded(rmode_)) {
345 // Currently used only by deserializer, no need to flush.
346 Assembler::set_target_address_at(pc_, host_, NULL, SKIP_ICACHE_FLUSH);
348 Assembler::set_target_address_at(pc_, host_, NULL);
353 bool RelocInfo::IsPatchedReturnSequence() {
355 // The patched return sequence is defined by
356 // BreakLocation::SetDebugBreakAtReturn()
359 Instr instr0 = Assembler::instr_at(pc_);
360 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
361 #if V8_TARGET_ARCH_PPC64
362 Instr instr3 = Assembler::instr_at(pc_ + (3 * Assembler::kInstrSize));
363 Instr instr4 = Assembler::instr_at(pc_ + (4 * Assembler::kInstrSize));
364 Instr binstr = Assembler::instr_at(pc_ + (7 * Assembler::kInstrSize));
366 Instr binstr = Assembler::instr_at(pc_ + 4 * Assembler::kInstrSize);
368 bool patched_return =
369 ((instr0 & kOpcodeMask) == ADDIS && (instr1 & kOpcodeMask) == ORI &&
370 #if V8_TARGET_ARCH_PPC64
371 (instr3 & kOpcodeMask) == ORIS && (instr4 & kOpcodeMask) == ORI &&
373 (binstr == 0x7d821008)); // twge r2, r2
375 // printf("IsPatchedReturnSequence: %d\n", patched_return);
376 return patched_return;
380 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
381 Instr current_instr = Assembler::instr_at(pc_);
382 return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
386 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
387 RelocInfo::Mode mode = rmode();
388 if (mode == RelocInfo::EMBEDDED_OBJECT) {
389 visitor->VisitEmbeddedPointer(this);
390 } else if (RelocInfo::IsCodeTarget(mode)) {
391 visitor->VisitCodeTarget(this);
392 } else if (mode == RelocInfo::CELL) {
393 visitor->VisitCell(this);
394 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
395 visitor->VisitExternalReference(this);
396 } else if (mode == RelocInfo::INTERNAL_REFERENCE ||
397 mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
398 visitor->VisitInternalReference(this);
399 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
400 visitor->VisitCodeAgeSequence(this);
401 } else if (((RelocInfo::IsJSReturn(mode) && IsPatchedReturnSequence()) ||
402 (RelocInfo::IsDebugBreakSlot(mode) &&
403 IsPatchedDebugBreakSlotSequence())) &&
404 isolate->debug()->has_break_points()) {
405 visitor->VisitDebugTarget(this);
406 } else if (IsRuntimeEntry(mode)) {
407 visitor->VisitRuntimeEntry(this);
412 template <typename StaticVisitor>
413 void RelocInfo::Visit(Heap* heap) {
414 RelocInfo::Mode mode = rmode();
415 if (mode == RelocInfo::EMBEDDED_OBJECT) {
416 StaticVisitor::VisitEmbeddedPointer(heap, this);
417 } else if (RelocInfo::IsCodeTarget(mode)) {
418 StaticVisitor::VisitCodeTarget(heap, this);
419 } else if (mode == RelocInfo::CELL) {
420 StaticVisitor::VisitCell(heap, this);
421 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
422 StaticVisitor::VisitExternalReference(this);
423 } else if (mode == RelocInfo::INTERNAL_REFERENCE ||
424 mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
425 StaticVisitor::VisitInternalReference(this);
426 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
427 StaticVisitor::VisitCodeAgeSequence(heap, this);
428 } else if (heap->isolate()->debug()->has_break_points() &&
429 ((RelocInfo::IsJSReturn(mode) && IsPatchedReturnSequence()) ||
430 (RelocInfo::IsDebugBreakSlot(mode) &&
431 IsPatchedDebugBreakSlotSequence()))) {
432 StaticVisitor::VisitDebugTarget(heap, this);
433 } else if (IsRuntimeEntry(mode)) {
434 StaticVisitor::VisitRuntimeEntry(this);
438 Operand::Operand(intptr_t immediate, RelocInfo::Mode rmode) {
444 Operand::Operand(const ExternalReference& f) {
446 imm_ = reinterpret_cast<intptr_t>(f.address());
447 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
450 Operand::Operand(Smi* value) {
452 imm_ = reinterpret_cast<intptr_t>(value);
453 rmode_ = kRelocInfo_NONEPTR;
456 Operand::Operand(Register rm) {
458 rmode_ = kRelocInfo_NONEPTR; // PPC -why doesn't ARM do this?
461 void Assembler::CheckBuffer() {
462 if (buffer_space() <= kGap) {
467 void Assembler::CheckTrampolinePoolQuick() {
468 if (pc_offset() >= next_buffer_check_) {
469 CheckTrampolinePool();
473 void Assembler::emit(Instr x) {
475 *reinterpret_cast<Instr*>(pc_) = x;
477 CheckTrampolinePoolQuick();
480 bool Operand::is_reg() const { return rm_.is_valid(); }
483 // Fetch the 32bit value from the FIXED_SEQUENCE lis/ori
484 Address Assembler::target_address_at(Address pc, Address constant_pool) {
485 if (FLAG_enable_embedded_constant_pool && constant_pool) {
486 ConstantPoolEntry::Access access;
487 if (IsConstantPoolLoadStart(pc, &access))
488 return Memory::Address_at(target_constant_pool_address_at(
489 pc, constant_pool, access, ConstantPoolEntry::INTPTR));
492 Instr instr1 = instr_at(pc);
493 Instr instr2 = instr_at(pc + kInstrSize);
494 // Interpret 2 instructions generated by lis/ori
495 if (IsLis(instr1) && IsOri(instr2)) {
496 #if V8_TARGET_ARCH_PPC64
497 Instr instr4 = instr_at(pc + (3 * kInstrSize));
498 Instr instr5 = instr_at(pc + (4 * kInstrSize));
499 // Assemble the 64 bit value.
500 uint64_t hi = (static_cast<uint32_t>((instr1 & kImm16Mask) << 16) |
501 static_cast<uint32_t>(instr2 & kImm16Mask));
502 uint64_t lo = (static_cast<uint32_t>((instr4 & kImm16Mask) << 16) |
503 static_cast<uint32_t>(instr5 & kImm16Mask));
504 return reinterpret_cast<Address>((hi << 32) | lo);
506 // Assemble the 32 bit value.
507 return reinterpret_cast<Address>(((instr1 & kImm16Mask) << 16) |
508 (instr2 & kImm16Mask));
517 #if V8_TARGET_ARCH_PPC64
518 const int kLoadIntptrOpcode = LD;
520 const int kLoadIntptrOpcode = LWZ;
523 // Constant pool load sequence detection:
524 // 1) REGULAR access:
525 // load <dst>, kConstantPoolRegister + <offset>
527 // 2) OVERFLOWED access:
528 // addis <scratch>, kConstantPoolRegister, <offset_high>
529 // load <dst>, <scratch> + <offset_low>
530 bool Assembler::IsConstantPoolLoadStart(Address pc,
531 ConstantPoolEntry::Access* access) {
532 Instr instr = instr_at(pc);
533 int opcode = instr & kOpcodeMask;
534 if (!GetRA(instr).is(kConstantPoolRegister)) return false;
535 bool overflowed = (opcode == ADDIS);
538 opcode = instr_at(pc + kInstrSize) & kOpcodeMask;
540 DCHECK(opcode == kLoadIntptrOpcode || opcode == LFD);
543 *access = (overflowed ? ConstantPoolEntry::OVERFLOWED
544 : ConstantPoolEntry::REGULAR);
550 bool Assembler::IsConstantPoolLoadEnd(Address pc,
551 ConstantPoolEntry::Access* access) {
552 Instr instr = instr_at(pc);
553 int opcode = instr & kOpcodeMask;
554 if (!(opcode == kLoadIntptrOpcode || opcode == LFD)) return false;
555 bool overflowed = !GetRA(instr).is(kConstantPoolRegister);
558 instr = instr_at(pc - kInstrSize);
559 opcode = instr & kOpcodeMask;
560 DCHECK((opcode == ADDIS) && GetRA(instr).is(kConstantPoolRegister));
564 *access = (overflowed ? ConstantPoolEntry::OVERFLOWED
565 : ConstantPoolEntry::REGULAR);
571 int Assembler::GetConstantPoolOffset(Address pc,
572 ConstantPoolEntry::Access access,
573 ConstantPoolEntry::Type type) {
574 bool overflowed = (access == ConstantPoolEntry::OVERFLOWED);
576 ConstantPoolEntry::Access access_check;
577 DCHECK(IsConstantPoolLoadStart(pc, &access_check));
578 DCHECK(access_check == access);
582 offset = (instr_at(pc) & kImm16Mask) << 16;
583 offset += SIGN_EXT_IMM16(instr_at(pc + kInstrSize) & kImm16Mask);
584 DCHECK(!is_int16(offset));
586 offset = SIGN_EXT_IMM16((instr_at(pc) & kImm16Mask));
592 void Assembler::PatchConstantPoolAccessInstruction(
593 int pc_offset, int offset, ConstantPoolEntry::Access access,
594 ConstantPoolEntry::Type type) {
595 Address pc = buffer_ + pc_offset;
596 bool overflowed = (access == ConstantPoolEntry::OVERFLOWED);
598 ConstantPoolEntry::Access access_check;
599 DCHECK(IsConstantPoolLoadStart(pc, &access_check));
600 DCHECK(access_check == access);
601 DCHECK(overflowed != is_int16(offset));
604 int hi_word = static_cast<int>(offset >> 16);
605 int lo_word = static_cast<int>(offset & 0xffff);
606 if (lo_word & 0x8000) hi_word++;
608 Instr instr1 = instr_at(pc);
609 Instr instr2 = instr_at(pc + kInstrSize);
610 instr1 &= ~kImm16Mask;
611 instr1 |= (hi_word & kImm16Mask);
612 instr2 &= ~kImm16Mask;
613 instr2 |= (lo_word & kImm16Mask);
614 instr_at_put(pc, instr1);
615 instr_at_put(pc + kInstrSize, instr2);
617 Instr instr = instr_at(pc);
618 instr &= ~kImm16Mask;
619 instr |= (offset & kImm16Mask);
620 instr_at_put(pc, instr);
625 Address Assembler::target_constant_pool_address_at(
626 Address pc, Address constant_pool, ConstantPoolEntry::Access access,
627 ConstantPoolEntry::Type type) {
628 Address addr = constant_pool;
630 addr += GetConstantPoolOffset(pc, access, type);
635 // This sets the branch destination (which gets loaded at the call address).
636 // This is for calls and branches within generated code. The serializer
637 // has already deserialized the mov instructions etc.
638 // There is a FIXED_SEQUENCE assumption here
639 void Assembler::deserialization_set_special_target_at(
640 Address instruction_payload, Code* code, Address target) {
641 set_target_address_at(instruction_payload, code, target);
645 void Assembler::deserialization_set_target_internal_reference_at(
646 Address pc, Address target, RelocInfo::Mode mode) {
647 if (RelocInfo::IsInternalReferenceEncoded(mode)) {
649 set_target_address_at(pc, code, target, SKIP_ICACHE_FLUSH);
651 Memory::Address_at(pc) = target;
656 // This code assumes the FIXED_SEQUENCE of lis/ori
657 void Assembler::set_target_address_at(Address pc, Address constant_pool,
659 ICacheFlushMode icache_flush_mode) {
660 if (FLAG_enable_embedded_constant_pool && constant_pool) {
661 ConstantPoolEntry::Access access;
662 if (IsConstantPoolLoadStart(pc, &access)) {
663 Memory::Address_at(target_constant_pool_address_at(
664 pc, constant_pool, access, ConstantPoolEntry::INTPTR)) = target;
669 Instr instr1 = instr_at(pc);
670 Instr instr2 = instr_at(pc + kInstrSize);
671 // Interpret 2 instructions generated by lis/ori
672 if (IsLis(instr1) && IsOri(instr2)) {
673 #if V8_TARGET_ARCH_PPC64
674 Instr instr4 = instr_at(pc + (3 * kInstrSize));
675 Instr instr5 = instr_at(pc + (4 * kInstrSize));
676 // Needs to be fixed up when mov changes to handle 64-bit values.
677 uint32_t* p = reinterpret_cast<uint32_t*>(pc);
678 uintptr_t itarget = reinterpret_cast<uintptr_t>(target);
680 instr5 &= ~kImm16Mask;
681 instr5 |= itarget & kImm16Mask;
682 itarget = itarget >> 16;
684 instr4 &= ~kImm16Mask;
685 instr4 |= itarget & kImm16Mask;
686 itarget = itarget >> 16;
688 instr2 &= ~kImm16Mask;
689 instr2 |= itarget & kImm16Mask;
690 itarget = itarget >> 16;
692 instr1 &= ~kImm16Mask;
693 instr1 |= itarget & kImm16Mask;
694 itarget = itarget >> 16;
700 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
701 CpuFeatures::FlushICache(p, 5 * kInstrSize);
704 uint32_t* p = reinterpret_cast<uint32_t*>(pc);
705 uint32_t itarget = reinterpret_cast<uint32_t>(target);
706 int lo_word = itarget & kImm16Mask;
707 int hi_word = itarget >> 16;
708 instr1 &= ~kImm16Mask;
710 instr2 &= ~kImm16Mask;
715 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
716 CpuFeatures::FlushICache(p, 2 * kInstrSize);
724 } // namespace v8::internal
726 #endif // V8_PPC_ASSEMBLER_PPC_INL_H_