1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved.
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5 // modification, are permitted provided that the following conditions
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30 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
31 // OF THE POSSIBILITY OF SUCH DAMAGE.
33 // The original source code covered by the above license above has been modified
34 // significantly by Google Inc.
35 // Copyright 2014 the V8 project authors. All rights reserved.
37 #ifndef V8_PPC_ASSEMBLER_PPC_INL_H_
38 #define V8_PPC_ASSEMBLER_PPC_INL_H_
40 #include "src/ppc/assembler-ppc.h"
42 #include "src/assembler.h"
43 #include "src/debug.h"
50 bool CpuFeatures::SupportsCrankshaft() { return true; }
53 void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
54 if (IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)) {
55 // absolute code pointer inside code object moves with the code object.
56 Assembler::RelocateInternalReference(pc_, delta, 0, rmode_,
62 Address RelocInfo::target_address() {
63 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
64 return Assembler::target_address_at(pc_, host_);
68 Address RelocInfo::target_address_address() {
69 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) ||
70 rmode_ == EMBEDDED_OBJECT || rmode_ == EXTERNAL_REFERENCE);
72 // Read the address of the word containing the target_address in an
73 // instruction stream.
74 // The only architecture-independent user of this function is the serializer.
75 // The serializer uses it to find out how many raw bytes of instruction to
76 // output before the next target.
77 // For an instruction like LIS/ORI where the target bits are mixed into the
78 // instruction bits, the size of the target will be zero, indicating that the
79 // serializer should not step forward in memory after a target is resolved
81 return reinterpret_cast<Address>(pc_);
85 Address RelocInfo::constant_pool_entry_address() {
91 int RelocInfo::target_address_size() { return Assembler::kSpecialTargetSize; }
94 void RelocInfo::set_target_address(Address target,
95 WriteBarrierMode write_barrier_mode,
96 ICacheFlushMode icache_flush_mode) {
97 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
98 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
99 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
100 IsCodeTarget(rmode_)) {
101 Object* target_code = Code::GetCodeFromTargetAddress(target);
102 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
103 host(), this, HeapObject::cast(target_code));
108 Address Assembler::break_address_from_return_address(Address pc) {
109 return target_address_from_return_address(pc);
113 Address Assembler::target_address_from_return_address(Address pc) {
114 // Returns the address of the call target from the return address that will
115 // be returned to after a call.
116 // Call sequence is :
117 // mov ip, @ call address
121 return pc - (kMovInstructions + 2) * kInstrSize;
125 Address Assembler::return_address_from_call_start(Address pc) {
126 return pc + (kMovInstructions + 2) * kInstrSize;
130 Object* RelocInfo::target_object() {
131 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
132 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_));
136 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
137 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
138 return Handle<Object>(
139 reinterpret_cast<Object**>(Assembler::target_address_at(pc_, host_)));
143 void RelocInfo::set_target_object(Object* target,
144 WriteBarrierMode write_barrier_mode,
145 ICacheFlushMode icache_flush_mode) {
146 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
147 Assembler::set_target_address_at(
148 pc_, host_, reinterpret_cast<Address>(target), icache_flush_mode);
149 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
150 target->IsHeapObject()) {
151 host()->GetHeap()->incremental_marking()->RecordWrite(
152 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
157 Address RelocInfo::target_reference() {
158 DCHECK(rmode_ == EXTERNAL_REFERENCE);
159 return Assembler::target_address_at(pc_, host_);
163 Address RelocInfo::target_runtime_entry(Assembler* origin) {
164 DCHECK(IsRuntimeEntry(rmode_));
165 return target_address();
169 void RelocInfo::set_target_runtime_entry(Address target,
170 WriteBarrierMode write_barrier_mode,
171 ICacheFlushMode icache_flush_mode) {
172 DCHECK(IsRuntimeEntry(rmode_));
173 if (target_address() != target)
174 set_target_address(target, write_barrier_mode, icache_flush_mode);
178 Handle<Cell> RelocInfo::target_cell_handle() {
179 DCHECK(rmode_ == RelocInfo::CELL);
180 Address address = Memory::Address_at(pc_);
181 return Handle<Cell>(reinterpret_cast<Cell**>(address));
185 Cell* RelocInfo::target_cell() {
186 DCHECK(rmode_ == RelocInfo::CELL);
187 return Cell::FromValueAddress(Memory::Address_at(pc_));
191 void RelocInfo::set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode,
192 ICacheFlushMode icache_flush_mode) {
193 DCHECK(rmode_ == RelocInfo::CELL);
194 Address address = cell->address() + Cell::kValueOffset;
195 Memory::Address_at(pc_) = address;
196 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
197 // TODO(1550) We are passing NULL as a slot because cell can never be on
198 // evacuation candidate.
199 host()->GetHeap()->incremental_marking()->RecordWrite(host(), NULL, cell);
204 static const int kNoCodeAgeInstructions = 6;
205 static const int kCodeAgingInstructions = Assembler::kMovInstructions + 3;
206 static const int kNoCodeAgeSequenceInstructions =
207 ((kNoCodeAgeInstructions >= kCodeAgingInstructions)
208 ? kNoCodeAgeInstructions
209 : kCodeAgingInstructions);
210 static const int kNoCodeAgeSequenceNops =
211 (kNoCodeAgeSequenceInstructions - kNoCodeAgeInstructions);
212 static const int kCodeAgingSequenceNops =
213 (kNoCodeAgeSequenceInstructions - kCodeAgingInstructions);
214 static const int kCodeAgingTargetDelta = 1 * Assembler::kInstrSize;
215 static const int kNoCodeAgeSequenceLength =
216 (kNoCodeAgeSequenceInstructions * Assembler::kInstrSize);
219 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
220 UNREACHABLE(); // This should never be reached on PPC.
221 return Handle<Object>();
225 Code* RelocInfo::code_age_stub() {
226 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
227 return Code::GetCodeFromTargetAddress(
228 Assembler::target_address_at(pc_ + kCodeAgingTargetDelta, host_));
232 void RelocInfo::set_code_age_stub(Code* stub,
233 ICacheFlushMode icache_flush_mode) {
234 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
235 Assembler::set_target_address_at(pc_ + kCodeAgingTargetDelta, host_,
236 stub->instruction_start(),
241 Address RelocInfo::call_address() {
242 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
243 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
244 // The pc_ offset of 0 assumes patched return sequence per
245 // BreakLocationIterator::SetDebugBreakAtReturn(), or debug break
246 // slot per BreakLocationIterator::SetDebugBreakAtSlot().
247 return Assembler::target_address_at(pc_, host_);
251 void RelocInfo::set_call_address(Address target) {
252 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
253 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
254 Assembler::set_target_address_at(pc_, host_, target);
255 if (host() != NULL) {
256 Object* target_code = Code::GetCodeFromTargetAddress(target);
257 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
258 host(), this, HeapObject::cast(target_code));
263 Object* RelocInfo::call_object() { return *call_object_address(); }
266 void RelocInfo::set_call_object(Object* target) {
267 *call_object_address() = target;
271 Object** RelocInfo::call_object_address() {
272 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
273 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
274 return reinterpret_cast<Object**>(pc_ + 2 * Assembler::kInstrSize);
278 void RelocInfo::WipeOut() {
279 DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) ||
280 IsRuntimeEntry(rmode_) || IsExternalReference(rmode_));
281 Assembler::set_target_address_at(pc_, host_, NULL);
285 bool RelocInfo::IsPatchedReturnSequence() {
287 // The patched return sequence is defined by
288 // BreakLocationIterator::SetDebugBreakAtReturn()
291 Instr instr0 = Assembler::instr_at(pc_);
292 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
293 #if V8_TARGET_ARCH_PPC64
294 Instr instr3 = Assembler::instr_at(pc_ + (3 * Assembler::kInstrSize));
295 Instr instr4 = Assembler::instr_at(pc_ + (4 * Assembler::kInstrSize));
296 Instr binstr = Assembler::instr_at(pc_ + (7 * Assembler::kInstrSize));
298 Instr binstr = Assembler::instr_at(pc_ + 4 * Assembler::kInstrSize);
300 bool patched_return =
301 ((instr0 & kOpcodeMask) == ADDIS && (instr1 & kOpcodeMask) == ORI &&
302 #if V8_TARGET_ARCH_PPC64
303 (instr3 & kOpcodeMask) == ORIS && (instr4 & kOpcodeMask) == ORI &&
305 (binstr == 0x7d821008)); // twge r2, r2
307 // printf("IsPatchedReturnSequence: %d\n", patched_return);
308 return patched_return;
312 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
313 Instr current_instr = Assembler::instr_at(pc_);
314 return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
318 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
319 RelocInfo::Mode mode = rmode();
320 if (mode == RelocInfo::EMBEDDED_OBJECT) {
321 visitor->VisitEmbeddedPointer(this);
322 } else if (RelocInfo::IsCodeTarget(mode)) {
323 visitor->VisitCodeTarget(this);
324 } else if (mode == RelocInfo::CELL) {
325 visitor->VisitCell(this);
326 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
327 visitor->VisitExternalReference(this);
328 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
329 visitor->VisitCodeAgeSequence(this);
330 } else if (((RelocInfo::IsJSReturn(mode) && IsPatchedReturnSequence()) ||
331 (RelocInfo::IsDebugBreakSlot(mode) &&
332 IsPatchedDebugBreakSlotSequence())) &&
333 isolate->debug()->has_break_points()) {
334 visitor->VisitDebugTarget(this);
335 } else if (IsRuntimeEntry(mode)) {
336 visitor->VisitRuntimeEntry(this);
341 template <typename StaticVisitor>
342 void RelocInfo::Visit(Heap* heap) {
343 RelocInfo::Mode mode = rmode();
344 if (mode == RelocInfo::EMBEDDED_OBJECT) {
345 StaticVisitor::VisitEmbeddedPointer(heap, this);
346 } else if (RelocInfo::IsCodeTarget(mode)) {
347 StaticVisitor::VisitCodeTarget(heap, this);
348 } else if (mode == RelocInfo::CELL) {
349 StaticVisitor::VisitCell(heap, this);
350 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
351 StaticVisitor::VisitExternalReference(this);
352 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
353 StaticVisitor::VisitCodeAgeSequence(heap, this);
354 } else if (heap->isolate()->debug()->has_break_points() &&
355 ((RelocInfo::IsJSReturn(mode) && IsPatchedReturnSequence()) ||
356 (RelocInfo::IsDebugBreakSlot(mode) &&
357 IsPatchedDebugBreakSlotSequence()))) {
358 StaticVisitor::VisitDebugTarget(heap, this);
359 } else if (IsRuntimeEntry(mode)) {
360 StaticVisitor::VisitRuntimeEntry(this);
364 Operand::Operand(intptr_t immediate, RelocInfo::Mode rmode) {
370 Operand::Operand(const ExternalReference& f) {
372 imm_ = reinterpret_cast<intptr_t>(f.address());
373 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
376 Operand::Operand(Smi* value) {
378 imm_ = reinterpret_cast<intptr_t>(value);
379 rmode_ = kRelocInfo_NONEPTR;
382 Operand::Operand(Register rm) {
384 rmode_ = kRelocInfo_NONEPTR; // PPC -why doesn't ARM do this?
387 void Assembler::CheckBuffer() {
388 if (buffer_space() <= kGap) {
393 void Assembler::CheckTrampolinePoolQuick() {
394 if (pc_offset() >= next_buffer_check_) {
395 CheckTrampolinePool();
399 void Assembler::emit(Instr x) {
401 *reinterpret_cast<Instr*>(pc_) = x;
403 CheckTrampolinePoolQuick();
406 bool Operand::is_reg() const { return rm_.is_valid(); }
409 // Fetch the 32bit value from the FIXED_SEQUENCE lis/ori
410 Address Assembler::target_address_at(Address pc,
411 ConstantPoolArray* constant_pool) {
412 Instr instr1 = instr_at(pc);
413 Instr instr2 = instr_at(pc + kInstrSize);
414 // Interpret 2 instructions generated by lis/ori
415 if (IsLis(instr1) && IsOri(instr2)) {
416 #if V8_TARGET_ARCH_PPC64
417 Instr instr4 = instr_at(pc + (3 * kInstrSize));
418 Instr instr5 = instr_at(pc + (4 * kInstrSize));
419 // Assemble the 64 bit value.
420 uint64_t hi = (static_cast<uint32_t>((instr1 & kImm16Mask) << 16) |
421 static_cast<uint32_t>(instr2 & kImm16Mask));
422 uint64_t lo = (static_cast<uint32_t>((instr4 & kImm16Mask) << 16) |
423 static_cast<uint32_t>(instr5 & kImm16Mask));
424 return reinterpret_cast<Address>((hi << 32) | lo);
426 // Assemble the 32 bit value.
427 return reinterpret_cast<Address>(((instr1 & kImm16Mask) << 16) |
428 (instr2 & kImm16Mask));
437 // This sets the branch destination (which gets loaded at the call address).
438 // This is for calls and branches within generated code. The serializer
439 // has already deserialized the mov instructions etc.
440 // There is a FIXED_SEQUENCE assumption here
441 void Assembler::deserialization_set_special_target_at(
442 Address instruction_payload, Code* code, Address target) {
443 set_target_address_at(instruction_payload, code, target);
446 // This code assumes the FIXED_SEQUENCE of lis/ori
447 void Assembler::set_target_address_at(Address pc,
448 ConstantPoolArray* constant_pool,
450 ICacheFlushMode icache_flush_mode) {
451 Instr instr1 = instr_at(pc);
452 Instr instr2 = instr_at(pc + kInstrSize);
453 // Interpret 2 instructions generated by lis/ori
454 if (IsLis(instr1) && IsOri(instr2)) {
455 #if V8_TARGET_ARCH_PPC64
456 Instr instr4 = instr_at(pc + (3 * kInstrSize));
457 Instr instr5 = instr_at(pc + (4 * kInstrSize));
458 // Needs to be fixed up when mov changes to handle 64-bit values.
459 uint32_t* p = reinterpret_cast<uint32_t*>(pc);
460 uintptr_t itarget = reinterpret_cast<uintptr_t>(target);
462 instr5 &= ~kImm16Mask;
463 instr5 |= itarget & kImm16Mask;
464 itarget = itarget >> 16;
466 instr4 &= ~kImm16Mask;
467 instr4 |= itarget & kImm16Mask;
468 itarget = itarget >> 16;
470 instr2 &= ~kImm16Mask;
471 instr2 |= itarget & kImm16Mask;
472 itarget = itarget >> 16;
474 instr1 &= ~kImm16Mask;
475 instr1 |= itarget & kImm16Mask;
476 itarget = itarget >> 16;
482 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
483 CpuFeatures::FlushICache(p, 5 * kInstrSize);
486 uint32_t* p = reinterpret_cast<uint32_t*>(pc);
487 uint32_t itarget = reinterpret_cast<uint32_t>(target);
488 int lo_word = itarget & kImm16Mask;
489 int hi_word = itarget >> 16;
490 instr1 &= ~kImm16Mask;
492 instr2 &= ~kImm16Mask;
497 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
498 CpuFeatures::FlushICache(p, 2 * kInstrSize);
506 } // namespace v8::internal
508 #endif // V8_PPC_ASSEMBLER_PPC_INL_H_