1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved.
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5 // modification, are permitted provided that the following conditions
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9 // this list of conditions and the following disclaimer.
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30 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
31 // OF THE POSSIBILITY OF SUCH DAMAGE.
33 // The original source code covered by the above license above has been modified
34 // significantly by Google Inc.
35 // Copyright 2014 the V8 project authors. All rights reserved.
37 #ifndef V8_PPC_ASSEMBLER_PPC_INL_H_
38 #define V8_PPC_ASSEMBLER_PPC_INL_H_
40 #include "src/ppc/assembler-ppc.h"
42 #include "src/assembler.h"
43 #include "src/debug.h"
50 bool CpuFeatures::SupportsCrankshaft() { return true; }
53 void RelocInfo::apply(intptr_t delta) {
54 // absolute code pointer inside code object moves with the code object.
55 if (IsInternalReference(rmode_)) {
57 Address target = Memory::Address_at(pc_);
58 Memory::Address_at(pc_) = target + delta;
61 DCHECK(IsInternalReferenceEncoded(rmode_));
62 Address target = Assembler::target_address_at(pc_, host_);
63 Assembler::set_target_address_at(pc_, host_, target + delta,
69 Address RelocInfo::target_internal_reference() {
70 if (IsInternalReference(rmode_)) {
72 return Memory::Address_at(pc_);
75 DCHECK(IsInternalReferenceEncoded(rmode_));
76 return Assembler::target_address_at(pc_, host_);
81 Address RelocInfo::target_internal_reference_address() {
82 DCHECK(IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_));
83 return reinterpret_cast<Address>(pc_);
87 Address RelocInfo::target_address() {
88 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
89 return Assembler::target_address_at(pc_, host_);
93 Address RelocInfo::target_address_address() {
94 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_) ||
95 rmode_ == EMBEDDED_OBJECT || rmode_ == EXTERNAL_REFERENCE);
97 if (FLAG_enable_embedded_constant_pool &&
98 Assembler::IsConstantPoolLoadStart(pc_)) {
99 // We return the PC for embedded constant pool since this function is used
100 // by the serializer and expects the address to reside within the code
102 return reinterpret_cast<Address>(pc_);
105 // Read the address of the word containing the target_address in an
106 // instruction stream.
107 // The only architecture-independent user of this function is the serializer.
108 // The serializer uses it to find out how many raw bytes of instruction to
109 // output before the next target.
110 // For an instruction like LIS/ORI where the target bits are mixed into the
111 // instruction bits, the size of the target will be zero, indicating that the
112 // serializer should not step forward in memory after a target is resolved
114 return reinterpret_cast<Address>(pc_);
118 Address RelocInfo::constant_pool_entry_address() {
119 if (FLAG_enable_embedded_constant_pool) {
120 Address constant_pool = host_->constant_pool();
121 DCHECK(constant_pool);
122 ConstantPoolEntry::Access access;
123 if (Assembler::IsConstantPoolLoadStart(pc_, &access))
124 return Assembler::target_constant_pool_address_at(
125 pc_, constant_pool, access, ConstantPoolEntry::INTPTR);
132 int RelocInfo::target_address_size() { return Assembler::kSpecialTargetSize; }
135 void RelocInfo::set_target_address(Address target,
136 WriteBarrierMode write_barrier_mode,
137 ICacheFlushMode icache_flush_mode) {
138 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
139 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
140 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
141 IsCodeTarget(rmode_)) {
142 Object* target_code = Code::GetCodeFromTargetAddress(target);
143 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
144 host(), this, HeapObject::cast(target_code));
149 Address Assembler::target_address_from_return_address(Address pc) {
150 // Returns the address of the call target from the return address that will
151 // be returned to after a call.
152 // Call sequence is :
153 // mov ip, @ call address
158 ConstantPoolEntry::Access access;
159 if (FLAG_enable_embedded_constant_pool &&
160 IsConstantPoolLoadEnd(pc - 3 * kInstrSize, &access)) {
161 len = (access == ConstantPoolEntry::OVERFLOWED) ? 2 : 1;
163 len = kMovInstructionsNoConstantPool;
165 return pc - (len + 2) * kInstrSize;
169 Address Assembler::return_address_from_call_start(Address pc) {
171 ConstantPoolEntry::Access access;
172 if (FLAG_enable_embedded_constant_pool &&
173 IsConstantPoolLoadStart(pc, &access)) {
174 len = (access == ConstantPoolEntry::OVERFLOWED) ? 2 : 1;
176 len = kMovInstructionsNoConstantPool;
178 return pc + (len + 2) * kInstrSize;
182 Object* RelocInfo::target_object() {
183 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
184 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_));
188 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
189 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
190 return Handle<Object>(
191 reinterpret_cast<Object**>(Assembler::target_address_at(pc_, host_)));
195 void RelocInfo::set_target_object(Object* target,
196 WriteBarrierMode write_barrier_mode,
197 ICacheFlushMode icache_flush_mode) {
198 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
199 Assembler::set_target_address_at(
200 pc_, host_, reinterpret_cast<Address>(target), icache_flush_mode);
201 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
202 target->IsHeapObject()) {
203 host()->GetHeap()->incremental_marking()->RecordWrite(
204 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
209 Address RelocInfo::target_external_reference() {
210 DCHECK(rmode_ == EXTERNAL_REFERENCE);
211 return Assembler::target_address_at(pc_, host_);
215 Address RelocInfo::target_runtime_entry(Assembler* origin) {
216 DCHECK(IsRuntimeEntry(rmode_));
217 return target_address();
221 void RelocInfo::set_target_runtime_entry(Address target,
222 WriteBarrierMode write_barrier_mode,
223 ICacheFlushMode icache_flush_mode) {
224 DCHECK(IsRuntimeEntry(rmode_));
225 if (target_address() != target)
226 set_target_address(target, write_barrier_mode, icache_flush_mode);
230 Handle<Cell> RelocInfo::target_cell_handle() {
231 DCHECK(rmode_ == RelocInfo::CELL);
232 Address address = Memory::Address_at(pc_);
233 return Handle<Cell>(reinterpret_cast<Cell**>(address));
237 Cell* RelocInfo::target_cell() {
238 DCHECK(rmode_ == RelocInfo::CELL);
239 return Cell::FromValueAddress(Memory::Address_at(pc_));
243 void RelocInfo::set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode,
244 ICacheFlushMode icache_flush_mode) {
245 DCHECK(rmode_ == RelocInfo::CELL);
246 Address address = cell->address() + Cell::kValueOffset;
247 Memory::Address_at(pc_) = address;
248 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
249 // TODO(1550) We are passing NULL as a slot because cell can never be on
250 // evacuation candidate.
251 host()->GetHeap()->incremental_marking()->RecordWrite(host(), NULL, cell);
256 static const int kNoCodeAgeInstructions =
257 FLAG_enable_embedded_constant_pool ? 7 : 6;
258 static const int kCodeAgingInstructions =
259 Assembler::kMovInstructionsNoConstantPool + 3;
260 static const int kNoCodeAgeSequenceInstructions =
261 ((kNoCodeAgeInstructions >= kCodeAgingInstructions)
262 ? kNoCodeAgeInstructions
263 : kCodeAgingInstructions);
264 static const int kNoCodeAgeSequenceNops =
265 (kNoCodeAgeSequenceInstructions - kNoCodeAgeInstructions);
266 static const int kCodeAgingSequenceNops =
267 (kNoCodeAgeSequenceInstructions - kCodeAgingInstructions);
268 static const int kCodeAgingTargetDelta = 1 * Assembler::kInstrSize;
269 static const int kNoCodeAgeSequenceLength =
270 (kNoCodeAgeSequenceInstructions * Assembler::kInstrSize);
273 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
274 UNREACHABLE(); // This should never be reached on PPC.
275 return Handle<Object>();
279 Code* RelocInfo::code_age_stub() {
280 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
281 return Code::GetCodeFromTargetAddress(
282 Assembler::target_address_at(pc_ + kCodeAgingTargetDelta, host_));
286 void RelocInfo::set_code_age_stub(Code* stub,
287 ICacheFlushMode icache_flush_mode) {
288 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
289 Assembler::set_target_address_at(pc_ + kCodeAgingTargetDelta, host_,
290 stub->instruction_start(),
295 Address RelocInfo::debug_call_address() {
296 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
297 return Assembler::target_address_at(pc_, host_);
301 void RelocInfo::set_debug_call_address(Address target) {
302 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
303 Assembler::set_target_address_at(pc_, host_, target);
304 if (host() != NULL) {
305 Object* target_code = Code::GetCodeFromTargetAddress(target);
306 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
307 host(), this, HeapObject::cast(target_code));
312 void RelocInfo::WipeOut() {
313 DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) ||
314 IsRuntimeEntry(rmode_) || IsExternalReference(rmode_) ||
315 IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_));
316 if (IsInternalReference(rmode_)) {
318 Memory::Address_at(pc_) = NULL;
319 } else if (IsInternalReferenceEncoded(rmode_)) {
321 // Currently used only by deserializer, no need to flush.
322 Assembler::set_target_address_at(pc_, host_, NULL, SKIP_ICACHE_FLUSH);
324 Assembler::set_target_address_at(pc_, host_, NULL);
329 bool RelocInfo::IsPatchedReturnSequence() {
331 // The patched return sequence is defined by
332 // BreakLocation::SetDebugBreakAtReturn()
335 Instr instr0 = Assembler::instr_at(pc_);
336 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
337 #if V8_TARGET_ARCH_PPC64
338 Instr instr3 = Assembler::instr_at(pc_ + (3 * Assembler::kInstrSize));
339 Instr instr4 = Assembler::instr_at(pc_ + (4 * Assembler::kInstrSize));
340 Instr binstr = Assembler::instr_at(pc_ + (7 * Assembler::kInstrSize));
342 Instr binstr = Assembler::instr_at(pc_ + 4 * Assembler::kInstrSize);
344 bool patched_return =
345 ((instr0 & kOpcodeMask) == ADDIS && (instr1 & kOpcodeMask) == ORI &&
346 #if V8_TARGET_ARCH_PPC64
347 (instr3 & kOpcodeMask) == ORIS && (instr4 & kOpcodeMask) == ORI &&
349 (binstr == 0x7d821008)); // twge r2, r2
351 // printf("IsPatchedReturnSequence: %d\n", patched_return);
352 return patched_return;
356 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
357 Instr current_instr = Assembler::instr_at(pc_);
358 return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
362 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
363 RelocInfo::Mode mode = rmode();
364 if (mode == RelocInfo::EMBEDDED_OBJECT) {
365 visitor->VisitEmbeddedPointer(this);
366 } else if (RelocInfo::IsCodeTarget(mode)) {
367 visitor->VisitCodeTarget(this);
368 } else if (mode == RelocInfo::CELL) {
369 visitor->VisitCell(this);
370 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
371 visitor->VisitExternalReference(this);
372 } else if (mode == RelocInfo::INTERNAL_REFERENCE ||
373 mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
374 visitor->VisitInternalReference(this);
375 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
376 visitor->VisitCodeAgeSequence(this);
377 } else if (RelocInfo::IsDebugBreakSlot(mode) &&
378 IsPatchedDebugBreakSlotSequence() &&
379 isolate->debug()->has_break_points()) {
380 visitor->VisitDebugTarget(this);
381 } else if (IsRuntimeEntry(mode)) {
382 visitor->VisitRuntimeEntry(this);
387 template <typename StaticVisitor>
388 void RelocInfo::Visit(Heap* heap) {
389 RelocInfo::Mode mode = rmode();
390 if (mode == RelocInfo::EMBEDDED_OBJECT) {
391 StaticVisitor::VisitEmbeddedPointer(heap, this);
392 } else if (RelocInfo::IsCodeTarget(mode)) {
393 StaticVisitor::VisitCodeTarget(heap, this);
394 } else if (mode == RelocInfo::CELL) {
395 StaticVisitor::VisitCell(heap, this);
396 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
397 StaticVisitor::VisitExternalReference(this);
398 } else if (mode == RelocInfo::INTERNAL_REFERENCE ||
399 mode == RelocInfo::INTERNAL_REFERENCE_ENCODED) {
400 StaticVisitor::VisitInternalReference(this);
401 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
402 StaticVisitor::VisitCodeAgeSequence(heap, this);
403 } else if (heap->isolate()->debug()->has_break_points() &&
404 RelocInfo::IsDebugBreakSlot(mode) &&
405 IsPatchedDebugBreakSlotSequence()) {
406 StaticVisitor::VisitDebugTarget(heap, this);
407 } else if (IsRuntimeEntry(mode)) {
408 StaticVisitor::VisitRuntimeEntry(this);
412 Operand::Operand(intptr_t immediate, RelocInfo::Mode rmode) {
418 Operand::Operand(const ExternalReference& f) {
420 imm_ = reinterpret_cast<intptr_t>(f.address());
421 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
424 Operand::Operand(Smi* value) {
426 imm_ = reinterpret_cast<intptr_t>(value);
427 rmode_ = kRelocInfo_NONEPTR;
430 Operand::Operand(Register rm) {
432 rmode_ = kRelocInfo_NONEPTR; // PPC -why doesn't ARM do this?
435 void Assembler::CheckBuffer() {
436 if (buffer_space() <= kGap) {
441 void Assembler::TrackBranch() {
442 DCHECK(!trampoline_emitted_);
443 int count = tracked_branch_count_++;
445 // We leave space (kMaxBlockTrampolineSectionSize)
446 // for BlockTrampolinePoolScope buffer.
447 next_trampoline_check_ =
448 pc_offset() + kMaxCondBranchReach - kMaxBlockTrampolineSectionSize;
450 next_trampoline_check_ -= kTrampolineSlotsSize;
454 void Assembler::UntrackBranch() {
455 DCHECK(!trampoline_emitted_);
456 DCHECK(tracked_branch_count_ > 0);
457 int count = --tracked_branch_count_;
460 next_trampoline_check_ = kMaxInt;
462 next_trampoline_check_ += kTrampolineSlotsSize;
466 void Assembler::CheckTrampolinePoolQuick() {
467 if (pc_offset() >= next_trampoline_check_) {
468 CheckTrampolinePool();
472 void Assembler::emit(Instr x) {
474 *reinterpret_cast<Instr*>(pc_) = x;
476 CheckTrampolinePoolQuick();
479 bool Operand::is_reg() const { return rm_.is_valid(); }
482 // Fetch the 32bit value from the FIXED_SEQUENCE lis/ori
483 Address Assembler::target_address_at(Address pc, Address constant_pool) {
484 if (FLAG_enable_embedded_constant_pool && constant_pool) {
485 ConstantPoolEntry::Access access;
486 if (IsConstantPoolLoadStart(pc, &access))
487 return Memory::Address_at(target_constant_pool_address_at(
488 pc, constant_pool, access, ConstantPoolEntry::INTPTR));
491 Instr instr1 = instr_at(pc);
492 Instr instr2 = instr_at(pc + kInstrSize);
493 // Interpret 2 instructions generated by lis/ori
494 if (IsLis(instr1) && IsOri(instr2)) {
495 #if V8_TARGET_ARCH_PPC64
496 Instr instr4 = instr_at(pc + (3 * kInstrSize));
497 Instr instr5 = instr_at(pc + (4 * kInstrSize));
498 // Assemble the 64 bit value.
499 uint64_t hi = (static_cast<uint32_t>((instr1 & kImm16Mask) << 16) |
500 static_cast<uint32_t>(instr2 & kImm16Mask));
501 uint64_t lo = (static_cast<uint32_t>((instr4 & kImm16Mask) << 16) |
502 static_cast<uint32_t>(instr5 & kImm16Mask));
503 return reinterpret_cast<Address>((hi << 32) | lo);
505 // Assemble the 32 bit value.
506 return reinterpret_cast<Address>(((instr1 & kImm16Mask) << 16) |
507 (instr2 & kImm16Mask));
516 #if V8_TARGET_ARCH_PPC64
517 const int kLoadIntptrOpcode = LD;
519 const int kLoadIntptrOpcode = LWZ;
522 // Constant pool load sequence detection:
523 // 1) REGULAR access:
524 // load <dst>, kConstantPoolRegister + <offset>
526 // 2) OVERFLOWED access:
527 // addis <scratch>, kConstantPoolRegister, <offset_high>
528 // load <dst>, <scratch> + <offset_low>
529 bool Assembler::IsConstantPoolLoadStart(Address pc,
530 ConstantPoolEntry::Access* access) {
531 Instr instr = instr_at(pc);
532 int opcode = instr & kOpcodeMask;
533 if (!GetRA(instr).is(kConstantPoolRegister)) return false;
534 bool overflowed = (opcode == ADDIS);
537 opcode = instr_at(pc + kInstrSize) & kOpcodeMask;
539 DCHECK(opcode == kLoadIntptrOpcode || opcode == LFD);
542 *access = (overflowed ? ConstantPoolEntry::OVERFLOWED
543 : ConstantPoolEntry::REGULAR);
549 bool Assembler::IsConstantPoolLoadEnd(Address pc,
550 ConstantPoolEntry::Access* access) {
551 Instr instr = instr_at(pc);
552 int opcode = instr & kOpcodeMask;
553 bool overflowed = false;
554 if (!(opcode == kLoadIntptrOpcode || opcode == LFD)) return false;
555 if (!GetRA(instr).is(kConstantPoolRegister)) {
556 instr = instr_at(pc - kInstrSize);
557 opcode = instr & kOpcodeMask;
558 if ((opcode != ADDIS) || !GetRA(instr).is(kConstantPoolRegister)) {
564 *access = (overflowed ? ConstantPoolEntry::OVERFLOWED
565 : ConstantPoolEntry::REGULAR);
571 int Assembler::GetConstantPoolOffset(Address pc,
572 ConstantPoolEntry::Access access,
573 ConstantPoolEntry::Type type) {
574 bool overflowed = (access == ConstantPoolEntry::OVERFLOWED);
576 ConstantPoolEntry::Access access_check =
577 static_cast<ConstantPoolEntry::Access>(-1);
578 DCHECK(IsConstantPoolLoadStart(pc, &access_check));
579 DCHECK(access_check == access);
583 offset = (instr_at(pc) & kImm16Mask) << 16;
584 offset += SIGN_EXT_IMM16(instr_at(pc + kInstrSize) & kImm16Mask);
585 DCHECK(!is_int16(offset));
587 offset = SIGN_EXT_IMM16((instr_at(pc) & kImm16Mask));
593 void Assembler::PatchConstantPoolAccessInstruction(
594 int pc_offset, int offset, ConstantPoolEntry::Access access,
595 ConstantPoolEntry::Type type) {
596 Address pc = buffer_ + pc_offset;
597 bool overflowed = (access == ConstantPoolEntry::OVERFLOWED);
598 CHECK(overflowed != is_int16(offset));
600 ConstantPoolEntry::Access access_check =
601 static_cast<ConstantPoolEntry::Access>(-1);
602 DCHECK(IsConstantPoolLoadStart(pc, &access_check));
603 DCHECK(access_check == access);
606 int hi_word = static_cast<int>(offset >> 16);
607 int lo_word = static_cast<int>(offset & 0xffff);
608 if (lo_word & 0x8000) hi_word++;
610 Instr instr1 = instr_at(pc);
611 Instr instr2 = instr_at(pc + kInstrSize);
612 instr1 &= ~kImm16Mask;
613 instr1 |= (hi_word & kImm16Mask);
614 instr2 &= ~kImm16Mask;
615 instr2 |= (lo_word & kImm16Mask);
616 instr_at_put(pc, instr1);
617 instr_at_put(pc + kInstrSize, instr2);
619 Instr instr = instr_at(pc);
620 instr &= ~kImm16Mask;
621 instr |= (offset & kImm16Mask);
622 instr_at_put(pc, instr);
627 Address Assembler::target_constant_pool_address_at(
628 Address pc, Address constant_pool, ConstantPoolEntry::Access access,
629 ConstantPoolEntry::Type type) {
630 Address addr = constant_pool;
632 addr += GetConstantPoolOffset(pc, access, type);
637 // This sets the branch destination (which gets loaded at the call address).
638 // This is for calls and branches within generated code. The serializer
639 // has already deserialized the mov instructions etc.
640 // There is a FIXED_SEQUENCE assumption here
641 void Assembler::deserialization_set_special_target_at(
642 Address instruction_payload, Code* code, Address target) {
643 set_target_address_at(instruction_payload, code, target);
647 void Assembler::deserialization_set_target_internal_reference_at(
648 Address pc, Address target, RelocInfo::Mode mode) {
649 if (RelocInfo::IsInternalReferenceEncoded(mode)) {
651 set_target_address_at(pc, code, target, SKIP_ICACHE_FLUSH);
653 Memory::Address_at(pc) = target;
658 // This code assumes the FIXED_SEQUENCE of lis/ori
659 void Assembler::set_target_address_at(Address pc, Address constant_pool,
661 ICacheFlushMode icache_flush_mode) {
662 if (FLAG_enable_embedded_constant_pool && constant_pool) {
663 ConstantPoolEntry::Access access;
664 if (IsConstantPoolLoadStart(pc, &access)) {
665 Memory::Address_at(target_constant_pool_address_at(
666 pc, constant_pool, access, ConstantPoolEntry::INTPTR)) = target;
671 Instr instr1 = instr_at(pc);
672 Instr instr2 = instr_at(pc + kInstrSize);
673 // Interpret 2 instructions generated by lis/ori
674 if (IsLis(instr1) && IsOri(instr2)) {
675 #if V8_TARGET_ARCH_PPC64
676 Instr instr4 = instr_at(pc + (3 * kInstrSize));
677 Instr instr5 = instr_at(pc + (4 * kInstrSize));
678 // Needs to be fixed up when mov changes to handle 64-bit values.
679 uint32_t* p = reinterpret_cast<uint32_t*>(pc);
680 uintptr_t itarget = reinterpret_cast<uintptr_t>(target);
682 instr5 &= ~kImm16Mask;
683 instr5 |= itarget & kImm16Mask;
684 itarget = itarget >> 16;
686 instr4 &= ~kImm16Mask;
687 instr4 |= itarget & kImm16Mask;
688 itarget = itarget >> 16;
690 instr2 &= ~kImm16Mask;
691 instr2 |= itarget & kImm16Mask;
692 itarget = itarget >> 16;
694 instr1 &= ~kImm16Mask;
695 instr1 |= itarget & kImm16Mask;
696 itarget = itarget >> 16;
702 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
703 CpuFeatures::FlushICache(p, 5 * kInstrSize);
706 uint32_t* p = reinterpret_cast<uint32_t*>(pc);
707 uint32_t itarget = reinterpret_cast<uint32_t>(target);
708 int lo_word = itarget & kImm16Mask;
709 int hi_word = itarget >> 16;
710 instr1 &= ~kImm16Mask;
712 instr2 &= ~kImm16Mask;
717 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
718 CpuFeatures::FlushICache(p, 2 * kInstrSize);
726 } // namespace v8::internal
728 #endif // V8_PPC_ASSEMBLER_PPC_INL_H_