2 * Copyright (c) 2008 Mark Kettenis
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <sys/param.h>
18 #include <sys/ioctl.h>
19 #include <sys/memrange.h>
21 #include <sys/pciio.h>
23 #include <dev/pci/pcireg.h>
24 #include <dev/pci/pcidevs.h>
33 #include "pciaccess.h"
34 #include "pciaccess_private.h"
37 * This should allow for 16 domains, which should cover everything
38 * except perhaps the really big fridge-sized sparc64 server machines
39 * that are unlikely to have any graphics hardware in them.
44 static int aperturefd = -1;
47 pci_read(int domain, int bus, int dev, int func, uint32_t reg, uint32_t *val)
52 bzero(&io, sizeof(io));
53 io.pi_sel.pc_bus = bus;
54 io.pi_sel.pc_dev = dev;
55 io.pi_sel.pc_func = func;
59 err = ioctl(pcifd[domain], PCIOCREAD, &io);
69 pci_write(int domain, int bus, int dev, int func, uint32_t reg, uint32_t val)
73 bzero(&io, sizeof(io));
74 io.pi_sel.pc_bus = bus;
75 io.pi_sel.pc_dev = dev;
76 io.pi_sel.pc_func = func;
81 return ioctl(pcifd[domain], PCIOCWRITE, &io);
89 pci_device_openbsd_read_rom(struct pci_device *device, void *buffer)
91 struct pci_device_private *priv = (struct pci_device_private *)device;
96 int pci_rom, domain, bus, dev, func;
98 domain = device->domain;
99 if (domain < 0 || domain >= ndomains)
106 if (aperturefd == -1)
109 if (priv->base.rom_size == 0) {
110 #if defined(__alpha__) || defined(__amd64__) || defined(__i386__)
111 if ((device->device_class & 0x00ffff00) ==
112 ((PCI_CLASS_DISPLAY << 16) |
113 (PCI_SUBCLASS_DISPLAY_VGA << 8))) {
121 rom_base = priv->rom_base;
122 rom_size = priv->base.rom_size;
125 pci_read(domain, bus, dev, func, PCI_COMMAND_STATUS_REG, &csr);
126 pci_write(domain, bus, dev, func, PCI_COMMAND_STATUS_REG,
127 csr | PCI_COMMAND_MEM_ENABLE);
128 pci_read(domain, bus, dev, func, PCI_ROM_REG, &rom);
129 pci_write(domain, bus, dev, func, PCI_ROM_REG,
130 rom | PCI_ROM_ENABLE);
133 bios = mmap(NULL, rom_size, PROT_READ, MAP_SHARED,
134 aperturefd, (off_t)rom_base);
135 if (bios == MAP_FAILED)
138 memcpy(buffer, bios, rom_size);
139 munmap(bios, rom_size);
142 /* Restore PCI config space */
143 pci_write(domain, bus, dev, func, PCI_ROM_REG, rom);
144 pci_write(domain, bus, dev, func, PCI_COMMAND_STATUS_REG, csr);
150 pci_nfuncs(int domain, int bus, int dev)
154 if (domain < 0 || domain >= ndomains)
157 if (pci_read(domain, bus, dev, 0, PCI_BHLC_REG, &hdr) != 0)
160 return (PCI_HDRTYPE_MULTIFN(hdr) ? 8 : 1);
164 pci_device_openbsd_map_range(struct pci_device *dev,
165 struct pci_device_mapping *map)
167 struct mem_range_desc mr;
168 struct mem_range_op mo;
169 int prot = PROT_READ;
171 if (map->flags & PCI_DEV_MAP_FLAG_WRITABLE)
174 map->memory = mmap(NULL, map->size, prot, MAP_SHARED, aperturefd,
176 if (map->memory == MAP_FAILED)
178 #if defined(__i386__) || defined(__amd64__)
179 /* No need to set an MTRR if it's the default mode. */
180 if ((map->flags & PCI_DEV_MAP_FLAG_CACHABLE) ||
181 (map->flags & PCI_DEV_MAP_FLAG_WRITE_COMBINE)) {
182 mr.mr_base = map->base;
183 mr.mr_len = map->size;
185 if (map->flags & PCI_DEV_MAP_FLAG_CACHABLE)
186 mr.mr_flags |= MDF_WRITEBACK;
187 if (map->flags & PCI_DEV_MAP_FLAG_WRITE_COMBINE)
188 mr.mr_flags |= MDF_WRITECOMBINE;
189 strlcpy(mr.mr_owner, "pciaccess", sizeof(mr.mr_owner));
192 mo.mo_arg[0] = MEMRANGE_SET_UPDATE;
194 if (ioctl(aperturefd, MEMRANGE_SET, &mo))
195 (void)fprintf(stderr, "mtrr set failed: %s\n",
203 pci_device_openbsd_unmap_range(struct pci_device *dev,
204 struct pci_device_mapping *map)
206 #if defined(__i386__) || defined(__amd64__)
207 struct mem_range_desc mr;
208 struct mem_range_op mo;
210 if ((map->flags & PCI_DEV_MAP_FLAG_CACHABLE) ||
211 (map->flags & PCI_DEV_MAP_FLAG_WRITE_COMBINE)) {
212 mr.mr_base = map->base;
213 mr.mr_len = map->size;
214 mr.mr_flags = MDF_UNCACHEABLE;
215 strlcpy(mr.mr_owner, "pciaccess", sizeof(mr.mr_owner));
218 mo.mo_arg[0] = MEMRANGE_SET_REMOVE;
220 (void)ioctl(aperturefd, MEMRANGE_SET, &mo);
223 return pci_device_generic_unmap_range(dev, map);
227 pci_device_openbsd_read(struct pci_device *dev, void *data,
228 pciaddr_t offset, pciaddr_t size, pciaddr_t *bytes_read)
232 io.pi_sel.pc_bus = dev->bus;
233 io.pi_sel.pc_dev = dev->dev;
234 io.pi_sel.pc_func = dev->func;
238 int toread = MIN(size, 4 - (offset & 0x3));
240 io.pi_reg = (offset & ~0x3);
243 if (ioctl(pcifd[dev->domain], PCIOCREAD, &io) == -1)
246 io.pi_data = htole32(io.pi_data);
247 io.pi_data >>= ((offset & 0x3) * 8);
249 memcpy(data, &io.pi_data, toread);
252 data = (char *)data + toread;
254 *bytes_read += toread;
261 pci_device_openbsd_write(struct pci_device *dev, const void *data,
262 pciaddr_t offset, pciaddr_t size, pciaddr_t *bytes_written)
266 if ((offset % 4) != 0 || (size % 4) != 0)
269 io.pi_sel.pc_bus = dev->bus;
270 io.pi_sel.pc_dev = dev->dev;
271 io.pi_sel.pc_func = dev->func;
277 memcpy(&io.pi_data, data, 4);
279 if (ioctl(pcifd[dev->domain], PCIOCWRITE, &io) == -1)
283 data = (char *)data + 4;
292 pci_system_openbsd_destroy(void)
296 for (domain = 0; domain < ndomains; domain++)
297 close(pcifd[domain]);
302 pci_device_openbsd_probe(struct pci_device *device)
304 struct pci_device_private *priv = (struct pci_device_private *)device;
305 struct pci_mem_region *region;
306 uint64_t reg64, size64;
307 uint32_t bar, reg, size;
308 int domain, bus, dev, func, err;
310 domain = device->domain;
315 err = pci_read(domain, bus, dev, func, PCI_BHLC_REG, ®);
319 priv->header_type = PCI_HDRTYPE_TYPE(reg);
320 if (priv->header_type != 0)
323 region = device->regions;
324 for (bar = PCI_MAPREG_START; bar < PCI_MAPREG_END;
325 bar += sizeof(uint32_t), region++) {
326 err = pci_read(domain, bus, dev, func, bar, ®);
330 /* Probe the size of the region. */
331 err = pci_write(domain, bus, dev, func, bar, ~0);
334 pci_read(domain, bus, dev, func, bar, &size);
335 pci_write(domain, bus, dev, func, bar, reg);
337 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
339 region->base_addr = PCI_MAPREG_IO_ADDR(reg);
340 region->size = PCI_MAPREG_IO_SIZE(size);
342 if (PCI_MAPREG_MEM_PREFETCHABLE(reg))
343 region->is_prefetchable = 1;
344 switch(PCI_MAPREG_MEM_TYPE(reg)) {
345 case PCI_MAPREG_MEM_TYPE_32BIT:
346 case PCI_MAPREG_MEM_TYPE_32BIT_1M:
347 region->base_addr = PCI_MAPREG_MEM_ADDR(reg);
348 region->size = PCI_MAPREG_MEM_SIZE(size);
350 case PCI_MAPREG_MEM_TYPE_64BIT:
356 bar += sizeof(uint32_t);
358 err = pci_read(domain, bus, dev, func, bar, ®);
361 reg64 |= (uint64_t)reg << 32;
363 err = pci_write(domain, bus, dev, func, bar, ~0);
366 pci_read(domain, bus, dev, func, bar, &size);
367 pci_write(domain, bus, dev, func, bar, reg64 >> 32);
368 size64 |= (uint64_t)size << 32;
370 region->base_addr = PCI_MAPREG_MEM64_ADDR(reg64);
371 region->size = PCI_MAPREG_MEM64_SIZE(size64);
378 /* Probe expansion ROM if present */
379 err = pci_read(domain, bus, dev, func, PCI_ROM_REG, ®);
383 err = pci_write(domain, bus, dev, func, PCI_ROM_REG, ~PCI_ROM_ENABLE);
386 pci_read(domain, bus, dev, func, PCI_ROM_REG, &size);
387 pci_write(domain, bus, dev, func, PCI_ROM_REG, reg);
389 if (PCI_ROM_ADDR(reg) != 0) {
390 priv->rom_base = PCI_ROM_ADDR(reg);
391 device->rom_size = PCI_ROM_SIZE(size);
397 static const struct pci_system_methods openbsd_pci_methods = {
398 pci_system_openbsd_destroy,
400 pci_device_openbsd_read_rom,
401 pci_device_openbsd_probe,
402 pci_device_openbsd_map_range,
403 pci_device_openbsd_unmap_range,
404 pci_device_openbsd_read,
405 pci_device_openbsd_write,
406 pci_fill_capabilities_generic
410 pci_system_openbsd_create(void)
412 struct pci_device_private *device;
413 int domain, bus, dev, func, ndevs, nfuncs;
414 char path[MAXPATHLEN];
420 for (domain = 0; domain < sizeof(pcifd) / sizeof(pcifd[0]); domain++) {
421 snprintf(path, sizeof(path), "/dev/pci%d", domain);
422 pcifd[domain] = open(path, O_RDWR);
423 if (pcifd[domain] == -1)
431 pci_sys = calloc(1, sizeof(struct pci_system));
432 if (pci_sys == NULL) {
433 for (domain = 0; domain < ndomains; domain++)
434 close(pcifd[domain]);
439 pci_sys->methods = &openbsd_pci_methods;
442 for (domain = 0; domain < ndomains; domain++) {
443 for (bus = 0; bus < 256; bus++) {
444 for (dev = 0; dev < 32; dev++) {
445 nfuncs = pci_nfuncs(domain, bus, dev);
446 for (func = 0; func < nfuncs; func++) {
447 if (pci_read(domain, bus, dev, func,
448 PCI_ID_REG, ®) != 0)
450 if (PCI_VENDOR(reg) == PCI_VENDOR_INVALID ||
451 PCI_VENDOR(reg) == 0)
460 pci_sys->num_devices = ndevs;
461 pci_sys->devices = calloc(ndevs, sizeof(struct pci_device_private));
462 if (pci_sys->devices == NULL) {
465 for (domain = 0; domain < ndomains; domain++)
466 close(pcifd[domain]);
471 device = pci_sys->devices;
472 for (domain = 0; domain < ndomains; domain++) {
473 for (bus = 0; bus < 256; bus++) {
474 for (dev = 0; dev < 32; dev++) {
475 nfuncs = pci_nfuncs(domain, bus, dev);
476 for (func = 0; func < nfuncs; func++) {
477 if (pci_read(domain, bus, dev, func,
478 PCI_ID_REG, ®) != 0)
480 if (PCI_VENDOR(reg) == PCI_VENDOR_INVALID ||
481 PCI_VENDOR(reg) == 0)
484 device->base.domain = domain;
485 device->base.bus = bus;
486 device->base.dev = dev;
487 device->base.func = func;
488 device->base.vendor_id = PCI_VENDOR(reg);
489 device->base.device_id = PCI_PRODUCT(reg);
491 if (pci_read(domain, bus, dev, func,
492 PCI_CLASS_REG, ®) != 0)
495 device->base.device_class =
497 PCI_CLASS(reg) << 16 |
498 PCI_SUBCLASS(reg) << 8;
499 device->base.revision = PCI_REVISION(reg);
501 if (pci_read(domain, bus, dev, func,
502 PCI_SUBVEND_0, ®) != 0)
505 device->base.subvendor_id = PCI_VENDOR(reg);
506 device->base.subdevice_id = PCI_PRODUCT(reg);
518 pci_system_openbsd_init_dev_mem(int fd)