2 * Author: Yevgeniy Kiveisha <yevgeniy.kiveisha@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
34 #define EN_RXADDR 0x02
36 #define SETUP_RETR 0x04
40 #define OBSERVE_TX 0x08
42 #define RX_ADDR_P0 0x0A
43 #define RX_ADDR_P1 0x0B
44 #define RX_ADDR_P2 0x0C
45 #define RX_ADDR_P3 0x0D
46 #define RX_ADDR_P4 0x0E
47 #define RX_ADDR_P5 0x0F
55 #define FIFO_STATUS 0x17
97 /* Instruction Mnemonics */
98 #define R_REGISTER 0x00
99 #define W_REGISTER 0x20
100 #define REGISTER_MASK 0x1F
101 #define R_RX_PAYLOAD 0x61
102 #define W_TX_PAYLOAD 0xA0
103 #define FLUSH_TX 0xE1
104 #define FLUSH_RX 0xE2
105 #define REUSE_TX_PL 0xE3
108 /* Nrf24l settings */
109 #define mirf_ADDR_LEN 5
110 #define mirf_CONFIG ((1<<EN_CRC) | (0<<CRCO) )
112 #define MAX_BUFFER 32
119 typedef void (* funcPtrVoidVoid) ();
123 NRF24l01 (uint8_t cs);
130 void nrfInitModule (uint8_t chipSelect, uint8_t chipEnable);
131 void nrfConfigModule ();
132 void nrfSend (uint8_t *value);
134 void nrfSetRXaddr (uint8_t * addr);
135 void nrfSetTXaddr (uint8_t * addr);
136 void nrfSetBroadcastAddr (uint8_t * addr);
137 void nrfSetPayload (uint8_t load);
138 bool nrfDataReady ();
139 bool nrfIsSending ();
140 bool nrfRXFifoEmpty ();
141 bool nrfTXFifoEmpty ();
142 void nrfGetData (uint8_t * data);
143 uint8_t nrfGetStatus ();
145 void nrfTransmitSync (uint8_t *dataout, uint8_t len);
146 void nrfTransferSync (uint8_t *dataout ,uint8_t *datain, uint8_t len);
147 void nrfConfigRegister (uint8_t reg, uint8_t value);
148 void nrfReadRegister (uint8_t reg, uint8_t * value, uint8_t len);
149 void nrfWriteRegister (uint8_t reg, uint8_t * value, uint8_t len);
150 void nrfPowerUpRX ();
151 void nrfPowerUpTX ();
152 void nrfPowerDown ();
154 maa_result_t nrfCEHigh ();
155 maa_result_t nrfCELow ();
156 maa_result_t nrfCSOn ();
157 maa_result_t nrfCSOff ();
159 void nrfListenForChannel();
161 uint8_t m_rxBuffer[MAX_BUFFER];
162 uint8_t m_txBuffer[MAX_BUFFER];
164 funcPtrVoidVoid dataRecievedHandler;
166 maa_spi_context m_spi;
172 uint8_t m_localAddress[5];
174 maa_gpio_context m_csnPinCtx;
175 maa_gpio_context m_cePinCtx;