2 * Author: Yevgeniy Kiveisha <yevgeniy.kiveisha@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
32 NRF24l01::NRF24l01 (uint8_t cs) {
34 nrfInitModule (cs, 8);
37 NRF24l01::~NRF24l01 () {
38 maa_result_t error = MAA_SUCCESS;
39 error = maa_spi_stop(m_spi);
40 if (error != MAA_SUCCESS) {
41 maa_result_print(error);
43 error = maa_gpio_close (m_cePinCtx);
44 if (error != MAA_SUCCESS) {
45 maa_result_print(error);
47 error = maa_gpio_close (m_csnPinCtx);
48 if (error != MAA_SUCCESS) {
49 maa_result_print(error);
54 NRF24l01::nrfInitModule (uint8_t chip_select, uint8_t chip_enable) {
55 maa_result_t error = MAA_SUCCESS;
61 m_csnPinCtx = maa_gpio_init (m_csn);
62 if (m_csnPinCtx == NULL) {
63 fprintf (stderr, "Are you sure that pin%d you requested is valid on your platform?", m_csn);
67 m_cePinCtx = maa_gpio_init (m_ce);
68 if (m_cePinCtx == NULL) {
69 fprintf (stderr, "Are you sure that pin%d you requested is valid on your platform?", m_ce);
73 error = maa_gpio_dir (m_csnPinCtx, MAA_GPIO_OUT);
74 if (error != MAA_SUCCESS) {
75 maa_result_print (error);
78 error = maa_gpio_dir (m_cePinCtx, MAA_GPIO_OUT);
79 if (error != MAA_SUCCESS) {
80 maa_result_print (error);
84 m_spi = maa_spi_init (0);
88 NRF24l01::nrfConfigModule() {
90 nrfConfigRegister (RF_CH, m_channel);
92 /* Set length of incoming payload */
93 nrfConfigRegister (RX_PW_P0, m_payload);
94 nrfConfigRegister (RX_PW_P1, m_payload);
95 /* Set length of incoming payload for broadcast */
96 nrfConfigRegister (RX_PW_P2, m_payload);
103 /* Clocks only one byte into the given MiRF register */
105 NRF24l01::nrfConfigRegister(uint8_t reg, uint8_t value) {
107 maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
108 maa_spi_write (m_spi, value);
113 NRF24l01::nrfPowerUpRX() {
116 nrfConfigRegister(CONFIG, mirf_CONFIG | ( (1<<PWR_UP) | (1<<PRIM_RX) ) );
118 nrfConfigRegister(STATUS,(1 << TX_DS) | (1 << MAX_RT));
122 NRF24l01::nrfFlushRX() {
124 maa_spi_write (m_spi, FLUSH_RX);
128 /* Sets the receiving address */
130 NRF24l01::nrfSetRXaddr(uint8_t * addr) {
132 nrfWriteRegister(RX_ADDR_P1, addr, mirf_ADDR_LEN);
136 /* Sets the transmitting address */
138 NRF24l01::nrfSetTXaddr(uint8_t * addr)
140 /* RX_ADDR_P0 must be set to the sending addr for auto ack to work. */
141 nrfWriteRegister (RX_ADDR_P0, addr, mirf_ADDR_LEN);
142 nrfWriteRegister (TX_ADDR, addr, mirf_ADDR_LEN);
145 /* The broadcast address should be 0xFFFFF */
147 NRF24l01::nrfSetBroadcastAddr (uint8_t * addr) {
149 nrfWriteRegister (RX_ADDR_P2, addr, mirf_ADDR_LEN);
154 NRF24l01::nrfSetPayload (uint8_t load) {
159 NRF24l01::nrfWriteRegister(uint8_t reg, uint8_t * value, uint8_t len)
162 maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
163 nrfTransmitSync(value, len);
168 NRF24l01::nrfTransmitSync(uint8_t *dataout, uint8_t len){
170 for(i = 0; i < len; i++) {
171 maa_spi_write (m_spi, dataout[i]);
175 /* Checks if data is available for reading */
177 NRF24l01::nrfDataReady() {
178 uint8_t status = nrfGetStatus();
179 if ( status & (1 << RX_DR) ) {
183 return !nrfRXFifoEmpty();
187 NRF24l01::nrfGetStatus () {
189 nrfReadRegister (STATUS, &rv, 1);
193 /* Reads an array of bytes from the given start position in the MiRF registers. */
195 NRF24l01::nrfReadRegister (uint8_t reg, uint8_t * value, uint8_t len)
198 maa_spi_write (m_spi, R_REGISTER | (REGISTER_MASK & reg));
199 nrfTransferSync (value, value, len);
204 NRF24l01::nrfTransferSync (uint8_t *dataout,uint8_t *datain,uint8_t len) {
206 for(i = 0;i < len;i++) {
207 datain[i] = maa_spi_write (m_spi, dataout[i]);
212 NRF24l01::nrfRXFifoEmpty () {
214 nrfReadRegister (FIFO_STATUS, &fifo_status, sizeof(fifo_status));
215 return (fifo_status & (1 << RX_EMPTY));
218 /* Reads payload bytes into data array */
220 NRF24l01::nrfGetData (uint8_t * data)
223 /* Send cmd to read rx payload */
224 maa_spi_write (m_spi, R_RX_PAYLOAD);
226 nrfTransferSync(data, data, m_payload);
228 nrfConfigRegister(STATUS, (1<<RX_DR));
231 /* Sends a data package to the default address. Be sure to send the correct
232 * amount of bytes as configured as payload on the receiver. */
234 NRF24l01::nrfSend(uint8_t * value) {
236 status = nrfGetStatus();
239 status = nrfGetStatus();
241 if((status & ((1 << TX_DS) | (1 << MAX_RT)))){
245 } // Wait until last paket is send
248 nrfPowerUpTX(); // Set to transmitter mode , Power up
250 maa_spi_write (m_spi, FLUSH_TX); // Write cmd to flush tx fifo
254 maa_spi_write (m_spi, W_TX_PAYLOAD); // Write cmd to write payload
255 nrfTransmitSync(value, m_payload); // Write payload
257 nrfCEHigh(); // Start transmission
261 NRF24l01::nrfSend () {
262 nrfSend (m_txBuffer);
266 NRF24l01::nrfIsSending () {
268 if (m_ptx) { // Sending mode.
269 status = nrfGetStatus();
270 /* if sending successful (TX_DS) or max retries exceded (MAX_RT). */
271 if((status & ((1 << TX_DS) | (1 << MAX_RT)))){
281 NRF24l01::nrfPowerUpTX () {
283 nrfConfigRegister (CONFIG, mirf_CONFIG | ( (1<<PWR_UP) | (0<<PRIM_RX) ) );
287 NRF24l01::nrfPowerDown () {
289 nrfConfigRegister (CONFIG, mirf_CONFIG);
293 NRF24l01::nrfCEHigh () {
294 return maa_gpio_write (m_cePinCtx, HIGH);
298 NRF24l01::nrfCELow () {
299 return maa_gpio_write (m_cePinCtx, LOW);
303 NRF24l01::nrfCSOn () {
304 return maa_gpio_write (m_csnPinCtx, LOW);
308 NRF24l01::nrfCSOff () {
309 return maa_gpio_write (m_csnPinCtx, HIGH);
313 NRF24l01::nrfListenForChannel() {
314 if(!nrfIsSending() && nrfDataReady()) {
315 nrfGetData(m_rxBuffer);
316 dataRecievedHandler(); /* let know that data arrived */