2 # Copyright (c) 2012 The Native Client Authors. All rights reserved.
3 # Use of this source code is governed by a BSD-style license that can be
4 # found in the LICENSE file.
8 if env.Bit('bitcode') and not env.Bit('pnacl_generate_pexe'):
10 env.PNaClForceNative()
12 infoleak_sources = ['test_infoleak.c']
13 if env.Bit('target_arm') and not env.Bit('pnacl_generate_pexe'):
14 infoleak_sources.append('test_infoleak_arm.S')
15 elif env.Bit('target_mips32'):
16 infoleak_sources.append('test_infoleak_mips.S')
18 nexe = env.ComponentProgram('test_infoleak', infoleak_sources,
19 EXTRA_LIBS=['${NONIRT_LIBS}'])
21 node = env.CommandSelLdrTestNacl('test_infoleak.out', nexe)
22 env.AddNodeToTestSuite(node,
23 ['small_tests', 'sel_ldr_tests'],
25 # Valgrind apparently doesn't implement
26 # stmxcsr/ldmxcsr correctly. stmxcsr seems to do
27 # nothing, and ldmxcsr always reads back the
28 # hardware's power-up default value of 0x1f80.
29 is_broken=env.IsRunningUnderValgrind())
31 if not env.Bit('pnacl_generate_pexe') and not env.Bit('target_mips32'):
32 fpu_cw_sources = ['test_fpu_control_word.c']
33 if env.Bit('target_arm'):
34 fpu_cw_sources.append('test_fpu_control_word_arm.S')
35 nexe = env.ComponentProgram('test_fpu_control_word', fpu_cw_sources,
36 EXTRA_LIBS=['${NONIRT_LIBS}'])
37 node = env.CommandSelLdrTestNacl('test_fpu_control_word.out', nexe)
38 env.AddNodeToTestSuite(node,
39 ['small_tests', 'sel_ldr_tests'],
40 'run_fpu_control_word_test',
41 # Valgrind apparenty doesn't implement
42 # fnstcw;fldcw correctly.
43 is_broken=env.IsRunningUnderValgrind())