2 * Author: Brendan Le Foll <brendan.le.foll@intel.com>
3 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
4 * Copyright (c) 2014 Intel Corporation.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include "mraa_internal.h"
32 #include "intel_galileo_rev_d.h"
33 #include "intel_galileo_rev_g.h"
37 //static mraa_pininfo_t* pindata;
38 static mraa_board_t* plat = NULL;
39 static mraa_platform_t platform_type = MRAA_UNKNOWN_PLATFORM;
40 static mraa_adv_func* advance = NULL;
52 mraa_result_t __attribute__((constructor))
56 /** Once more board definitions have been added,
57 * A method for detecting them will need to be devised.
60 return MRAA_ERROR_PLATFORM_ALREADY_INITIALISED;
63 // Initialise python threads, this allows use to grab the GIL when we are
68 // detect a galileo gen2 board
70 // let getline allocate memory for *line
72 FILE *fh = fopen("/sys/devices/virtual/dmi/id/board_name", "r");
74 if (getline(&line, &len, fh) != -1) {
75 if (strncmp(line, "GalileoGen2", 10) == 0) {
76 platform_type = MRAA_INTEL_GALILEO_GEN2;
78 platform_type = MRAA_INTEL_GALILEO_GEN1;
85 advance = (mraa_adv_func*) malloc(sizeof(mraa_adv_func));
86 switch(platform_type) {
87 case MRAA_INTEL_GALILEO_GEN2:
88 plat = mraa_intel_galileo_gen2(advance);
90 case MRAA_INTEL_GALILEO_GEN1:
91 plat = mraa_intel_galileo_rev_d(advance);
94 plat = mraa_intel_galileo_rev_d(advance);
95 fprintf(stderr, "Platform not found, initialising MRAA_INTEL_GALILEO_GEN1\n");
109 mraa_set_priority(const unsigned int priority)
111 struct sched_param sched_s;
113 memset(&sched_s, 0, sizeof(struct sched_param));
114 if (priority > sched_get_priority_max(SCHED_RR)) {
115 sched_s.sched_priority = sched_get_priority_max(SCHED_RR);
118 sched_s.sched_priority = priority;
121 return sched_setscheduler(0, SCHED_RR, &sched_s);
125 mraa_setup_mux_mapped(mraa_pin_t meta)
128 for (mi = 0; mi < meta.mux_total; mi++) {
129 mraa_gpio_context mux_i;
130 mux_i = mraa_gpio_init_raw(meta.mux[mi].pin);
132 return MRAA_ERROR_INVALID_HANDLE;
133 mraa_gpio_dir(mux_i, MRAA_GPIO_OUT);
134 if (mraa_gpio_write(mux_i, meta.mux[mi].value) != MRAA_SUCCESS)
135 return MRAA_ERROR_INVALID_RESOURCE;
141 mraa_setup_gpio(int pin)
146 if (pin < 0 || pin > plat->phy_pin_count)
149 if(plat->pins[pin].capabilites.gpio != 1)
152 if (plat->pins[pin].gpio.mux_total > 0)
153 if (mraa_setup_mux_mapped(plat->pins[pin].gpio) != MRAA_SUCCESS)
155 return plat->pins[pin].gpio.pinmap;
159 mraa_setup_aio(int aio)
164 if (aio < 0 || aio > plat->aio_count)
167 int pin = aio + plat->gpio_count;
169 if (plat->pins[pin].capabilites.aio != 1)
172 if (plat->pins[pin].aio.mux_total > 0)
173 if (mraa_setup_mux_mapped(plat->pins[pin].aio) != MRAA_SUCCESS)
175 return plat->pins[pin].aio.pinmap;
179 mraa_setup_i2c(int bus)
184 if (plat->i2c_bus_count >! 0) {
185 fprintf(stderr, "No i2c buses defined in platform");
188 if (bus >= plat->i2c_bus_count) {
189 fprintf(stderr, "Above i2c bus count");
193 int pos = plat->i2c_bus[bus].sda;
194 if (plat->pins[pos].i2c.mux_total > 0)
195 if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
198 pos = plat->i2c_bus[bus].scl;
199 if (plat->pins[pos].i2c.mux_total > 0)
200 if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
203 return plat->i2c_bus[bus].bus_id;
207 mraa_setup_spi(int bus)
212 if (plat->spi_bus_count >! 0) {
213 fprintf(stderr, "No spi buses defined in platform");
216 if (bus >= plat->spi_bus_count) {
217 fprintf(stderr, "Above spi bus count");
221 int pos = plat->spi_bus[bus].sclk;
222 if (plat->pins[pos].spi.mux_total > 0)
223 if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
226 pos = plat->spi_bus[bus].mosi;
227 if (plat->pins[pos].spi.mux_total > 0)
228 if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
231 pos = plat->spi_bus[bus].miso;
232 if (plat->pins[pos].spi.mux_total > 0)
233 if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
236 mraa_spi_bus_t *spi = &(plat->spi_bus[bus]);
241 mraa_setup_pwm(int pin)
246 if (plat->pins[pin].capabilites.pwm != 1)
249 if (plat->pins[pin].capabilites.gpio == 1) {
250 mraa_gpio_context mux_i;
251 mux_i = mraa_gpio_init_raw(plat->pins[pin].gpio.pinmap);
254 if (mraa_gpio_dir(mux_i, MRAA_GPIO_OUT) != MRAA_SUCCESS)
256 // Current REV D quirk. //TODO GEN 2
257 if (mraa_gpio_write(mux_i, 1) != MRAA_SUCCESS)
259 if (mraa_gpio_close(mux_i) != MRAA_SUCCESS)
263 if (plat->pins[pin].pwm.mux_total > 0)
264 if (mraa_setup_mux_mapped(plat->pins[pin].pwm) != MRAA_SUCCESS)
268 ret = (mraa_pin_t*) malloc(sizeof(mraa_pin_t));
269 ret->pinmap = plat->pins[pin].pwm.pinmap;
270 ret->parent_id = plat->pins[pin].pwm.parent_id;
275 mraa_result_print(mraa_result_t result)
278 case MRAA_SUCCESS: fprintf(stderr, "MRAA: SUCCESS\n");
280 case MRAA_ERROR_FEATURE_NOT_IMPLEMENTED:
281 fprintf(stderr, "MRAA: Feature not implemented.\n");
283 case MRAA_ERROR_FEATURE_NOT_SUPPORTED:
284 fprintf(stderr, "MRAA: Feature not supported by Hardware.\n");
286 case MRAA_ERROR_INVALID_VERBOSITY_LEVEL:
287 fprintf(stderr, "MRAA: Invalid verbosity level.\n");
289 case MRAA_ERROR_INVALID_PARAMETER:
290 fprintf(stderr, "MRAA: Invalid parameter.\n");
292 case MRAA_ERROR_INVALID_HANDLE:
293 fprintf(stderr, "MRAA: Invalid Handle.\n");
295 case MRAA_ERROR_NO_RESOURCES:
296 fprintf(stderr, "MRAA: No resources.\n");
298 case MRAA_ERROR_INVALID_RESOURCE:
299 fprintf(stderr, "MRAA: Invalid resource.\n");
301 case MRAA_ERROR_INVALID_QUEUE_TYPE:
302 fprintf(stderr, "MRAA: Invalid Queue Type.\n");
304 case MRAA_ERROR_NO_DATA_AVAILABLE:
305 fprintf(stderr, "MRAA: No Data available.\n");
307 case MRAA_ERROR_INVALID_PLATFORM:
308 fprintf(stderr, "MRAA: Platform not recognised.\n");
310 case MRAA_ERROR_PLATFORM_NOT_INITIALISED:
311 fprintf(stderr, "MRAA: Platform not initialised.\n");
313 case MRAA_ERROR_PLATFORM_ALREADY_INITIALISED:
314 fprintf(stderr, "MRAA: Platform already initialised.\n");
316 case MRAA_ERROR_UNSPECIFIED:
317 fprintf(stderr, "MRAA: Unspecified Error.\n");
319 default: fprintf(stderr, "MRAA: Unrecognised error.\n");
325 mraa_pin_mode_test(int pin, mraa_pinmodes_t mode)
332 if (pin > plat->phy_pin_count || pin < 0)
337 if (plat->pins[pin].capabilites.valid == 1)
341 if (plat->pins[pin].capabilites.gpio ==1)
345 if (plat->pins[pin].capabilites.pwm ==1)
348 case MRAA_PIN_FAST_GPIO:
349 if (plat->pins[pin].capabilites.fast_gpio ==1)
353 if (plat->pins[pin].capabilites.spi ==1)
357 if (plat->pins[pin].capabilites.i2c ==1)
361 if (pin < plat->aio_count)
362 pin = pin + plat->gpio_count;
363 if (plat->pins[pin].capabilites.aio ==1)
372 mraa_setup_mmap_gpio(int pin)
377 if (plat->pins[pin].capabilites.fast_gpio != 1)
380 if (plat->pins[pin].mmap.gpio.mux_total > 0)
381 if (mraa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MRAA_SUCCESS)
384 if (mraa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MRAA_SUCCESS)
386 mraa_mmap_pin_t *ret = &(plat->pins[pin].mmap);
391 mraa_swap_complex_gpio(int pin, int out)
394 return MRAA_ERROR_INVALID_PLATFORM;
396 switch (platform_type) {
397 case MRAA_INTEL_GALILEO_GEN2:
398 if (plat->pins[pin].gpio.complex_cap.complex_pin != 1)
400 if (plat->pins[pin].gpio.complex_cap.output_en == 1) {
401 mraa_gpio_context output_e;
402 output_e = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable);
403 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS)
404 return MRAA_ERROR_INVALID_RESOURCE;
406 if (plat->pins[pin].gpio.complex_cap.output_en_high == 1)
413 if (mraa_gpio_write(output_e, output_val) != MRAA_SUCCESS)
414 return MRAA_ERROR_INVALID_RESOURCE;
416 //if (plat->pins[pin].gpio.complex_cap.pullup_en == 1) {
417 // mraa_gpio_context pullup_e;
418 // pullup_e = mraa_gpio_init_raw(plat->pins[pin].gpio.pullup_enable);
419 // if (mraa_gpio_mode(pullup_e, MRAA_GPIO_HIZ) != MRAA_SUCCESS)
420 // return MRAA_ERROR_INVALID_RESOURCE;
423 default: return MRAA_SUCCESS;
427 mraa_platform_t mraa_get_platform_type()
429 return platform_type;
438 if (plat->aio_count == 0)
441 return plat->adc_raw;
445 mraa_adc_supported_bits()
450 if (plat->aio_count == 0)
453 return plat->adc_supported;