2 // Copyright (c) 1994-2006 Sun Microsystems Inc.
3 // All Rights Reserved.
5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are
9 // - Redistributions of source code must retain the above copyright notice,
10 // this list of conditions and the following disclaimer.
12 // - Redistribution in binary form must reproduce the above copyright
13 // notice, this list of conditions and the following disclaimer in the
14 // documentation and/or other materials provided with the distribution.
16 // - Neither the name of Sun Microsystems or the names of contributors may
17 // be used to endorse or promote products derived from this software without
18 // specific prior written permission.
20 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
21 // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 // PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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28 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
29 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 // The original source code covered by the above license above has been
33 // modified significantly by Google Inc.
34 // Copyright 2012 the V8 project authors. All rights reserved.
37 #ifndef V8_MIPS_ASSEMBLER_MIPS_INL_H_
38 #define V8_MIPS_ASSEMBLER_MIPS_INL_H_
40 #include "src/mips64/assembler-mips64.h"
42 #include "src/assembler.h"
43 #include "src/debug.h"
50 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(FPU); }
53 // -----------------------------------------------------------------------------
54 // Operand and MemOperand.
56 Operand::Operand(int64_t immediate, RelocInfo::Mode rmode) {
63 Operand::Operand(const ExternalReference& f) {
65 imm64_ = reinterpret_cast<int64_t>(f.address());
66 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
70 Operand::Operand(Smi* value) {
72 imm64_ = reinterpret_cast<intptr_t>(value);
73 rmode_ = RelocInfo::NONE32;
77 Operand::Operand(Register rm) {
82 bool Operand::is_reg() const {
83 return rm_.is_valid();
87 int Register::NumAllocatableRegisters() {
88 return kMaxNumAllocatableRegisters;
92 int DoubleRegister::NumRegisters() {
93 return FPURegister::kMaxNumRegisters;
97 int DoubleRegister::NumAllocatableRegisters() {
98 return FPURegister::kMaxNumAllocatableRegisters;
102 int DoubleRegister::NumAllocatableAliasedRegisters() {
103 return NumAllocatableRegisters();
107 int FPURegister::ToAllocationIndex(FPURegister reg) {
108 DCHECK(reg.code() % 2 == 0);
109 DCHECK(reg.code() / 2 < kMaxNumAllocatableRegisters);
110 DCHECK(reg.is_valid());
111 DCHECK(!reg.is(kDoubleRegZero));
112 DCHECK(!reg.is(kLithiumScratchDouble));
113 return (reg.code() / 2);
117 // -----------------------------------------------------------------------------
120 void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
121 if (IsInternalReference(rmode_)) {
122 // Absolute code pointer inside code object moves with the code object.
123 byte* p = reinterpret_cast<byte*>(pc_);
124 int count = Assembler::RelocateInternalReference(p, delta);
125 CpuFeatures::FlushICache(p, count * sizeof(uint32_t));
130 Address RelocInfo::target_address() {
131 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
132 return Assembler::target_address_at(pc_, host_);
136 Address RelocInfo::target_address_address() {
137 DCHECK(IsCodeTarget(rmode_) ||
138 IsRuntimeEntry(rmode_) ||
139 rmode_ == EMBEDDED_OBJECT ||
140 rmode_ == EXTERNAL_REFERENCE);
141 // Read the address of the word containing the target_address in an
142 // instruction stream.
143 // The only architecture-independent user of this function is the serializer.
144 // The serializer uses it to find out how many raw bytes of instruction to
145 // output before the next target.
146 // For an instruction like LUI/ORI where the target bits are mixed into the
147 // instruction bits, the size of the target will be zero, indicating that the
148 // serializer should not step forward in memory after a target is resolved
149 // and written. In this case the target_address_address function should
150 // return the end of the instructions to be patched, allowing the
151 // deserializer to deserialize the instructions as raw bytes and put them in
152 // place, ready to be patched with the target. After jump optimization,
153 // that is the address of the instruction that follows J/JAL/JR/JALR
155 // return reinterpret_cast<Address>(
156 // pc_ + Assembler::kInstructionsFor32BitConstant * Assembler::kInstrSize);
157 return reinterpret_cast<Address>(
158 pc_ + Assembler::kInstructionsFor64BitConstant * Assembler::kInstrSize);
162 Address RelocInfo::constant_pool_entry_address() {
168 int RelocInfo::target_address_size() {
169 return Assembler::kSpecialTargetSize;
173 void RelocInfo::set_target_address(Address target,
174 WriteBarrierMode write_barrier_mode,
175 ICacheFlushMode icache_flush_mode) {
176 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
177 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
178 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
179 host() != NULL && IsCodeTarget(rmode_)) {
180 Object* target_code = Code::GetCodeFromTargetAddress(target);
181 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
182 host(), this, HeapObject::cast(target_code));
187 Address Assembler::target_address_from_return_address(Address pc) {
188 return pc - kCallTargetAddressOffset;
192 Address Assembler::break_address_from_return_address(Address pc) {
193 return pc - Assembler::kPatchDebugBreakSlotReturnOffset;
197 Object* RelocInfo::target_object() {
198 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
199 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_));
203 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
204 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
205 return Handle<Object>(reinterpret_cast<Object**>(
206 Assembler::target_address_at(pc_, host_)));
210 void RelocInfo::set_target_object(Object* target,
211 WriteBarrierMode write_barrier_mode,
212 ICacheFlushMode icache_flush_mode) {
213 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
214 Assembler::set_target_address_at(pc_, host_,
215 reinterpret_cast<Address>(target),
217 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
219 target->IsHeapObject()) {
220 host()->GetHeap()->incremental_marking()->RecordWrite(
221 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
226 Address RelocInfo::target_reference() {
227 DCHECK(rmode_ == EXTERNAL_REFERENCE);
228 return Assembler::target_address_at(pc_, host_);
232 Address RelocInfo::target_runtime_entry(Assembler* origin) {
233 DCHECK(IsRuntimeEntry(rmode_));
234 return target_address();
238 void RelocInfo::set_target_runtime_entry(Address target,
239 WriteBarrierMode write_barrier_mode,
240 ICacheFlushMode icache_flush_mode) {
241 DCHECK(IsRuntimeEntry(rmode_));
242 if (target_address() != target)
243 set_target_address(target, write_barrier_mode, icache_flush_mode);
247 Handle<Cell> RelocInfo::target_cell_handle() {
248 DCHECK(rmode_ == RelocInfo::CELL);
249 Address address = Memory::Address_at(pc_);
250 return Handle<Cell>(reinterpret_cast<Cell**>(address));
254 Cell* RelocInfo::target_cell() {
255 DCHECK(rmode_ == RelocInfo::CELL);
256 return Cell::FromValueAddress(Memory::Address_at(pc_));
260 void RelocInfo::set_target_cell(Cell* cell,
261 WriteBarrierMode write_barrier_mode,
262 ICacheFlushMode icache_flush_mode) {
263 DCHECK(rmode_ == RelocInfo::CELL);
264 Address address = cell->address() + Cell::kValueOffset;
265 Memory::Address_at(pc_) = address;
266 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
267 // TODO(1550) We are passing NULL as a slot because cell can never be on
268 // evacuation candidate.
269 host()->GetHeap()->incremental_marking()->RecordWrite(
275 static const int kNoCodeAgeSequenceLength = 9 * Assembler::kInstrSize;
278 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
279 UNREACHABLE(); // This should never be reached on Arm.
280 return Handle<Object>();
284 Code* RelocInfo::code_age_stub() {
285 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
286 return Code::GetCodeFromTargetAddress(
287 Assembler::target_address_at(pc_ + Assembler::kInstrSize, host_));
291 void RelocInfo::set_code_age_stub(Code* stub,
292 ICacheFlushMode icache_flush_mode) {
293 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
294 Assembler::set_target_address_at(pc_ + Assembler::kInstrSize,
296 stub->instruction_start());
300 Address RelocInfo::call_address() {
301 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
302 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
303 // The pc_ offset of 0 assumes mips patched return sequence per
304 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
305 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
306 return Assembler::target_address_at(pc_, host_);
310 void RelocInfo::set_call_address(Address target) {
311 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
312 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
313 // The pc_ offset of 0 assumes mips patched return sequence per
314 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
315 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
316 Assembler::set_target_address_at(pc_, host_, target);
317 if (host() != NULL) {
318 Object* target_code = Code::GetCodeFromTargetAddress(target);
319 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
320 host(), this, HeapObject::cast(target_code));
325 Object* RelocInfo::call_object() {
326 return *call_object_address();
330 Object** RelocInfo::call_object_address() {
331 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
332 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
333 return reinterpret_cast<Object**>(pc_ + 6 * Assembler::kInstrSize);
337 void RelocInfo::set_call_object(Object* target) {
338 *call_object_address() = target;
342 void RelocInfo::WipeOut() {
343 DCHECK(IsEmbeddedObject(rmode_) ||
344 IsCodeTarget(rmode_) ||
345 IsRuntimeEntry(rmode_) ||
346 IsExternalReference(rmode_));
347 Assembler::set_target_address_at(pc_, host_, NULL);
351 bool RelocInfo::IsPatchedReturnSequence() {
352 Instr instr0 = Assembler::instr_at(pc_); // lui.
353 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize); // ori.
354 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize); // dsll.
355 Instr instr3 = Assembler::instr_at(pc_ + 3 * Assembler::kInstrSize); // ori.
356 Instr instr4 = Assembler::instr_at(pc_ + 4 * Assembler::kInstrSize); // jalr.
358 bool patched_return = ((instr0 & kOpcodeMask) == LUI &&
359 (instr1 & kOpcodeMask) == ORI &&
360 (instr2 & kFunctionFieldMask) == DSLL &&
361 (instr3 & kOpcodeMask) == ORI &&
362 (instr4 & kFunctionFieldMask) == JALR);
363 return patched_return;
367 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
368 Instr current_instr = Assembler::instr_at(pc_);
369 return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
373 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
374 RelocInfo::Mode mode = rmode();
375 if (mode == RelocInfo::EMBEDDED_OBJECT) {
376 visitor->VisitEmbeddedPointer(this);
377 } else if (RelocInfo::IsCodeTarget(mode)) {
378 visitor->VisitCodeTarget(this);
379 } else if (mode == RelocInfo::CELL) {
380 visitor->VisitCell(this);
381 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
382 visitor->VisitExternalReference(this);
383 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
384 visitor->VisitCodeAgeSequence(this);
385 } else if (((RelocInfo::IsJSReturn(mode) &&
386 IsPatchedReturnSequence()) ||
387 (RelocInfo::IsDebugBreakSlot(mode) &&
388 IsPatchedDebugBreakSlotSequence())) &&
389 isolate->debug()->has_break_points()) {
390 visitor->VisitDebugTarget(this);
391 } else if (RelocInfo::IsRuntimeEntry(mode)) {
392 visitor->VisitRuntimeEntry(this);
397 template<typename StaticVisitor>
398 void RelocInfo::Visit(Heap* heap) {
399 RelocInfo::Mode mode = rmode();
400 if (mode == RelocInfo::EMBEDDED_OBJECT) {
401 StaticVisitor::VisitEmbeddedPointer(heap, this);
402 } else if (RelocInfo::IsCodeTarget(mode)) {
403 StaticVisitor::VisitCodeTarget(heap, this);
404 } else if (mode == RelocInfo::CELL) {
405 StaticVisitor::VisitCell(heap, this);
406 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
407 StaticVisitor::VisitExternalReference(this);
408 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
409 StaticVisitor::VisitCodeAgeSequence(heap, this);
410 } else if (heap->isolate()->debug()->has_break_points() &&
411 ((RelocInfo::IsJSReturn(mode) &&
412 IsPatchedReturnSequence()) ||
413 (RelocInfo::IsDebugBreakSlot(mode) &&
414 IsPatchedDebugBreakSlotSequence()))) {
415 StaticVisitor::VisitDebugTarget(heap, this);
416 } else if (RelocInfo::IsRuntimeEntry(mode)) {
417 StaticVisitor::VisitRuntimeEntry(this);
422 // -----------------------------------------------------------------------------
426 void Assembler::CheckBuffer() {
427 if (buffer_space() <= kGap) {
433 void Assembler::CheckTrampolinePoolQuick() {
434 if (pc_offset() >= next_buffer_check_) {
435 CheckTrampolinePool();
440 void Assembler::emit(Instr x) {
441 if (!is_buffer_growth_blocked()) {
444 *reinterpret_cast<Instr*>(pc_) = x;
446 CheckTrampolinePoolQuick();
450 void Assembler::emit(uint64_t x) {
451 if (!is_buffer_growth_blocked()) {
454 *reinterpret_cast<uint64_t*>(pc_) = x;
455 pc_ += kInstrSize * 2;
456 CheckTrampolinePoolQuick();
460 } } // namespace v8::internal
462 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_