1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
8 #include "src/assembler.h"
9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h"
15 // Forward declaration.
18 // Reserved Register Usage Summary.
20 // Registers t8, t9, and at are reserved for use by the MacroAssembler.
22 // The programmer should know that the MacroAssembler may clobber these three,
23 // but won't touch other registers except in special cases.
25 // Per the MIPS ABI, register t9 must be used for indirect function call
26 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when
27 // trying to update gp register for position-independent-code. Whenever
28 // MIPS generated code calls C code, it must be via t9 register.
31 // Flags used for LeaveExitFrame function.
32 enum LeaveExitFrameMode {
34 NO_EMIT_RETURN = false
37 // Flags used for AllocateHeapNumber
45 // Flags used for the ObjectToDoubleFPURegister function.
46 enum ObjectToDoubleFlags {
48 NO_OBJECT_TO_DOUBLE_FLAGS = 0,
49 // Object is known to be a non smi.
50 OBJECT_NOT_SMI = 1 << 0,
51 // Don't load NaNs or infinities, branch to the non number case instead.
52 AVOID_NANS_AND_INFINITIES = 1 << 1
55 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls.
56 enum BranchDelaySlot {
61 // Flags used for the li macro-assembler function.
63 // If the constant value can be represented in just 16 bits, then
64 // optimize the li to use a single instruction, rather than lui/ori pair.
66 // Always use 2 instructions (lui/ori pair), even if the constant could
67 // be loaded with just one, so that this value is patchable later.
72 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
73 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
74 enum PointersToHereCheck {
75 kPointersToHereMaybeInteresting,
76 kPointersToHereAreAlwaysInteresting
78 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved };
80 Register GetRegisterThatIsNotOneOf(Register reg1,
81 Register reg2 = no_reg,
82 Register reg3 = no_reg,
83 Register reg4 = no_reg,
84 Register reg5 = no_reg,
85 Register reg6 = no_reg);
87 bool AreAliased(Register reg1,
89 Register reg3 = no_reg,
90 Register reg4 = no_reg,
91 Register reg5 = no_reg,
92 Register reg6 = no_reg,
93 Register reg7 = no_reg,
94 Register reg8 = no_reg);
97 // -----------------------------------------------------------------------------
98 // Static helper functions.
100 inline MemOperand ContextOperand(Register context, int index) {
101 return MemOperand(context, Context::SlotOffset(index));
105 inline MemOperand GlobalObjectOperand() {
106 return ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX);
110 // Generate a MemOperand for loading a field from an object.
111 inline MemOperand FieldMemOperand(Register object, int offset) {
112 return MemOperand(object, offset - kHeapObjectTag);
116 // Generate a MemOperand for storing arguments 5..N on the stack
117 // when calling CallCFunction().
118 inline MemOperand CFunctionArgumentOperand(int index) {
119 DCHECK(index > kCArgSlotCount);
120 // Argument 5 takes the slot just past the four Arg-slots.
121 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize;
122 return MemOperand(sp, offset);
126 // MacroAssembler implements a collection of frequently used macros.
127 class MacroAssembler: public Assembler {
129 // The isolate parameter can be NULL if the macro assembler should
130 // not use isolate-dependent functionality. In this case, it's the
131 // responsibility of the caller to never invoke such function on the
133 MacroAssembler(Isolate* isolate, void* buffer, int size);
136 #define COND_TYPED_ARGS Condition cond, Register r1, const Operand& r2
137 #define COND_ARGS cond, r1, r2
139 // Cases when relocation is not needed.
140 #define DECLARE_NORELOC_PROTOTYPE(Name, target_type) \
141 void Name(target_type target, BranchDelaySlot bd = PROTECT); \
142 inline void Name(BranchDelaySlot bd, target_type target) { \
145 void Name(target_type target, \
147 BranchDelaySlot bd = PROTECT); \
148 inline void Name(BranchDelaySlot bd, \
149 target_type target, \
151 Name(target, COND_ARGS, bd); \
154 #define DECLARE_BRANCH_PROTOTYPES(Name) \
155 DECLARE_NORELOC_PROTOTYPE(Name, Label*) \
156 DECLARE_NORELOC_PROTOTYPE(Name, int16_t)
158 DECLARE_BRANCH_PROTOTYPES(Branch)
159 DECLARE_BRANCH_PROTOTYPES(BranchAndLink)
160 DECLARE_BRANCH_PROTOTYPES(BranchShort)
162 #undef DECLARE_BRANCH_PROTOTYPES
163 #undef COND_TYPED_ARGS
167 // Jump, Call, and Ret pseudo instructions implementing inter-working.
168 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
169 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
171 void Jump(Register target, COND_ARGS);
172 void Jump(intptr_t target, RelocInfo::Mode rmode, COND_ARGS);
173 void Jump(Address target, RelocInfo::Mode rmode, COND_ARGS);
174 void Jump(Handle<Code> code, RelocInfo::Mode rmode, COND_ARGS);
175 static int CallSize(Register target, COND_ARGS);
176 void Call(Register target, COND_ARGS);
177 static int CallSize(Address target, RelocInfo::Mode rmode, COND_ARGS);
178 void Call(Address target, RelocInfo::Mode rmode, COND_ARGS);
179 int CallSize(Handle<Code> code,
180 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
181 TypeFeedbackId ast_id = TypeFeedbackId::None(),
183 void Call(Handle<Code> code,
184 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
185 TypeFeedbackId ast_id = TypeFeedbackId::None(),
188 inline void Ret(BranchDelaySlot bd, Condition cond = al,
189 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
190 Ret(cond, rs, rt, bd);
193 void Branch(Label* L,
196 Heap::RootListIndex index,
197 BranchDelaySlot bdslot = PROTECT);
201 // Emit code to discard a non-negative number of pointer-sized elements
202 // from the stack, clobbering only the sp register.
204 Condition cond = cc_always,
205 Register reg = no_reg,
206 const Operand& op = Operand(no_reg));
208 // Trivial case of DropAndRet that utilizes the delay slot and only emits
210 void DropAndRet(int drop);
212 void DropAndRet(int drop,
217 // Swap two registers. If the scratch register is omitted then a slightly
218 // less efficient form using xor instead of mov is emitted.
219 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
221 void Call(Label* target);
223 inline void Move(Register dst, Register src) {
229 inline void Move(FPURegister dst, FPURegister src) {
235 inline void Move(Register dst_low, Register dst_high, FPURegister src) {
237 Mfhc1(dst_high, src);
240 inline void FmoveHigh(Register dst_high, FPURegister src) {
241 Mfhc1(dst_high, src);
244 inline void FmoveHigh(FPURegister dst, Register src_high) {
245 Mthc1(src_high, dst);
248 inline void FmoveLow(Register dst_low, FPURegister src) {
252 void FmoveLow(FPURegister dst, Register src_low);
254 inline void Move(FPURegister dst, Register src_low, Register src_high) {
256 Mthc1(src_high, dst);
259 void Move(FPURegister dst, float imm);
260 void Move(FPURegister dst, double imm);
263 void Movz(Register rd, Register rs, Register rt);
264 void Movn(Register rd, Register rs, Register rt);
265 void Movt(Register rd, Register rs, uint16_t cc = 0);
266 void Movf(Register rd, Register rs, uint16_t cc = 0);
268 void Clz(Register rd, Register rs);
270 // Jump unconditionally to given label.
271 // We NEED a nop in the branch delay slot, as it used by v8, for example in
272 // CodeGenerator::ProcessDeferred().
273 // Currently the branch delay slot is filled by the MacroAssembler.
274 // Use rather b(Label) for code generation.
279 void Load(Register dst, const MemOperand& src, Representation r);
280 void Store(Register src, const MemOperand& dst, Representation r);
282 // Load an object from the root table.
283 void LoadRoot(Register destination,
284 Heap::RootListIndex index);
285 void LoadRoot(Register destination,
286 Heap::RootListIndex index,
287 Condition cond, Register src1, const Operand& src2);
289 // Store an object to the root table.
290 void StoreRoot(Register source,
291 Heap::RootListIndex index);
292 void StoreRoot(Register source,
293 Heap::RootListIndex index,
294 Condition cond, Register src1, const Operand& src2);
296 // ---------------------------------------------------------------------------
299 void IncrementalMarkingRecordWriteHelper(Register object,
303 enum RememberedSetFinalAction {
309 // Record in the remembered set the fact that we have a pointer to new space
310 // at the address pointed to by the addr register. Only works if addr is not
312 void RememberedSetHelper(Register object, // Used for debug code.
315 SaveFPRegsMode save_fp,
316 RememberedSetFinalAction and_then);
318 void CheckPageFlag(Register object,
322 Label* condition_met);
324 // Check if object is in new space. Jumps if the object is not in new space.
325 // The register scratch can be object itself, but it will be clobbered.
326 void JumpIfNotInNewSpace(Register object,
329 InNewSpace(object, scratch, ne, branch);
332 // Check if object is in new space. Jumps if the object is in new space.
333 // The register scratch can be object itself, but scratch will be clobbered.
334 void JumpIfInNewSpace(Register object,
337 InNewSpace(object, scratch, eq, branch);
340 // Check if an object has a given incremental marking color.
341 void HasColor(Register object,
348 void JumpIfBlack(Register object,
353 // Checks the color of an object. If the object is already grey or black
354 // then we just fall through, since it is already live. If it is white and
355 // we can determine that it doesn't need to be scanned, then we just mark it
356 // black and fall through. For the rest we jump to the label so the
357 // incremental marker can fix its assumptions.
358 void EnsureNotWhite(Register object,
362 Label* object_is_white_and_not_data);
364 // Detects conservatively whether an object is data-only, i.e. it does need to
365 // be scanned by the garbage collector.
366 void JumpIfDataObject(Register value,
368 Label* not_data_object);
370 // Notify the garbage collector that we wrote a pointer into an object.
371 // |object| is the object being stored into, |value| is the object being
372 // stored. value and scratch registers are clobbered by the operation.
373 // The offset is the offset from the start of the object, not the offset from
374 // the tagged HeapObject pointer. For use with FieldOperand(reg, off).
375 void RecordWriteField(
381 SaveFPRegsMode save_fp,
382 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
383 SmiCheck smi_check = INLINE_SMI_CHECK,
384 PointersToHereCheck pointers_to_here_check_for_value =
385 kPointersToHereMaybeInteresting);
387 // As above, but the offset has the tag presubtracted. For use with
388 // MemOperand(reg, off).
389 inline void RecordWriteContextSlot(
395 SaveFPRegsMode save_fp,
396 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
397 SmiCheck smi_check = INLINE_SMI_CHECK,
398 PointersToHereCheck pointers_to_here_check_for_value =
399 kPointersToHereMaybeInteresting) {
400 RecordWriteField(context,
401 offset + kHeapObjectTag,
406 remembered_set_action,
408 pointers_to_here_check_for_value);
411 void RecordWriteForMap(
416 SaveFPRegsMode save_fp);
418 // For a given |object| notify the garbage collector that the slot |address|
419 // has been written. |value| is the object being stored. The value and
420 // address registers are clobbered by the operation.
426 SaveFPRegsMode save_fp,
427 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
428 SmiCheck smi_check = INLINE_SMI_CHECK,
429 PointersToHereCheck pointers_to_here_check_for_value =
430 kPointersToHereMaybeInteresting);
433 // ---------------------------------------------------------------------------
434 // Inline caching support.
436 // Generate code for checking access rights - used for security checks
437 // on access to global objects across environments. The holder register
438 // is left untouched, whereas both scratch registers are clobbered.
439 void CheckAccessGlobalProxy(Register holder_reg,
443 void GetNumberHash(Register reg0, Register scratch);
445 void LoadFromNumberDictionary(Label* miss,
454 inline void MarkCode(NopMarkerTypes type) {
458 // Check if the given instruction is a 'type' marker.
459 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
460 // nop(type)). These instructions are generated to mark special location in
461 // the code, like some special IC code.
462 static inline bool IsMarkedCode(Instr instr, int type) {
463 DCHECK((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
464 return IsNop(instr, type);
468 static inline int GetCodeMarker(Instr instr) {
469 uint32_t opcode = ((instr & kOpcodeMask));
470 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift);
471 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift);
472 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift);
474 // Return <n> if we have a sll zero_reg, zero_reg, n
476 bool sllzz = (opcode == SLL &&
477 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
478 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
480 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1;
481 DCHECK((type == -1) ||
482 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
488 // ---------------------------------------------------------------------------
489 // Allocation support.
491 // Allocate an object in new space or old pointer space. The object_size is
492 // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
493 // is passed. If the space is exhausted control continues at the gc_required
494 // label. The allocated object is returned in result. If the flag
495 // tag_allocated_object is true the result is tagged as as a heap object.
496 // All registers are clobbered also when control continues at the gc_required
498 void Allocate(int object_size,
503 AllocationFlags flags);
505 void Allocate(Register object_size,
510 AllocationFlags flags);
512 // Undo allocation in new space. The object passed and objects allocated after
513 // it will no longer be allocated. The caller must make sure that no pointers
514 // are left to the object(s) no longer allocated as they would be invalid when
515 // allocation is undone.
516 void UndoAllocationInNewSpace(Register object, Register scratch);
519 void AllocateTwoByteString(Register result,
525 void AllocateOneByteString(Register result, Register length,
526 Register scratch1, Register scratch2,
527 Register scratch3, Label* gc_required);
528 void AllocateTwoByteConsString(Register result,
533 void AllocateOneByteConsString(Register result, Register length,
534 Register scratch1, Register scratch2,
536 void AllocateTwoByteSlicedString(Register result,
541 void AllocateOneByteSlicedString(Register result, Register length,
542 Register scratch1, Register scratch2,
545 // Allocates a heap number or jumps to the gc_required label if the young
546 // space is full and a scavenge is needed. All registers are clobbered also
547 // when control continues at the gc_required label.
548 void AllocateHeapNumber(Register result,
551 Register heap_number_map,
553 TaggingMode tagging_mode = TAG_RESULT,
554 MutableMode mode = IMMUTABLE);
555 void AllocateHeapNumberWithValue(Register result,
561 // ---------------------------------------------------------------------------
562 // Instruction macros.
564 #define DEFINE_INSTRUCTION(instr) \
565 void instr(Register rd, Register rs, const Operand& rt); \
566 void instr(Register rd, Register rs, Register rt) { \
567 instr(rd, rs, Operand(rt)); \
569 void instr(Register rs, Register rt, int32_t j) { \
570 instr(rs, rt, Operand(j)); \
573 #define DEFINE_INSTRUCTION2(instr) \
574 void instr(Register rs, const Operand& rt); \
575 void instr(Register rs, Register rt) { \
576 instr(rs, Operand(rt)); \
578 void instr(Register rs, int32_t j) { \
579 instr(rs, Operand(j)); \
582 #define DEFINE_INSTRUCTION3(instr) \
583 void instr(Register rd_hi, Register rd_lo, Register rs, const Operand& rt); \
584 void instr(Register rd_hi, Register rd_lo, Register rs, Register rt) { \
585 instr(rd_hi, rd_lo, rs, Operand(rt)); \
587 void instr(Register rd_hi, Register rd_lo, Register rs, int32_t j) { \
588 instr(rd_hi, rd_lo, rs, Operand(j)); \
591 DEFINE_INSTRUCTION(Addu);
592 DEFINE_INSTRUCTION(Subu);
593 DEFINE_INSTRUCTION(Mul);
594 DEFINE_INSTRUCTION(Div);
595 DEFINE_INSTRUCTION(Divu);
596 DEFINE_INSTRUCTION(Mod);
597 DEFINE_INSTRUCTION(Modu);
598 DEFINE_INSTRUCTION(Mulh);
599 DEFINE_INSTRUCTION2(Mult);
600 DEFINE_INSTRUCTION(Mulhu);
601 DEFINE_INSTRUCTION2(Multu);
602 DEFINE_INSTRUCTION2(Div);
603 DEFINE_INSTRUCTION2(Divu);
605 DEFINE_INSTRUCTION3(Div);
606 DEFINE_INSTRUCTION3(Mul);
608 DEFINE_INSTRUCTION(And);
609 DEFINE_INSTRUCTION(Or);
610 DEFINE_INSTRUCTION(Xor);
611 DEFINE_INSTRUCTION(Nor);
612 DEFINE_INSTRUCTION2(Neg);
614 DEFINE_INSTRUCTION(Slt);
615 DEFINE_INSTRUCTION(Sltu);
617 // MIPS32 R2 instruction macro.
618 DEFINE_INSTRUCTION(Ror);
620 #undef DEFINE_INSTRUCTION
621 #undef DEFINE_INSTRUCTION2
623 void Pref(int32_t hint, const MemOperand& rs);
626 // ---------------------------------------------------------------------------
627 // Pseudo-instructions.
629 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
631 void Ulw(Register rd, const MemOperand& rs);
632 void Usw(Register rd, const MemOperand& rs);
634 // Load int32 in the rd register.
635 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
636 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {
637 li(rd, Operand(j), mode);
639 void li(Register dst, Handle<Object> value, LiFlags mode = OPTIMIZE_SIZE);
641 // Push multiple registers on the stack.
642 // Registers are saved in numerical order, with higher numbered registers
643 // saved in higher memory addresses.
644 void MultiPush(RegList regs);
645 void MultiPushReversed(RegList regs);
647 void MultiPushFPU(RegList regs);
648 void MultiPushReversedFPU(RegList regs);
650 void push(Register src) {
651 Addu(sp, sp, Operand(-kPointerSize));
652 sw(src, MemOperand(sp, 0));
654 void Push(Register src) { push(src); }
657 void Push(Handle<Object> handle);
658 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
660 // Push two registers. Pushes leftmost register first (to highest address).
661 void Push(Register src1, Register src2) {
662 Subu(sp, sp, Operand(2 * kPointerSize));
663 sw(src1, MemOperand(sp, 1 * kPointerSize));
664 sw(src2, MemOperand(sp, 0 * kPointerSize));
667 // Push three registers. Pushes leftmost register first (to highest address).
668 void Push(Register src1, Register src2, Register src3) {
669 Subu(sp, sp, Operand(3 * kPointerSize));
670 sw(src1, MemOperand(sp, 2 * kPointerSize));
671 sw(src2, MemOperand(sp, 1 * kPointerSize));
672 sw(src3, MemOperand(sp, 0 * kPointerSize));
675 // Push four registers. Pushes leftmost register first (to highest address).
676 void Push(Register src1, Register src2, Register src3, Register src4) {
677 Subu(sp, sp, Operand(4 * kPointerSize));
678 sw(src1, MemOperand(sp, 3 * kPointerSize));
679 sw(src2, MemOperand(sp, 2 * kPointerSize));
680 sw(src3, MemOperand(sp, 1 * kPointerSize));
681 sw(src4, MemOperand(sp, 0 * kPointerSize));
684 void Push(Register src, Condition cond, Register tst1, Register tst2) {
685 // Since we don't have conditional execution we use a Branch.
686 Branch(3, cond, tst1, Operand(tst2));
687 Subu(sp, sp, Operand(kPointerSize));
688 sw(src, MemOperand(sp, 0));
691 // Pops multiple values from the stack and load them in the
692 // registers specified in regs. Pop order is the opposite as in MultiPush.
693 void MultiPop(RegList regs);
694 void MultiPopReversed(RegList regs);
696 void MultiPopFPU(RegList regs);
697 void MultiPopReversedFPU(RegList regs);
699 void pop(Register dst) {
700 lw(dst, MemOperand(sp, 0));
701 Addu(sp, sp, Operand(kPointerSize));
703 void Pop(Register dst) { pop(dst); }
705 // Pop two registers. Pops rightmost register first (from lower address).
706 void Pop(Register src1, Register src2) {
707 DCHECK(!src1.is(src2));
708 lw(src2, MemOperand(sp, 0 * kPointerSize));
709 lw(src1, MemOperand(sp, 1 * kPointerSize));
710 Addu(sp, sp, 2 * kPointerSize);
713 // Pop three registers. Pops rightmost register first (from lower address).
714 void Pop(Register src1, Register src2, Register src3) {
715 lw(src3, MemOperand(sp, 0 * kPointerSize));
716 lw(src2, MemOperand(sp, 1 * kPointerSize));
717 lw(src1, MemOperand(sp, 2 * kPointerSize));
718 Addu(sp, sp, 3 * kPointerSize);
721 void Pop(uint32_t count = 1) {
722 Addu(sp, sp, Operand(count * kPointerSize));
725 // Push and pop the registers that can hold pointers, as defined by the
726 // RegList constant kSafepointSavedRegisters.
727 void PushSafepointRegisters();
728 void PopSafepointRegisters();
729 // Store value in register src in the safepoint stack slot for
731 void StoreToSafepointRegisterSlot(Register src, Register dst);
732 // Load the value of the src register from its safepoint stack slot
733 // into register dst.
734 void LoadFromSafepointRegisterSlot(Register dst, Register src);
736 // Flush the I-cache from asm code. You should use CpuFeatures::FlushICache
738 // Does not handle errors.
739 void FlushICache(Register address, unsigned instructions);
741 // MIPS32 R2 instruction macro.
742 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
743 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
745 // ---------------------------------------------------------------------------
746 // FPU macros. These do not handle special cases like NaN or +- inf.
748 // Convert unsigned word to double.
749 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
750 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
752 // Convert double to unsigned word.
753 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
754 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch);
756 void Trunc_w_d(FPURegister fd, FPURegister fs);
757 void Round_w_d(FPURegister fd, FPURegister fs);
758 void Floor_w_d(FPURegister fd, FPURegister fs);
759 void Ceil_w_d(FPURegister fd, FPURegister fs);
761 // FP32 mode: Move the general purpose register into
762 // the high part of the double-register pair.
763 // FP64 mode: Move the general-purpose register into
764 // the higher 32 bits of the 64-bit coprocessor register,
765 // while leaving the low bits unchanged.
766 void Mthc1(Register rt, FPURegister fs);
768 // FP32 mode: move the high part of the double-register pair into
769 // general purpose register.
770 // FP64 mode: Move the higher 32 bits of the 64-bit coprocessor register into
771 // general-purpose register.
772 void Mfhc1(Register rt, FPURegister fs);
774 // Wrapper function for the different cmp/branch types.
775 void BranchF(Label* target,
780 BranchDelaySlot bd = PROTECT);
782 // Alternate (inline) version for better readability with USE_DELAY_SLOT.
783 inline void BranchF(BranchDelaySlot bd,
789 BranchF(target, nan, cc, cmp1, cmp2, bd);
792 // Truncates a double using a specific rounding mode, and writes the value
793 // to the result register.
794 // The except_flag will contain any exceptions caused by the instruction.
795 // If check_inexact is kDontCheckForInexactConversion, then the inexact
796 // exception is masked.
797 void EmitFPUTruncate(FPURoundingMode rounding_mode,
799 DoubleRegister double_input,
801 DoubleRegister double_scratch,
802 Register except_flag,
803 CheckForInexactConversion check_inexact
804 = kDontCheckForInexactConversion);
806 // Performs a truncating conversion of a floating point number as used by
807 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
808 // succeeds, otherwise falls through if result is saturated. On return
809 // 'result' either holds answer, or is clobbered on fall through.
811 // Only public for the test code in test-code-stubs-arm.cc.
812 void TryInlineTruncateDoubleToI(Register result,
813 DoubleRegister input,
816 // Performs a truncating conversion of a floating point number as used by
817 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
818 // Exits with 'result' holding the answer.
819 void TruncateDoubleToI(Register result, DoubleRegister double_input);
821 // Performs a truncating conversion of a heap number as used by
822 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 'result' and 'input'
823 // must be different registers. Exits with 'result' holding the answer.
824 void TruncateHeapNumberToI(Register result, Register object);
826 // Converts the smi or heap number in object to an int32 using the rules
827 // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
828 // and brought into the range -2^31 .. +2^31 - 1. 'result' and 'input' must be
829 // different registers.
830 void TruncateNumberToI(Register object,
832 Register heap_number_map,
836 // Loads the number from object into dst register.
837 // If |object| is neither smi nor heap number, |not_number| is jumped to
838 // with |object| still intact.
839 void LoadNumber(Register object,
841 Register heap_number_map,
845 // Loads the number from object into double_dst in the double format.
846 // Control will jump to not_int32 if the value cannot be exactly represented
847 // by a 32-bit integer.
848 // Floating point value in the 32-bit integer range that are not exact integer
850 void LoadNumberAsInt32Double(Register object,
851 DoubleRegister double_dst,
852 Register heap_number_map,
855 FPURegister double_scratch,
858 // Loads the number from object into dst as a 32-bit integer.
859 // Control will jump to not_int32 if the object cannot be exactly represented
860 // by a 32-bit integer.
861 // Floating point value in the 32-bit integer range that are not exact integer
862 // won't be converted.
863 void LoadNumberAsInt32(Register object,
865 Register heap_number_map,
868 FPURegister double_scratch0,
869 FPURegister double_scratch1,
873 // argc - argument count to be dropped by LeaveExitFrame.
874 // save_doubles - saves FPU registers on stack, currently disabled.
875 // stack_space - extra stack space.
876 void EnterExitFrame(bool save_doubles,
877 int stack_space = 0);
879 // Leave the current exit frame.
880 void LeaveExitFrame(bool save_doubles, Register arg_count,
881 bool restore_context, bool do_return = NO_EMIT_RETURN,
882 bool argument_count_is_length = false);
884 // Get the actual activation frame alignment for target environment.
885 static int ActivationFrameAlignment();
887 // Make sure the stack is aligned. Only emits code in debug mode.
888 void AssertStackIsAligned();
890 void LoadContext(Register dst, int context_chain_length);
892 // Conditionally load the cached Array transitioned map of type
893 // transitioned_kind from the native context if the map in register
894 // map_in_out is the cached Array map in the native context of
896 void LoadTransitionedArrayMapConditional(
897 ElementsKind expected_kind,
898 ElementsKind transitioned_kind,
901 Label* no_map_match);
903 void LoadGlobalFunction(int index, Register function);
905 // Load the initial map from the global function. The registers
906 // function and map can be the same, function is then overwritten.
907 void LoadGlobalFunctionInitialMap(Register function,
911 void InitializeRootRegister() {
912 ExternalReference roots_array_start =
913 ExternalReference::roots_array_start(isolate());
914 li(kRootRegister, Operand(roots_array_start));
917 // -------------------------------------------------------------------------
918 // JavaScript invokes.
920 // Invoke the JavaScript function code by either calling or jumping.
921 void InvokeCode(Register code,
922 const ParameterCount& expected,
923 const ParameterCount& actual,
925 const CallWrapper& call_wrapper);
927 // Invoke the JavaScript function in the given register. Changes the
928 // current context to the context in the function before invoking.
929 void InvokeFunction(Register function,
930 const ParameterCount& actual,
932 const CallWrapper& call_wrapper);
934 void InvokeFunction(Register function,
935 const ParameterCount& expected,
936 const ParameterCount& actual,
938 const CallWrapper& call_wrapper);
940 void InvokeFunction(Handle<JSFunction> function,
941 const ParameterCount& expected,
942 const ParameterCount& actual,
944 const CallWrapper& call_wrapper);
947 void IsObjectJSObjectType(Register heap_object,
952 void IsInstanceJSObjectType(Register map,
956 void IsObjectJSStringType(Register object,
960 void IsObjectNameType(Register object,
964 // -------------------------------------------------------------------------
969 // -------------------------------------------------------------------------
970 // Exception handling.
972 // Push a new try handler and link into try handler chain.
973 void PushTryHandler(StackHandler::Kind kind, int handler_index);
975 // Unlink the stack handler on top of the stack from the try handler chain.
976 // Must preserve the result register.
977 void PopTryHandler();
979 // Copies a fixed number of fields of heap objects from src to dst.
980 void CopyFields(Register dst, Register src, RegList temps, int field_count);
982 // Copies a number of bytes from src to dst. All registers are clobbered. On
983 // exit src and dst will point to the place just after where the last byte was
984 // read or written and length will be zero.
985 void CopyBytes(Register src,
990 // Initialize fields with filler values. Fields starting at |start_offset|
991 // not including end_offset are overwritten with the value in |filler|. At
992 // the end the loop, |start_offset| takes the value of |end_offset|.
993 void InitializeFieldsWithFiller(Register start_offset,
997 // -------------------------------------------------------------------------
998 // Support functions.
1000 // Machine code version of Map::GetConstructor().
1001 // |temp| holds |result|'s map when done, and |temp2| its instance type.
1002 void GetMapConstructor(Register result, Register map, Register temp,
1005 // Try to get function prototype of a function and puts the value in
1006 // the result register. Checks that the function really is a
1007 // function and jumps to the miss label if the fast checks fail. The
1008 // function register will be untouched; the other registers may be
1010 void TryGetFunctionPrototype(Register function,
1014 bool miss_on_bound_function = false);
1016 void GetObjectType(Register function,
1020 // Check if a map for a JSObject indicates that the object has fast elements.
1021 // Jump to the specified label if it does not.
1022 void CheckFastElements(Register map,
1026 // Check if a map for a JSObject indicates that the object can have both smi
1027 // and HeapObject elements. Jump to the specified label if it does not.
1028 void CheckFastObjectElements(Register map,
1032 // Check if a map for a JSObject indicates that the object has fast smi only
1033 // elements. Jump to the specified label if it does not.
1034 void CheckFastSmiElements(Register map,
1038 // Check to see if maybe_number can be stored as a double in
1039 // FastDoubleElements. If it can, store it at the index specified by key in
1040 // the FastDoubleElements array elements. Otherwise jump to fail.
1041 void StoreNumberToDoubleElements(Register value_reg,
1043 Register elements_reg,
1048 int elements_offset = 0);
1050 // Compare an object's map with the specified map and its transitioned
1051 // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Jumps to
1052 // "branch_to" if the result of the comparison is "cond". If multiple map
1053 // compares are required, the compare sequences branches to early_success.
1054 void CompareMapAndBranch(Register obj,
1057 Label* early_success,
1061 // As above, but the map of the object is already loaded into the register
1062 // which is preserved by the code generated.
1063 void CompareMapAndBranch(Register obj_map,
1065 Label* early_success,
1069 // Check if the map of an object is equal to a specified map and branch to
1070 // label if not. Skip the smi check if not required (object is known to be a
1071 // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
1072 // against maps that are ElementsKind transition maps of the specificed map.
1073 void CheckMap(Register obj,
1077 SmiCheckType smi_check_type);
1080 void CheckMap(Register obj,
1082 Heap::RootListIndex index,
1084 SmiCheckType smi_check_type);
1086 // Check if the map of an object is equal to a specified weak map and branch
1087 // to a specified target if equal. Skip the smi check if not required
1088 // (object is known to be a heap object)
1089 void DispatchWeakMap(Register obj, Register scratch1, Register scratch2,
1090 Handle<WeakCell> cell, Handle<Code> success,
1091 SmiCheckType smi_check_type);
1093 // Get value of the weak cell.
1094 void GetWeakValue(Register value, Handle<WeakCell> cell);
1096 // Load the value of the weak cell in the value register. Branch to the
1097 // given miss label is the weak cell was cleared.
1098 void LoadWeakValue(Register value, Handle<WeakCell> cell, Label* miss);
1100 // Load and check the instance type of an object for being a string.
1101 // Loads the type into the second argument register.
1102 // Returns a condition that will be enabled if the object was a string.
1103 Condition IsObjectStringType(Register obj,
1106 lw(type, FieldMemOperand(obj, HeapObject::kMapOffset));
1107 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset));
1108 And(type, type, Operand(kIsNotStringMask));
1109 DCHECK_EQ(0u, kStringTag);
1114 // Picks out an array index from the hash field.
1116 // hash - holds the index's hash. Clobbered.
1117 // index - holds the overwritten index on exit.
1118 void IndexFromHash(Register hash, Register index);
1120 // Get the number of least significant bits from a register.
1121 void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
1122 void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
1124 // Load the value of a number object into a FPU double register. If the
1125 // object is not a number a jump to the label not_number is performed
1126 // and the FPU double register is unchanged.
1127 void ObjectToDoubleFPURegister(
1132 Register heap_number_map,
1134 ObjectToDoubleFlags flags = NO_OBJECT_TO_DOUBLE_FLAGS);
1136 // Load the value of a smi object into a FPU double register. The register
1137 // scratch1 can be the same register as smi in which case smi will hold the
1138 // untagged value afterwards.
1139 void SmiToDoubleFPURegister(Register smi,
1143 // -------------------------------------------------------------------------
1144 // Overflow handling functions.
1145 // Usage: first call the appropriate arithmetic function, then call one of the
1146 // jump functions with the overflow_dst register as the second parameter.
1148 void AdduAndCheckForOverflow(Register dst,
1151 Register overflow_dst,
1152 Register scratch = at);
1154 void AdduAndCheckForOverflow(Register dst, Register left,
1155 const Operand& right, Register overflow_dst,
1156 Register scratch = at);
1158 void SubuAndCheckForOverflow(Register dst,
1161 Register overflow_dst,
1162 Register scratch = at);
1164 void SubuAndCheckForOverflow(Register dst, Register left,
1165 const Operand& right, Register overflow_dst,
1166 Register scratch = at);
1168 void BranchOnOverflow(Label* label,
1169 Register overflow_check,
1170 BranchDelaySlot bd = PROTECT) {
1171 Branch(label, lt, overflow_check, Operand(zero_reg), bd);
1174 void BranchOnNoOverflow(Label* label,
1175 Register overflow_check,
1176 BranchDelaySlot bd = PROTECT) {
1177 Branch(label, ge, overflow_check, Operand(zero_reg), bd);
1180 void RetOnOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1181 Ret(lt, overflow_check, Operand(zero_reg), bd);
1184 void RetOnNoOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1185 Ret(ge, overflow_check, Operand(zero_reg), bd);
1188 // -------------------------------------------------------------------------
1191 // See comments at the beginning of CEntryStub::Generate.
1192 inline void PrepareCEntryArgs(int num_args) { li(a0, num_args); }
1194 inline void PrepareCEntryFunction(const ExternalReference& ref) {
1195 li(a1, Operand(ref));
1198 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
1199 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
1201 // Call a code stub.
1202 void CallStub(CodeStub* stub,
1203 TypeFeedbackId ast_id = TypeFeedbackId::None(),
1206 // Tail call a code stub (jump).
1207 void TailCallStub(CodeStub* stub, COND_ARGS);
1211 void CallJSExitStub(CodeStub* stub);
1213 // Call a runtime routine.
1214 void CallRuntime(const Runtime::Function* f,
1216 SaveFPRegsMode save_doubles = kDontSaveFPRegs);
1217 void CallRuntimeSaveDoubles(Runtime::FunctionId id) {
1218 const Runtime::Function* function = Runtime::FunctionForId(id);
1219 CallRuntime(function, function->nargs, kSaveFPRegs);
1222 // Convenience function: Same as above, but takes the fid instead.
1223 void CallRuntime(Runtime::FunctionId id,
1225 SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
1226 CallRuntime(Runtime::FunctionForId(id), num_arguments, save_doubles);
1229 // Convenience function: call an external reference.
1230 void CallExternalReference(const ExternalReference& ext,
1232 BranchDelaySlot bd = PROTECT);
1234 // Tail call of a runtime routine (jump).
1235 // Like JumpToExternalReference, but also takes care of passing the number
1237 void TailCallExternalReference(const ExternalReference& ext,
1241 // Convenience function: tail call a runtime routine (jump).
1242 void TailCallRuntime(Runtime::FunctionId fid,
1246 int CalculateStackPassedWords(int num_reg_arguments,
1247 int num_double_arguments);
1249 // Before calling a C-function from generated code, align arguments on stack
1250 // and add space for the four mips argument slots.
1251 // After aligning the frame, non-register arguments must be stored on the
1252 // stack, after the argument-slots using helper: CFunctionArgumentOperand().
1253 // The argument count assumes all arguments are word sized.
1254 // Some compilers/platforms require the stack to be aligned when calling
1256 // Needs a scratch register to do some arithmetic. This register will be
1258 void PrepareCallCFunction(int num_reg_arguments,
1259 int num_double_registers,
1261 void PrepareCallCFunction(int num_reg_arguments,
1264 // Arguments 1-4 are placed in registers a0 thru a3 respectively.
1265 // Arguments 5..n are stored to stack using following:
1266 // sw(t0, CFunctionArgumentOperand(5));
1268 // Calls a C function and cleans up the space for arguments allocated
1269 // by PrepareCallCFunction. The called function is not allowed to trigger a
1270 // garbage collection, since that might move the code and invalidate the
1271 // return address (unless this is somehow accounted for by the called
1273 void CallCFunction(ExternalReference function, int num_arguments);
1274 void CallCFunction(Register function, int num_arguments);
1275 void CallCFunction(ExternalReference function,
1276 int num_reg_arguments,
1277 int num_double_arguments);
1278 void CallCFunction(Register function,
1279 int num_reg_arguments,
1280 int num_double_arguments);
1281 void MovFromFloatResult(DoubleRegister dst);
1282 void MovFromFloatParameter(DoubleRegister dst);
1284 // There are two ways of passing double arguments on MIPS, depending on
1285 // whether soft or hard floating point ABI is used. These functions
1286 // abstract parameter passing for the three different ways we call
1287 // C functions from generated code.
1288 void MovToFloatParameter(DoubleRegister src);
1289 void MovToFloatParameters(DoubleRegister src1, DoubleRegister src2);
1290 void MovToFloatResult(DoubleRegister src);
1292 // Jump to the builtin routine.
1293 void JumpToExternalReference(const ExternalReference& builtin,
1294 BranchDelaySlot bd = PROTECT);
1296 // Invoke specified builtin JavaScript function. Adds an entry to
1297 // the unresolved list if the name does not resolve.
1298 void InvokeBuiltin(Builtins::JavaScript id,
1300 const CallWrapper& call_wrapper = NullCallWrapper());
1302 // Store the code object for the given builtin in the target register and
1303 // setup the function in a1.
1304 void GetBuiltinEntry(Register target, Builtins::JavaScript id);
1306 // Store the function for the given builtin in the target register.
1307 void GetBuiltinFunction(Register target, Builtins::JavaScript id);
1311 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders.
1315 Handle<Object> CodeObject() {
1316 DCHECK(!code_object_.is_null());
1317 return code_object_;
1320 // Emit code for a truncating division by a constant. The dividend register is
1321 // unchanged and at gets clobbered. Dividend and result must be different.
1322 void TruncatingDiv(Register result, Register dividend, int32_t divisor);
1324 // -------------------------------------------------------------------------
1325 // StatsCounter support.
1327 void SetCounter(StatsCounter* counter, int value,
1328 Register scratch1, Register scratch2);
1329 void IncrementCounter(StatsCounter* counter, int value,
1330 Register scratch1, Register scratch2);
1331 void DecrementCounter(StatsCounter* counter, int value,
1332 Register scratch1, Register scratch2);
1335 // -------------------------------------------------------------------------
1338 // Calls Abort(msg) if the condition cc is not satisfied.
1339 // Use --debug_code to enable.
1340 void Assert(Condition cc, BailoutReason reason, Register rs, Operand rt);
1341 void AssertFastElements(Register elements);
1343 // Like Assert(), but always enabled.
1344 void Check(Condition cc, BailoutReason reason, Register rs, Operand rt);
1346 // Print a message to stdout and abort execution.
1347 void Abort(BailoutReason msg);
1349 // Verify restrictions about code generated in stubs.
1350 void set_generating_stub(bool value) { generating_stub_ = value; }
1351 bool generating_stub() { return generating_stub_; }
1352 void set_has_frame(bool value) { has_frame_ = value; }
1353 bool has_frame() { return has_frame_; }
1354 inline bool AllowThisStubCall(CodeStub* stub);
1356 // ---------------------------------------------------------------------------
1357 // Number utilities.
1359 // Check whether the value of reg is a power of two and not zero. If not
1360 // control continues at the label not_power_of_two. If reg is a power of two
1361 // the register scratch contains the value of (reg - 1) when control falls
1363 void JumpIfNotPowerOfTwoOrZero(Register reg,
1365 Label* not_power_of_two_or_zero);
1367 // -------------------------------------------------------------------------
1370 void SmiTag(Register reg) {
1371 Addu(reg, reg, reg);
1374 // Test for overflow < 0: use BranchOnOverflow() or BranchOnNoOverflow().
1375 void SmiTagCheckOverflow(Register reg, Register overflow);
1376 void SmiTagCheckOverflow(Register dst, Register src, Register overflow);
1378 void SmiTag(Register dst, Register src) {
1379 Addu(dst, src, src);
1382 // Try to convert int32 to smi. If the value is to large, preserve
1383 // the original value and jump to not_a_smi. Destroys scratch and
1385 void TrySmiTag(Register reg, Register scratch, Label* not_a_smi) {
1386 TrySmiTag(reg, reg, scratch, not_a_smi);
1388 void TrySmiTag(Register dst,
1392 SmiTagCheckOverflow(at, src, scratch);
1393 BranchOnOverflow(not_a_smi, scratch);
1397 void SmiUntag(Register reg) {
1398 sra(reg, reg, kSmiTagSize);
1401 void SmiUntag(Register dst, Register src) {
1402 sra(dst, src, kSmiTagSize);
1405 // Test if the register contains a smi.
1406 inline void SmiTst(Register value, Register scratch) {
1407 And(scratch, value, Operand(kSmiTagMask));
1409 inline void NonNegativeSmiTst(Register value, Register scratch) {
1410 And(scratch, value, Operand(kSmiTagMask | kSmiSignMask));
1413 // Untag the source value into destination and jump if source is a smi.
1414 // Souce and destination can be the same register.
1415 void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
1417 // Untag the source value into destination and jump if source is not a smi.
1418 // Souce and destination can be the same register.
1419 void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
1421 // Jump the register contains a smi.
1422 void JumpIfSmi(Register value,
1424 Register scratch = at,
1425 BranchDelaySlot bd = PROTECT);
1427 // Jump if the register contains a non-smi.
1428 void JumpIfNotSmi(Register value,
1429 Label* not_smi_label,
1430 Register scratch = at,
1431 BranchDelaySlot bd = PROTECT);
1433 // Jump if either of the registers contain a non-smi.
1434 void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
1435 // Jump if either of the registers contain a smi.
1436 void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
1438 // Abort execution if argument is a smi, enabled via --debug-code.
1439 void AssertNotSmi(Register object);
1440 void AssertSmi(Register object);
1442 // Abort execution if argument is not a string, enabled via --debug-code.
1443 void AssertString(Register object);
1445 // Abort execution if argument is not a name, enabled via --debug-code.
1446 void AssertName(Register object);
1448 // Abort execution if argument is not undefined or an AllocationSite, enabled
1449 // via --debug-code.
1450 void AssertUndefinedOrAllocationSite(Register object, Register scratch);
1452 // Abort execution if reg is not the root value with the given index,
1453 // enabled via --debug-code.
1454 void AssertIsRoot(Register reg, Heap::RootListIndex index);
1456 // ---------------------------------------------------------------------------
1457 // HeapNumber utilities.
1459 void JumpIfNotHeapNumber(Register object,
1460 Register heap_number_map,
1462 Label* on_not_heap_number);
1464 // -------------------------------------------------------------------------
1465 // String utilities.
1467 // Generate code to do a lookup in the number string cache. If the number in
1468 // the register object is found in the cache the generated code falls through
1469 // with the result in the result register. The object and the result register
1470 // can be the same. If the number is not found in the cache the code jumps to
1471 // the label not_found with only the content of register object unchanged.
1472 void LookupNumberStringCache(Register object,
1479 // Checks if both instance types are sequential ASCII strings and jumps to
1480 // label if either is not.
1481 void JumpIfBothInstanceTypesAreNotSequentialOneByte(
1482 Register first_object_instance_type, Register second_object_instance_type,
1483 Register scratch1, Register scratch2, Label* failure);
1485 // Check if instance type is sequential one-byte string and jump to label if
1487 void JumpIfInstanceTypeIsNotSequentialOneByte(Register type, Register scratch,
1490 void JumpIfNotUniqueNameInstanceType(Register reg, Label* not_unique_name);
1492 void EmitSeqStringSetCharCheck(Register string,
1496 uint32_t encoding_mask);
1498 // Checks if both objects are sequential one-byte strings and jumps to label
1499 // if either is not. Assumes that neither object is a smi.
1500 void JumpIfNonSmisNotBothSequentialOneByteStrings(Register first,
1506 // Checks if both objects are sequential one-byte strings and jumps to label
1507 // if either is not.
1508 void JumpIfNotBothSequentialOneByteStrings(Register first, Register second,
1511 Label* not_flat_one_byte_strings);
1513 void ClampUint8(Register output_reg, Register input_reg);
1515 void ClampDoubleToUint8(Register result_reg,
1516 DoubleRegister input_reg,
1517 DoubleRegister temp_double_reg);
1520 void LoadInstanceDescriptors(Register map, Register descriptors);
1521 void EnumLength(Register dst, Register map);
1522 void NumberOfOwnDescriptors(Register dst, Register map);
1523 void LoadAccessor(Register dst, Register holder, int accessor_index,
1524 AccessorComponent accessor);
1526 template<typename Field>
1527 void DecodeField(Register dst, Register src) {
1528 Ext(dst, src, Field::kShift, Field::kSize);
1531 template<typename Field>
1532 void DecodeField(Register reg) {
1533 DecodeField<Field>(reg, reg);
1536 template<typename Field>
1537 void DecodeFieldToSmi(Register dst, Register src) {
1538 static const int shift = Field::kShift;
1539 static const int mask = Field::kMask >> shift << kSmiTagSize;
1540 STATIC_ASSERT((mask & (0x80000000u >> (kSmiTagSize - 1))) == 0);
1541 STATIC_ASSERT(kSmiTag == 0);
1542 if (shift < kSmiTagSize) {
1543 sll(dst, src, kSmiTagSize - shift);
1544 And(dst, dst, Operand(mask));
1545 } else if (shift > kSmiTagSize) {
1546 srl(dst, src, shift - kSmiTagSize);
1547 And(dst, dst, Operand(mask));
1549 And(dst, src, Operand(mask));
1553 template<typename Field>
1554 void DecodeFieldToSmi(Register reg) {
1555 DecodeField<Field>(reg, reg);
1558 // Generates function and stub prologue code.
1559 void StubPrologue();
1560 void Prologue(bool code_pre_aging);
1562 // Activation support.
1563 void EnterFrame(StackFrame::Type type);
1564 void EnterFrame(StackFrame::Type type, bool load_constant_pool_pointer_reg);
1565 void LeaveFrame(StackFrame::Type type);
1567 // Patch the relocated value (lui/ori pair).
1568 void PatchRelocatedValue(Register li_location,
1570 Register new_value);
1571 // Get the relocatad value (loaded data) from the lui/ori pair.
1572 void GetRelocatedValue(Register li_location,
1576 // Expects object in a0 and returns map with validated enum cache
1577 // in a0. Assumes that any other register can be used as a scratch.
1578 void CheckEnumCache(Register null_value, Label* call_runtime);
1580 // AllocationMemento support. Arrays may have an associated
1581 // AllocationMemento object that can be checked for in order to pretransition
1583 // On entry, receiver_reg should point to the array object.
1584 // scratch_reg gets clobbered.
1585 // If allocation info is present, jump to allocation_memento_present.
1586 void TestJSArrayForAllocationMemento(
1587 Register receiver_reg,
1588 Register scratch_reg,
1589 Label* no_memento_found,
1590 Condition cond = al,
1591 Label* allocation_memento_present = NULL);
1593 void JumpIfJSArrayHasAllocationMemento(Register receiver_reg,
1594 Register scratch_reg,
1595 Label* memento_found) {
1596 Label no_memento_found;
1597 TestJSArrayForAllocationMemento(receiver_reg, scratch_reg,
1598 &no_memento_found, eq, memento_found);
1599 bind(&no_memento_found);
1602 // Jumps to found label if a prototype map has dictionary elements.
1603 void JumpIfDictionaryInPrototypeChain(Register object, Register scratch0,
1604 Register scratch1, Label* found);
1607 void CallCFunctionHelper(Register function,
1608 int num_reg_arguments,
1609 int num_double_arguments);
1611 void BranchAndLinkShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1612 void BranchAndLinkShort(int16_t offset, Condition cond, Register rs,
1614 BranchDelaySlot bdslot = PROTECT);
1615 void BranchAndLinkShort(Label* L, BranchDelaySlot bdslot = PROTECT);
1616 void BranchAndLinkShort(Label* L, Condition cond, Register rs,
1618 BranchDelaySlot bdslot = PROTECT);
1619 void J(Label* L, BranchDelaySlot bdslot);
1620 void Jr(Label* L, BranchDelaySlot bdslot);
1621 void Jalr(Label* L, BranchDelaySlot bdslot);
1623 // Helper functions for generating invokes.
1624 void InvokePrologue(const ParameterCount& expected,
1625 const ParameterCount& actual,
1626 Handle<Code> code_constant,
1629 bool* definitely_mismatches,
1631 const CallWrapper& call_wrapper);
1633 // Get the code for the given builtin. Returns if able to resolve
1634 // the function in the 'resolved' flag.
1635 Handle<Code> ResolveBuiltin(Builtins::JavaScript id, bool* resolved);
1637 void InitializeNewString(Register string,
1639 Heap::RootListIndex map_index,
1643 // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
1644 void InNewSpace(Register object,
1646 Condition cond, // eq for new space, ne otherwise.
1649 // Helper for finding the mark bits for an address. Afterwards, the
1650 // bitmap register points at the word with the mark bits and the mask
1651 // the position of the first bit. Leaves addr_reg unchanged.
1652 inline void GetMarkBits(Register addr_reg,
1653 Register bitmap_reg,
1656 // Compute memory operands for safepoint stack slots.
1657 static int SafepointRegisterStackIndex(int reg_code);
1658 MemOperand SafepointRegisterSlot(Register reg);
1659 MemOperand SafepointRegistersAndDoublesSlot(Register reg);
1661 bool generating_stub_;
1663 bool has_double_zero_reg_set_;
1664 // This handle will be patched with the code object on installation.
1665 Handle<Object> code_object_;
1667 // Needs access to SafepointRegisterStackIndex for compiled frame
1669 friend class StandardFrame;
1673 // The code patcher is used to patch (typically) small parts of code e.g. for
1674 // debugging and other types of instrumentation. When using the code patcher
1675 // the exact number of bytes specified must be emitted. It is not legal to emit
1676 // relocation information. If any of these constraints are violated it causes
1677 // an assertion to fail.
1685 CodePatcher(byte* address,
1687 FlushICache flush_cache = FLUSH);
1688 virtual ~CodePatcher();
1690 // Macro assembler to emit code.
1691 MacroAssembler* masm() { return &masm_; }
1693 // Emit an instruction directly.
1694 void Emit(Instr instr);
1696 // Emit an address directly.
1697 void Emit(Address addr);
1699 // Change the condition part of an instruction leaving the rest of the current
1700 // instruction unchanged.
1701 void ChangeBranchCondition(Condition cond);
1704 byte* address_; // The address of the code being patched.
1705 int size_; // Number of bytes of the expected patch size.
1706 MacroAssembler masm_; // Macro assembler used to generate the code.
1707 FlushICache flush_cache_; // Whether to flush the I cache after patching.
1712 #ifdef GENERATED_CODE_COVERAGE
1713 #define CODE_COVERAGE_STRINGIFY(x) #x
1714 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1715 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1716 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1718 #define ACCESS_MASM(masm) masm->
1721 } } // namespace v8::internal
1723 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_