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28 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
29 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
31 #include "assembler.h"
32 #include "mips/assembler-mips.h"
33 #include "v8globals.h"
38 // Forward declaration.
41 // Reserved Register Usage Summary.
43 // Registers t8, t9, and at are reserved for use by the MacroAssembler.
45 // The programmer should know that the MacroAssembler may clobber these three,
46 // but won't touch other registers except in special cases.
48 // Per the MIPS ABI, register t9 must be used for indirect function call
49 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when
50 // trying to update gp register for position-independent-code. Whenever
51 // MIPS generated code calls C code, it must be via t9 register.
54 // Flags used for LeaveExitFrame function.
55 enum LeaveExitFrameMode {
57 NO_EMIT_RETURN = false
60 // Flags used for AllocateHeapNumber
68 // Flags used for the ObjectToDoubleFPURegister function.
69 enum ObjectToDoubleFlags {
71 NO_OBJECT_TO_DOUBLE_FLAGS = 0,
72 // Object is known to be a non smi.
73 OBJECT_NOT_SMI = 1 << 0,
74 // Don't load NaNs or infinities, branch to the non number case instead.
75 AVOID_NANS_AND_INFINITIES = 1 << 1
78 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls.
79 enum BranchDelaySlot {
84 // Flags used for the li macro-assembler function.
86 // If the constant value can be represented in just 16 bits, then
87 // optimize the li to use a single instruction, rather than lui/ori pair.
89 // Always use 2 instructions (lui/ori pair), even if the constant could
90 // be loaded with just one, so that this value is patchable later.
95 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
96 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
97 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved };
99 Register GetRegisterThatIsNotOneOf(Register reg1,
100 Register reg2 = no_reg,
101 Register reg3 = no_reg,
102 Register reg4 = no_reg,
103 Register reg5 = no_reg,
104 Register reg6 = no_reg);
106 bool AreAliased(Register r1, Register r2, Register r3, Register r4);
109 // -----------------------------------------------------------------------------
110 // Static helper functions.
112 inline MemOperand ContextOperand(Register context, int index) {
113 return MemOperand(context, Context::SlotOffset(index));
117 inline MemOperand GlobalObjectOperand() {
118 return ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX);
122 // Generate a MemOperand for loading a field from an object.
123 inline MemOperand FieldMemOperand(Register object, int offset) {
124 return MemOperand(object, offset - kHeapObjectTag);
128 // Generate a MemOperand for storing arguments 5..N on the stack
129 // when calling CallCFunction().
130 inline MemOperand CFunctionArgumentOperand(int index) {
131 ASSERT(index > kCArgSlotCount);
132 // Argument 5 takes the slot just past the four Arg-slots.
133 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize;
134 return MemOperand(sp, offset);
138 // MacroAssembler implements a collection of frequently used macros.
139 class MacroAssembler: public Assembler {
141 // The isolate parameter can be NULL if the macro assembler should
142 // not use isolate-dependent functionality. In this case, it's the
143 // responsibility of the caller to never invoke such function on the
145 MacroAssembler(Isolate* isolate, void* buffer, int size);
148 #define COND_TYPED_ARGS Condition cond, Register r1, const Operand& r2
149 #define COND_ARGS cond, r1, r2
151 // Cases when relocation is not needed.
152 #define DECLARE_NORELOC_PROTOTYPE(Name, target_type) \
153 void Name(target_type target, BranchDelaySlot bd = PROTECT); \
154 inline void Name(BranchDelaySlot bd, target_type target) { \
157 void Name(target_type target, \
159 BranchDelaySlot bd = PROTECT); \
160 inline void Name(BranchDelaySlot bd, \
161 target_type target, \
163 Name(target, COND_ARGS, bd); \
166 #define DECLARE_BRANCH_PROTOTYPES(Name) \
167 DECLARE_NORELOC_PROTOTYPE(Name, Label*) \
168 DECLARE_NORELOC_PROTOTYPE(Name, int16_t)
170 DECLARE_BRANCH_PROTOTYPES(Branch)
171 DECLARE_BRANCH_PROTOTYPES(BranchAndLink)
172 DECLARE_BRANCH_PROTOTYPES(BranchShort)
174 #undef DECLARE_BRANCH_PROTOTYPES
175 #undef COND_TYPED_ARGS
179 // Jump, Call, and Ret pseudo instructions implementing inter-working.
180 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
181 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
183 void Jump(Register target, COND_ARGS);
184 void Jump(intptr_t target, RelocInfo::Mode rmode, COND_ARGS);
185 void Jump(Address target, RelocInfo::Mode rmode, COND_ARGS);
186 void Jump(Handle<Code> code, RelocInfo::Mode rmode, COND_ARGS);
187 static int CallSize(Register target, COND_ARGS);
188 void Call(Register target, COND_ARGS);
189 static int CallSize(Address target, RelocInfo::Mode rmode, COND_ARGS);
190 void Call(Address target, RelocInfo::Mode rmode, COND_ARGS);
191 int CallSize(Handle<Code> code,
192 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
193 TypeFeedbackId ast_id = TypeFeedbackId::None(),
195 void Call(Handle<Code> code,
196 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
197 TypeFeedbackId ast_id = TypeFeedbackId::None(),
200 inline void Ret(BranchDelaySlot bd, Condition cond = al,
201 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
202 Ret(cond, rs, rt, bd);
205 void Branch(Label* L,
208 Heap::RootListIndex index,
209 BranchDelaySlot bdslot = PROTECT);
213 // Emit code to discard a non-negative number of pointer-sized elements
214 // from the stack, clobbering only the sp register.
216 Condition cond = cc_always,
217 Register reg = no_reg,
218 const Operand& op = Operand(no_reg));
220 // Trivial case of DropAndRet that utilizes the delay slot and only emits
222 void DropAndRet(int drop);
224 void DropAndRet(int drop,
229 // Swap two registers. If the scratch register is omitted then a slightly
230 // less efficient form using xor instead of mov is emitted.
231 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
233 void Call(Label* target);
235 inline void Move(Register dst, Register src) {
241 inline void Move(FPURegister dst, FPURegister src) {
247 inline void Move(Register dst_low, Register dst_high, FPURegister src) {
249 mfc1(dst_high, FPURegister::from_code(src.code() + 1));
252 inline void FmoveHigh(Register dst_high, FPURegister src) {
253 mfc1(dst_high, FPURegister::from_code(src.code() + 1));
256 inline void FmoveLow(Register dst_low, FPURegister src) {
260 inline void Move(FPURegister dst, Register src_low, Register src_high) {
262 mtc1(src_high, FPURegister::from_code(dst.code() + 1));
266 void Move(FPURegister dst, double imm);
267 void Movz(Register rd, Register rs, Register rt);
268 void Movn(Register rd, Register rs, Register rt);
269 void Movt(Register rd, Register rs, uint16_t cc = 0);
270 void Movf(Register rd, Register rs, uint16_t cc = 0);
272 void Clz(Register rd, Register rs);
274 // Jump unconditionally to given label.
275 // We NEED a nop in the branch delay slot, as it used by v8, for example in
276 // CodeGenerator::ProcessDeferred().
277 // Currently the branch delay slot is filled by the MacroAssembler.
278 // Use rather b(Label) for code generation.
283 void Load(Register dst, const MemOperand& src, Representation r);
284 void Store(Register src, const MemOperand& dst, Representation r);
286 // Load an object from the root table.
287 void LoadRoot(Register destination,
288 Heap::RootListIndex index);
289 void LoadRoot(Register destination,
290 Heap::RootListIndex index,
291 Condition cond, Register src1, const Operand& src2);
293 // Store an object to the root table.
294 void StoreRoot(Register source,
295 Heap::RootListIndex index);
296 void StoreRoot(Register source,
297 Heap::RootListIndex index,
298 Condition cond, Register src1, const Operand& src2);
300 // ---------------------------------------------------------------------------
303 void IncrementalMarkingRecordWriteHelper(Register object,
307 enum RememberedSetFinalAction {
313 // Record in the remembered set the fact that we have a pointer to new space
314 // at the address pointed to by the addr register. Only works if addr is not
316 void RememberedSetHelper(Register object, // Used for debug code.
319 SaveFPRegsMode save_fp,
320 RememberedSetFinalAction and_then);
322 void CheckPageFlag(Register object,
326 Label* condition_met);
328 void CheckMapDeprecated(Handle<Map> map,
330 Label* if_deprecated);
332 // Check if object is in new space. Jumps if the object is not in new space.
333 // The register scratch can be object itself, but it will be clobbered.
334 void JumpIfNotInNewSpace(Register object,
337 InNewSpace(object, scratch, ne, branch);
340 // Check if object is in new space. Jumps if the object is in new space.
341 // The register scratch can be object itself, but scratch will be clobbered.
342 void JumpIfInNewSpace(Register object,
345 InNewSpace(object, scratch, eq, branch);
348 // Check if an object has a given incremental marking color.
349 void HasColor(Register object,
356 void JumpIfBlack(Register object,
361 // Checks the color of an object. If the object is already grey or black
362 // then we just fall through, since it is already live. If it is white and
363 // we can determine that it doesn't need to be scanned, then we just mark it
364 // black and fall through. For the rest we jump to the label so the
365 // incremental marker can fix its assumptions.
366 void EnsureNotWhite(Register object,
370 Label* object_is_white_and_not_data);
372 // Detects conservatively whether an object is data-only, i.e. it does need to
373 // be scanned by the garbage collector.
374 void JumpIfDataObject(Register value,
376 Label* not_data_object);
378 // Notify the garbage collector that we wrote a pointer into an object.
379 // |object| is the object being stored into, |value| is the object being
380 // stored. value and scratch registers are clobbered by the operation.
381 // The offset is the offset from the start of the object, not the offset from
382 // the tagged HeapObject pointer. For use with FieldOperand(reg, off).
383 void RecordWriteField(
389 SaveFPRegsMode save_fp,
390 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
391 SmiCheck smi_check = INLINE_SMI_CHECK);
393 // As above, but the offset has the tag presubtracted. For use with
394 // MemOperand(reg, off).
395 inline void RecordWriteContextSlot(
401 SaveFPRegsMode save_fp,
402 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
403 SmiCheck smi_check = INLINE_SMI_CHECK) {
404 RecordWriteField(context,
405 offset + kHeapObjectTag,
410 remembered_set_action,
414 // For a given |object| notify the garbage collector that the slot |address|
415 // has been written. |value| is the object being stored. The value and
416 // address registers are clobbered by the operation.
422 SaveFPRegsMode save_fp,
423 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
424 SmiCheck smi_check = INLINE_SMI_CHECK);
427 // ---------------------------------------------------------------------------
428 // Inline caching support.
430 // Generate code for checking access rights - used for security checks
431 // on access to global objects across environments. The holder register
432 // is left untouched, whereas both scratch registers are clobbered.
433 void CheckAccessGlobalProxy(Register holder_reg,
437 void GetNumberHash(Register reg0, Register scratch);
439 void LoadFromNumberDictionary(Label* miss,
448 inline void MarkCode(NopMarkerTypes type) {
452 // Check if the given instruction is a 'type' marker.
453 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
454 // nop(type)). These instructions are generated to mark special location in
455 // the code, like some special IC code.
456 static inline bool IsMarkedCode(Instr instr, int type) {
457 ASSERT((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
458 return IsNop(instr, type);
462 static inline int GetCodeMarker(Instr instr) {
463 uint32_t opcode = ((instr & kOpcodeMask));
464 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift);
465 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift);
466 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift);
468 // Return <n> if we have a sll zero_reg, zero_reg, n
470 bool sllzz = (opcode == SLL &&
471 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
472 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
474 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1;
475 ASSERT((type == -1) ||
476 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
482 // ---------------------------------------------------------------------------
483 // Allocation support.
485 // Allocate an object in new space or old pointer space. The object_size is
486 // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
487 // is passed. If the space is exhausted control continues at the gc_required
488 // label. The allocated object is returned in result. If the flag
489 // tag_allocated_object is true the result is tagged as as a heap object.
490 // All registers are clobbered also when control continues at the gc_required
492 void Allocate(int object_size,
497 AllocationFlags flags);
499 void Allocate(Register object_size,
504 AllocationFlags flags);
506 // Undo allocation in new space. The object passed and objects allocated after
507 // it will no longer be allocated. The caller must make sure that no pointers
508 // are left to the object(s) no longer allocated as they would be invalid when
509 // allocation is undone.
510 void UndoAllocationInNewSpace(Register object, Register scratch);
513 void AllocateTwoByteString(Register result,
519 void AllocateAsciiString(Register result,
525 void AllocateTwoByteConsString(Register result,
530 void AllocateAsciiConsString(Register result,
535 void AllocateTwoByteSlicedString(Register result,
540 void AllocateAsciiSlicedString(Register result,
546 // Allocates a heap number or jumps to the gc_required label if the young
547 // space is full and a scavenge is needed. All registers are clobbered also
548 // when control continues at the gc_required label.
549 void AllocateHeapNumber(Register result,
552 Register heap_number_map,
554 TaggingMode tagging_mode = TAG_RESULT);
555 void AllocateHeapNumberWithValue(Register result,
561 // ---------------------------------------------------------------------------
562 // Instruction macros.
564 #define DEFINE_INSTRUCTION(instr) \
565 void instr(Register rd, Register rs, const Operand& rt); \
566 void instr(Register rd, Register rs, Register rt) { \
567 instr(rd, rs, Operand(rt)); \
569 void instr(Register rs, Register rt, int32_t j) { \
570 instr(rs, rt, Operand(j)); \
573 #define DEFINE_INSTRUCTION2(instr) \
574 void instr(Register rs, const Operand& rt); \
575 void instr(Register rs, Register rt) { \
576 instr(rs, Operand(rt)); \
578 void instr(Register rs, int32_t j) { \
579 instr(rs, Operand(j)); \
582 DEFINE_INSTRUCTION(Addu);
583 DEFINE_INSTRUCTION(Subu);
584 DEFINE_INSTRUCTION(Mul);
585 DEFINE_INSTRUCTION2(Mult);
586 DEFINE_INSTRUCTION2(Multu);
587 DEFINE_INSTRUCTION2(Div);
588 DEFINE_INSTRUCTION2(Divu);
590 DEFINE_INSTRUCTION(And);
591 DEFINE_INSTRUCTION(Or);
592 DEFINE_INSTRUCTION(Xor);
593 DEFINE_INSTRUCTION(Nor);
594 DEFINE_INSTRUCTION2(Neg);
596 DEFINE_INSTRUCTION(Slt);
597 DEFINE_INSTRUCTION(Sltu);
599 // MIPS32 R2 instruction macro.
600 DEFINE_INSTRUCTION(Ror);
602 #undef DEFINE_INSTRUCTION
603 #undef DEFINE_INSTRUCTION2
605 void Pref(int32_t hint, const MemOperand& rs);
608 // ---------------------------------------------------------------------------
609 // Pseudo-instructions.
611 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
613 void Ulw(Register rd, const MemOperand& rs);
614 void Usw(Register rd, const MemOperand& rs);
616 // Load int32 in the rd register.
617 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
618 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {
619 li(rd, Operand(j), mode);
621 void li(Register dst, Handle<Object> value, LiFlags mode = OPTIMIZE_SIZE);
623 // Push multiple registers on the stack.
624 // Registers are saved in numerical order, with higher numbered registers
625 // saved in higher memory addresses.
626 void MultiPush(RegList regs);
627 void MultiPushReversed(RegList regs);
629 void MultiPushFPU(RegList regs);
630 void MultiPushReversedFPU(RegList regs);
632 void push(Register src) {
633 Addu(sp, sp, Operand(-kPointerSize));
634 sw(src, MemOperand(sp, 0));
636 void Push(Register src) { push(src); }
639 void Push(Handle<Object> handle);
640 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
642 // Push two registers. Pushes leftmost register first (to highest address).
643 void Push(Register src1, Register src2) {
644 Subu(sp, sp, Operand(2 * kPointerSize));
645 sw(src1, MemOperand(sp, 1 * kPointerSize));
646 sw(src2, MemOperand(sp, 0 * kPointerSize));
649 // Push three registers. Pushes leftmost register first (to highest address).
650 void Push(Register src1, Register src2, Register src3) {
651 Subu(sp, sp, Operand(3 * kPointerSize));
652 sw(src1, MemOperand(sp, 2 * kPointerSize));
653 sw(src2, MemOperand(sp, 1 * kPointerSize));
654 sw(src3, MemOperand(sp, 0 * kPointerSize));
657 // Push four registers. Pushes leftmost register first (to highest address).
658 void Push(Register src1, Register src2, Register src3, Register src4) {
659 Subu(sp, sp, Operand(4 * kPointerSize));
660 sw(src1, MemOperand(sp, 3 * kPointerSize));
661 sw(src2, MemOperand(sp, 2 * kPointerSize));
662 sw(src3, MemOperand(sp, 1 * kPointerSize));
663 sw(src4, MemOperand(sp, 0 * kPointerSize));
666 void Push(Register src, Condition cond, Register tst1, Register tst2) {
667 // Since we don't have conditional execution we use a Branch.
668 Branch(3, cond, tst1, Operand(tst2));
669 Subu(sp, sp, Operand(kPointerSize));
670 sw(src, MemOperand(sp, 0));
673 // Pops multiple values from the stack and load them in the
674 // registers specified in regs. Pop order is the opposite as in MultiPush.
675 void MultiPop(RegList regs);
676 void MultiPopReversed(RegList regs);
678 void MultiPopFPU(RegList regs);
679 void MultiPopReversedFPU(RegList regs);
681 void pop(Register dst) {
682 lw(dst, MemOperand(sp, 0));
683 Addu(sp, sp, Operand(kPointerSize));
685 void Pop(Register dst) { pop(dst); }
687 // Pop two registers. Pops rightmost register first (from lower address).
688 void Pop(Register src1, Register src2) {
689 ASSERT(!src1.is(src2));
690 lw(src2, MemOperand(sp, 0 * kPointerSize));
691 lw(src1, MemOperand(sp, 1 * kPointerSize));
692 Addu(sp, sp, 2 * kPointerSize);
695 // Pop three registers. Pops rightmost register first (from lower address).
696 void Pop(Register src1, Register src2, Register src3) {
697 lw(src3, MemOperand(sp, 0 * kPointerSize));
698 lw(src2, MemOperand(sp, 1 * kPointerSize));
699 lw(src1, MemOperand(sp, 2 * kPointerSize));
700 Addu(sp, sp, 3 * kPointerSize);
703 void Pop(uint32_t count = 1) {
704 Addu(sp, sp, Operand(count * kPointerSize));
707 // Push and pop the registers that can hold pointers, as defined by the
708 // RegList constant kSafepointSavedRegisters.
709 void PushSafepointRegisters();
710 void PopSafepointRegisters();
711 void PushSafepointRegistersAndDoubles();
712 void PopSafepointRegistersAndDoubles();
713 // Store value in register src in the safepoint stack slot for
715 void StoreToSafepointRegisterSlot(Register src, Register dst);
716 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst);
717 // Load the value of the src register from its safepoint stack slot
718 // into register dst.
719 void LoadFromSafepointRegisterSlot(Register dst, Register src);
721 // Flush the I-cache from asm code. You should use CPU::FlushICache from C.
722 // Does not handle errors.
723 void FlushICache(Register address, unsigned instructions);
725 // MIPS32 R2 instruction macro.
726 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
727 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
729 // ---------------------------------------------------------------------------
730 // FPU macros. These do not handle special cases like NaN or +- inf.
732 // Convert unsigned word to double.
733 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
734 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
736 // Convert double to unsigned word.
737 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
738 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch);
740 void Trunc_w_d(FPURegister fd, FPURegister fs);
741 void Round_w_d(FPURegister fd, FPURegister fs);
742 void Floor_w_d(FPURegister fd, FPURegister fs);
743 void Ceil_w_d(FPURegister fd, FPURegister fs);
744 // Wrapper function for the different cmp/branch types.
745 void BranchF(Label* target,
750 BranchDelaySlot bd = PROTECT);
752 // Alternate (inline) version for better readability with USE_DELAY_SLOT.
753 inline void BranchF(BranchDelaySlot bd,
759 BranchF(target, nan, cc, cmp1, cmp2, bd);
762 // Truncates a double using a specific rounding mode, and writes the value
763 // to the result register.
764 // The except_flag will contain any exceptions caused by the instruction.
765 // If check_inexact is kDontCheckForInexactConversion, then the inexact
766 // exception is masked.
767 void EmitFPUTruncate(FPURoundingMode rounding_mode,
769 DoubleRegister double_input,
771 DoubleRegister double_scratch,
772 Register except_flag,
773 CheckForInexactConversion check_inexact
774 = kDontCheckForInexactConversion);
776 // Performs a truncating conversion of a floating point number as used by
777 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
778 // succeeds, otherwise falls through if result is saturated. On return
779 // 'result' either holds answer, or is clobbered on fall through.
781 // Only public for the test code in test-code-stubs-arm.cc.
782 void TryInlineTruncateDoubleToI(Register result,
783 DoubleRegister input,
786 // Performs a truncating conversion of a floating point number as used by
787 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
788 // Exits with 'result' holding the answer.
789 void TruncateDoubleToI(Register result, DoubleRegister double_input);
791 // Performs a truncating conversion of a heap number as used by
792 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 'result' and 'input'
793 // must be different registers. Exits with 'result' holding the answer.
794 void TruncateHeapNumberToI(Register result, Register object);
796 // Converts the smi or heap number in object to an int32 using the rules
797 // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
798 // and brought into the range -2^31 .. +2^31 - 1. 'result' and 'input' must be
799 // different registers.
800 void TruncateNumberToI(Register object,
802 Register heap_number_map,
806 // Loads the number from object into dst register.
807 // If |object| is neither smi nor heap number, |not_number| is jumped to
808 // with |object| still intact.
809 void LoadNumber(Register object,
811 Register heap_number_map,
815 // Loads the number from object into double_dst in the double format.
816 // Control will jump to not_int32 if the value cannot be exactly represented
817 // by a 32-bit integer.
818 // Floating point value in the 32-bit integer range that are not exact integer
820 void LoadNumberAsInt32Double(Register object,
821 DoubleRegister double_dst,
822 Register heap_number_map,
825 FPURegister double_scratch,
828 // Loads the number from object into dst as a 32-bit integer.
829 // Control will jump to not_int32 if the object cannot be exactly represented
830 // by a 32-bit integer.
831 // Floating point value in the 32-bit integer range that are not exact integer
832 // won't be converted.
833 void LoadNumberAsInt32(Register object,
835 Register heap_number_map,
838 FPURegister double_scratch0,
839 FPURegister double_scratch1,
843 // argc - argument count to be dropped by LeaveExitFrame.
844 // save_doubles - saves FPU registers on stack, currently disabled.
845 // stack_space - extra stack space.
846 void EnterExitFrame(bool save_doubles,
847 int stack_space = 0);
849 // Leave the current exit frame.
850 void LeaveExitFrame(bool save_doubles,
852 bool restore_context,
853 bool do_return = NO_EMIT_RETURN);
855 // Get the actual activation frame alignment for target environment.
856 static int ActivationFrameAlignment();
858 // Make sure the stack is aligned. Only emits code in debug mode.
859 void AssertStackIsAligned();
861 void LoadContext(Register dst, int context_chain_length);
863 // Conditionally load the cached Array transitioned map of type
864 // transitioned_kind from the native context if the map in register
865 // map_in_out is the cached Array map in the native context of
867 void LoadTransitionedArrayMapConditional(
868 ElementsKind expected_kind,
869 ElementsKind transitioned_kind,
872 Label* no_map_match);
874 // Load the initial map for new Arrays from a JSFunction.
875 void LoadInitialArrayMap(Register function_in,
878 bool can_have_holes);
880 void LoadGlobalFunction(int index, Register function);
881 void LoadArrayFunction(Register function);
883 // Load the initial map from the global function. The registers
884 // function and map can be the same, function is then overwritten.
885 void LoadGlobalFunctionInitialMap(Register function,
889 void InitializeRootRegister() {
890 ExternalReference roots_array_start =
891 ExternalReference::roots_array_start(isolate());
892 li(kRootRegister, Operand(roots_array_start));
895 // -------------------------------------------------------------------------
896 // JavaScript invokes.
898 // Invoke the JavaScript function code by either calling or jumping.
899 void InvokeCode(Register code,
900 const ParameterCount& expected,
901 const ParameterCount& actual,
903 const CallWrapper& call_wrapper);
905 // Invoke the JavaScript function in the given register. Changes the
906 // current context to the context in the function before invoking.
907 void InvokeFunction(Register function,
908 const ParameterCount& actual,
910 const CallWrapper& call_wrapper);
912 void InvokeFunction(Register function,
913 const ParameterCount& expected,
914 const ParameterCount& actual,
916 const CallWrapper& call_wrapper);
918 void InvokeFunction(Handle<JSFunction> function,
919 const ParameterCount& expected,
920 const ParameterCount& actual,
922 const CallWrapper& call_wrapper);
925 void IsObjectJSObjectType(Register heap_object,
930 void IsInstanceJSObjectType(Register map,
934 void IsObjectJSStringType(Register object,
938 void IsObjectNameType(Register object,
942 #ifdef ENABLE_DEBUGGER_SUPPORT
943 // -------------------------------------------------------------------------
950 // -------------------------------------------------------------------------
951 // Exception handling.
953 // Push a new try handler and link into try handler chain.
954 void PushTryHandler(StackHandler::Kind kind, int handler_index);
956 // Unlink the stack handler on top of the stack from the try handler chain.
957 // Must preserve the result register.
958 void PopTryHandler();
960 // Passes thrown value to the handler of top of the try handler chain.
961 void Throw(Register value);
963 // Propagates an uncatchable exception to the top of the current JS stack's
965 void ThrowUncatchable(Register value);
967 // Throw a message string as an exception.
968 void Throw(BailoutReason reason);
970 // Throw a message string as an exception if a condition is not true.
971 void ThrowIf(Condition cc, BailoutReason reason, Register rs, Operand rt);
973 // Copies a fixed number of fields of heap objects from src to dst.
974 void CopyFields(Register dst, Register src, RegList temps, int field_count);
976 // Copies a number of bytes from src to dst. All registers are clobbered. On
977 // exit src and dst will point to the place just after where the last byte was
978 // read or written and length will be zero.
979 void CopyBytes(Register src,
984 // Initialize fields with filler values. Fields starting at |start_offset|
985 // not including end_offset are overwritten with the value in |filler|. At
986 // the end the loop, |start_offset| takes the value of |end_offset|.
987 void InitializeFieldsWithFiller(Register start_offset,
991 // -------------------------------------------------------------------------
992 // Support functions.
994 // Try to get function prototype of a function and puts the value in
995 // the result register. Checks that the function really is a
996 // function and jumps to the miss label if the fast checks fail. The
997 // function register will be untouched; the other registers may be
999 void TryGetFunctionPrototype(Register function,
1003 bool miss_on_bound_function = false);
1005 void GetObjectType(Register function,
1009 // Check if a map for a JSObject indicates that the object has fast elements.
1010 // Jump to the specified label if it does not.
1011 void CheckFastElements(Register map,
1015 // Check if a map for a JSObject indicates that the object can have both smi
1016 // and HeapObject elements. Jump to the specified label if it does not.
1017 void CheckFastObjectElements(Register map,
1021 // Check if a map for a JSObject indicates that the object has fast smi only
1022 // elements. Jump to the specified label if it does not.
1023 void CheckFastSmiElements(Register map,
1027 // Check to see if maybe_number can be stored as a double in
1028 // FastDoubleElements. If it can, store it at the index specified by key in
1029 // the FastDoubleElements array elements. Otherwise jump to fail.
1030 void StoreNumberToDoubleElements(Register value_reg,
1032 Register elements_reg,
1037 int elements_offset = 0);
1039 // Compare an object's map with the specified map and its transitioned
1040 // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Jumps to
1041 // "branch_to" if the result of the comparison is "cond". If multiple map
1042 // compares are required, the compare sequences branches to early_success.
1043 void CompareMapAndBranch(Register obj,
1046 Label* early_success,
1050 // As above, but the map of the object is already loaded into the register
1051 // which is preserved by the code generated.
1052 void CompareMapAndBranch(Register obj_map,
1054 Label* early_success,
1058 // Check if the map of an object is equal to a specified map and branch to
1059 // label if not. Skip the smi check if not required (object is known to be a
1060 // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
1061 // against maps that are ElementsKind transition maps of the specificed map.
1062 void CheckMap(Register obj,
1066 SmiCheckType smi_check_type);
1069 void CheckMap(Register obj,
1071 Heap::RootListIndex index,
1073 SmiCheckType smi_check_type);
1075 // Check if the map of an object is equal to a specified map and branch to a
1076 // specified target if equal. Skip the smi check if not required (object is
1077 // known to be a heap object)
1078 void DispatchMap(Register obj,
1081 Handle<Code> success,
1082 SmiCheckType smi_check_type);
1084 // Generates code for reporting that an illegal operation has
1086 void IllegalOperation(int num_arguments);
1089 // Load and check the instance type of an object for being a string.
1090 // Loads the type into the second argument register.
1091 // Returns a condition that will be enabled if the object was a string.
1092 Condition IsObjectStringType(Register obj,
1095 lw(type, FieldMemOperand(obj, HeapObject::kMapOffset));
1096 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset));
1097 And(type, type, Operand(kIsNotStringMask));
1098 ASSERT_EQ(0, kStringTag);
1103 // Picks out an array index from the hash field.
1105 // hash - holds the index's hash. Clobbered.
1106 // index - holds the overwritten index on exit.
1107 void IndexFromHash(Register hash, Register index);
1109 // Get the number of least significant bits from a register.
1110 void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
1111 void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
1113 // Load the value of a number object into a FPU double register. If the
1114 // object is not a number a jump to the label not_number is performed
1115 // and the FPU double register is unchanged.
1116 void ObjectToDoubleFPURegister(
1121 Register heap_number_map,
1123 ObjectToDoubleFlags flags = NO_OBJECT_TO_DOUBLE_FLAGS);
1125 // Load the value of a smi object into a FPU double register. The register
1126 // scratch1 can be the same register as smi in which case smi will hold the
1127 // untagged value afterwards.
1128 void SmiToDoubleFPURegister(Register smi,
1132 // -------------------------------------------------------------------------
1133 // Overflow handling functions.
1134 // Usage: first call the appropriate arithmetic function, then call one of the
1135 // jump functions with the overflow_dst register as the second parameter.
1137 void AdduAndCheckForOverflow(Register dst,
1140 Register overflow_dst,
1141 Register scratch = at);
1143 void SubuAndCheckForOverflow(Register dst,
1146 Register overflow_dst,
1147 Register scratch = at);
1149 void BranchOnOverflow(Label* label,
1150 Register overflow_check,
1151 BranchDelaySlot bd = PROTECT) {
1152 Branch(label, lt, overflow_check, Operand(zero_reg), bd);
1155 void BranchOnNoOverflow(Label* label,
1156 Register overflow_check,
1157 BranchDelaySlot bd = PROTECT) {
1158 Branch(label, ge, overflow_check, Operand(zero_reg), bd);
1161 void RetOnOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1162 Ret(lt, overflow_check, Operand(zero_reg), bd);
1165 void RetOnNoOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1166 Ret(ge, overflow_check, Operand(zero_reg), bd);
1169 // -------------------------------------------------------------------------
1172 // See comments at the beginning of CEntryStub::Generate.
1173 inline void PrepareCEntryArgs(int num_args) {
1175 li(s1, (num_args - 1) * kPointerSize);
1178 inline void PrepareCEntryFunction(const ExternalReference& ref) {
1179 li(s2, Operand(ref));
1182 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
1183 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
1185 // Call a code stub.
1186 void CallStub(CodeStub* stub,
1187 TypeFeedbackId ast_id = TypeFeedbackId::None(),
1190 // Tail call a code stub (jump).
1191 void TailCallStub(CodeStub* stub, COND_ARGS);
1195 void CallJSExitStub(CodeStub* stub);
1197 // Call a runtime routine.
1198 void CallRuntime(const Runtime::Function* f,
1200 SaveFPRegsMode save_doubles = kDontSaveFPRegs);
1201 void CallRuntimeSaveDoubles(Runtime::FunctionId id) {
1202 const Runtime::Function* function = Runtime::FunctionForId(id);
1203 CallRuntime(function, function->nargs, kSaveFPRegs);
1206 // Convenience function: Same as above, but takes the fid instead.
1207 void CallRuntime(Runtime::FunctionId id,
1209 SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
1210 CallRuntime(Runtime::FunctionForId(id), num_arguments, save_doubles);
1213 // Convenience function: call an external reference.
1214 void CallExternalReference(const ExternalReference& ext,
1216 BranchDelaySlot bd = PROTECT);
1218 // Tail call of a runtime routine (jump).
1219 // Like JumpToExternalReference, but also takes care of passing the number
1221 void TailCallExternalReference(const ExternalReference& ext,
1225 // Convenience function: tail call a runtime routine (jump).
1226 void TailCallRuntime(Runtime::FunctionId fid,
1230 int CalculateStackPassedWords(int num_reg_arguments,
1231 int num_double_arguments);
1233 // Before calling a C-function from generated code, align arguments on stack
1234 // and add space for the four mips argument slots.
1235 // After aligning the frame, non-register arguments must be stored on the
1236 // stack, after the argument-slots using helper: CFunctionArgumentOperand().
1237 // The argument count assumes all arguments are word sized.
1238 // Some compilers/platforms require the stack to be aligned when calling
1240 // Needs a scratch register to do some arithmetic. This register will be
1242 void PrepareCallCFunction(int num_reg_arguments,
1243 int num_double_registers,
1245 void PrepareCallCFunction(int num_reg_arguments,
1248 // Arguments 1-4 are placed in registers a0 thru a3 respectively.
1249 // Arguments 5..n are stored to stack using following:
1250 // sw(t0, CFunctionArgumentOperand(5));
1252 // Calls a C function and cleans up the space for arguments allocated
1253 // by PrepareCallCFunction. The called function is not allowed to trigger a
1254 // garbage collection, since that might move the code and invalidate the
1255 // return address (unless this is somehow accounted for by the called
1257 void CallCFunction(ExternalReference function, int num_arguments);
1258 void CallCFunction(Register function, int num_arguments);
1259 void CallCFunction(ExternalReference function,
1260 int num_reg_arguments,
1261 int num_double_arguments);
1262 void CallCFunction(Register function,
1263 int num_reg_arguments,
1264 int num_double_arguments);
1265 void MovFromFloatResult(DoubleRegister dst);
1266 void MovFromFloatParameter(DoubleRegister dst);
1268 // There are two ways of passing double arguments on MIPS, depending on
1269 // whether soft or hard floating point ABI is used. These functions
1270 // abstract parameter passing for the three different ways we call
1271 // C functions from generated code.
1272 void MovToFloatParameter(DoubleRegister src);
1273 void MovToFloatParameters(DoubleRegister src1, DoubleRegister src2);
1274 void MovToFloatResult(DoubleRegister src);
1276 // Calls an API function. Allocates HandleScope, extracts returned value
1277 // from handle and propagates exceptions. Restores context. stack_space
1278 // - space to be unwound on exit (includes the call JS arguments space and
1279 // the additional space allocated for the fast call).
1280 void CallApiFunctionAndReturn(Register function_address,
1281 ExternalReference thunk_ref,
1283 MemOperand return_value_operand,
1284 MemOperand* context_restore_operand);
1286 // Jump to the builtin routine.
1287 void JumpToExternalReference(const ExternalReference& builtin,
1288 BranchDelaySlot bd = PROTECT);
1290 // Invoke specified builtin JavaScript function. Adds an entry to
1291 // the unresolved list if the name does not resolve.
1292 void InvokeBuiltin(Builtins::JavaScript id,
1294 const CallWrapper& call_wrapper = NullCallWrapper());
1296 // Store the code object for the given builtin in the target register and
1297 // setup the function in a1.
1298 void GetBuiltinEntry(Register target, Builtins::JavaScript id);
1300 // Store the function for the given builtin in the target register.
1301 void GetBuiltinFunction(Register target, Builtins::JavaScript id);
1305 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders.
1309 Handle<Object> CodeObject() {
1310 ASSERT(!code_object_.is_null());
1311 return code_object_;
1314 // -------------------------------------------------------------------------
1315 // StatsCounter support.
1317 void SetCounter(StatsCounter* counter, int value,
1318 Register scratch1, Register scratch2);
1319 void IncrementCounter(StatsCounter* counter, int value,
1320 Register scratch1, Register scratch2);
1321 void DecrementCounter(StatsCounter* counter, int value,
1322 Register scratch1, Register scratch2);
1325 // -------------------------------------------------------------------------
1328 // Calls Abort(msg) if the condition cc is not satisfied.
1329 // Use --debug_code to enable.
1330 void Assert(Condition cc, BailoutReason reason, Register rs, Operand rt);
1331 void AssertFastElements(Register elements);
1333 // Like Assert(), but always enabled.
1334 void Check(Condition cc, BailoutReason reason, Register rs, Operand rt);
1336 // Print a message to stdout and abort execution.
1337 void Abort(BailoutReason msg);
1339 // Verify restrictions about code generated in stubs.
1340 void set_generating_stub(bool value) { generating_stub_ = value; }
1341 bool generating_stub() { return generating_stub_; }
1342 void set_has_frame(bool value) { has_frame_ = value; }
1343 bool has_frame() { return has_frame_; }
1344 inline bool AllowThisStubCall(CodeStub* stub);
1346 // ---------------------------------------------------------------------------
1347 // Number utilities.
1349 // Check whether the value of reg is a power of two and not zero. If not
1350 // control continues at the label not_power_of_two. If reg is a power of two
1351 // the register scratch contains the value of (reg - 1) when control falls
1353 void JumpIfNotPowerOfTwoOrZero(Register reg,
1355 Label* not_power_of_two_or_zero);
1357 // -------------------------------------------------------------------------
1360 void SmiTag(Register reg) {
1361 Addu(reg, reg, reg);
1364 // Test for overflow < 0: use BranchOnOverflow() or BranchOnNoOverflow().
1365 void SmiTagCheckOverflow(Register reg, Register overflow);
1366 void SmiTagCheckOverflow(Register dst, Register src, Register overflow);
1368 void SmiTag(Register dst, Register src) {
1369 Addu(dst, src, src);
1372 // Try to convert int32 to smi. If the value is to large, preserve
1373 // the original value and jump to not_a_smi. Destroys scratch and
1375 void TrySmiTag(Register reg, Register scratch, Label* not_a_smi) {
1376 TrySmiTag(reg, reg, scratch, not_a_smi);
1378 void TrySmiTag(Register dst,
1382 SmiTagCheckOverflow(at, src, scratch);
1383 BranchOnOverflow(not_a_smi, scratch);
1387 void SmiUntag(Register reg) {
1388 sra(reg, reg, kSmiTagSize);
1391 void SmiUntag(Register dst, Register src) {
1392 sra(dst, src, kSmiTagSize);
1395 // Test if the register contains a smi.
1396 inline void SmiTst(Register value, Register scratch) {
1397 And(scratch, value, Operand(kSmiTagMask));
1399 inline void NonNegativeSmiTst(Register value, Register scratch) {
1400 And(scratch, value, Operand(kSmiTagMask | kSmiSignMask));
1403 // Untag the source value into destination and jump if source is a smi.
1404 // Souce and destination can be the same register.
1405 void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
1407 // Untag the source value into destination and jump if source is not a smi.
1408 // Souce and destination can be the same register.
1409 void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
1411 // Jump the register contains a smi.
1412 void JumpIfSmi(Register value,
1414 Register scratch = at,
1415 BranchDelaySlot bd = PROTECT);
1417 // Jump if the register contains a non-smi.
1418 void JumpIfNotSmi(Register value,
1419 Label* not_smi_label,
1420 Register scratch = at,
1421 BranchDelaySlot bd = PROTECT);
1423 // Jump if either of the registers contain a non-smi.
1424 void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
1425 // Jump if either of the registers contain a smi.
1426 void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
1428 // Abort execution if argument is a smi, enabled via --debug-code.
1429 void AssertNotSmi(Register object);
1430 void AssertSmi(Register object);
1432 // Abort execution if argument is not a string, enabled via --debug-code.
1433 void AssertString(Register object);
1435 // Abort execution if argument is not a name, enabled via --debug-code.
1436 void AssertName(Register object);
1438 // Abort execution if reg is not the root value with the given index,
1439 // enabled via --debug-code.
1440 void AssertIsRoot(Register reg, Heap::RootListIndex index);
1442 // ---------------------------------------------------------------------------
1443 // HeapNumber utilities.
1445 void JumpIfNotHeapNumber(Register object,
1446 Register heap_number_map,
1448 Label* on_not_heap_number);
1450 // -------------------------------------------------------------------------
1451 // String utilities.
1453 // Generate code to do a lookup in the number string cache. If the number in
1454 // the register object is found in the cache the generated code falls through
1455 // with the result in the result register. The object and the result register
1456 // can be the same. If the number is not found in the cache the code jumps to
1457 // the label not_found with only the content of register object unchanged.
1458 void LookupNumberStringCache(Register object,
1465 // Checks if both instance types are sequential ASCII strings and jumps to
1466 // label if either is not.
1467 void JumpIfBothInstanceTypesAreNotSequentialAscii(
1468 Register first_object_instance_type,
1469 Register second_object_instance_type,
1474 // Check if instance type is sequential ASCII string and jump to label if
1476 void JumpIfInstanceTypeIsNotSequentialAscii(Register type,
1480 void JumpIfNotUniqueName(Register reg, Label* not_unique_name);
1482 void EmitSeqStringSetCharCheck(Register string,
1486 uint32_t encoding_mask);
1488 // Test that both first and second are sequential ASCII strings.
1489 // Assume that they are non-smis.
1490 void JumpIfNonSmisNotBothSequentialAsciiStrings(Register first,
1496 // Test that both first and second are sequential ASCII strings.
1497 // Check that they are non-smis.
1498 void JumpIfNotBothSequentialAsciiStrings(Register first,
1504 void ClampUint8(Register output_reg, Register input_reg);
1506 void ClampDoubleToUint8(Register result_reg,
1507 DoubleRegister input_reg,
1508 DoubleRegister temp_double_reg);
1511 void LoadInstanceDescriptors(Register map, Register descriptors);
1512 void EnumLength(Register dst, Register map);
1513 void NumberOfOwnDescriptors(Register dst, Register map);
1515 template<typename Field>
1516 void DecodeField(Register reg) {
1517 static const int shift = Field::kShift;
1518 static const int mask = (Field::kMask >> shift) << kSmiTagSize;
1519 srl(reg, reg, shift);
1520 And(reg, reg, Operand(mask));
1523 // Generates function and stub prologue code.
1524 void Prologue(PrologueFrameMode frame_mode);
1526 // Activation support.
1527 void EnterFrame(StackFrame::Type type);
1528 void LeaveFrame(StackFrame::Type type);
1530 // Patch the relocated value (lui/ori pair).
1531 void PatchRelocatedValue(Register li_location,
1533 Register new_value);
1534 // Get the relocatad value (loaded data) from the lui/ori pair.
1535 void GetRelocatedValue(Register li_location,
1539 // Expects object in a0 and returns map with validated enum cache
1540 // in a0. Assumes that any other register can be used as a scratch.
1541 void CheckEnumCache(Register null_value, Label* call_runtime);
1543 // AllocationMemento support. Arrays may have an associated
1544 // AllocationMemento object that can be checked for in order to pretransition
1546 // On entry, receiver_reg should point to the array object.
1547 // scratch_reg gets clobbered.
1548 // If allocation info is present, jump to allocation_memento_present.
1549 void TestJSArrayForAllocationMemento(
1550 Register receiver_reg,
1551 Register scratch_reg,
1552 Label* no_memento_found,
1553 Condition cond = al,
1554 Label* allocation_memento_present = NULL);
1556 void JumpIfJSArrayHasAllocationMemento(Register receiver_reg,
1557 Register scratch_reg,
1558 Label* memento_found) {
1559 Label no_memento_found;
1560 TestJSArrayForAllocationMemento(receiver_reg, scratch_reg,
1561 &no_memento_found, eq, memento_found);
1562 bind(&no_memento_found);
1565 // Jumps to found label if a prototype map has dictionary elements.
1566 void JumpIfDictionaryInPrototypeChain(Register object, Register scratch0,
1567 Register scratch1, Label* found);
1570 void CallCFunctionHelper(Register function,
1571 int num_reg_arguments,
1572 int num_double_arguments);
1574 void BranchAndLinkShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1575 void BranchAndLinkShort(int16_t offset, Condition cond, Register rs,
1577 BranchDelaySlot bdslot = PROTECT);
1578 void BranchAndLinkShort(Label* L, BranchDelaySlot bdslot = PROTECT);
1579 void BranchAndLinkShort(Label* L, Condition cond, Register rs,
1581 BranchDelaySlot bdslot = PROTECT);
1582 void J(Label* L, BranchDelaySlot bdslot);
1583 void Jr(Label* L, BranchDelaySlot bdslot);
1584 void Jalr(Label* L, BranchDelaySlot bdslot);
1586 // Helper functions for generating invokes.
1587 void InvokePrologue(const ParameterCount& expected,
1588 const ParameterCount& actual,
1589 Handle<Code> code_constant,
1592 bool* definitely_mismatches,
1594 const CallWrapper& call_wrapper);
1596 // Get the code for the given builtin. Returns if able to resolve
1597 // the function in the 'resolved' flag.
1598 Handle<Code> ResolveBuiltin(Builtins::JavaScript id, bool* resolved);
1600 void InitializeNewString(Register string,
1602 Heap::RootListIndex map_index,
1606 // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
1607 void InNewSpace(Register object,
1609 Condition cond, // eq for new space, ne otherwise.
1612 // Helper for finding the mark bits for an address. Afterwards, the
1613 // bitmap register points at the word with the mark bits and the mask
1614 // the position of the first bit. Leaves addr_reg unchanged.
1615 inline void GetMarkBits(Register addr_reg,
1616 Register bitmap_reg,
1619 // Helper for throwing exceptions. Compute a handler address and jump to
1620 // it. See the implementation for register usage.
1621 void JumpToHandlerEntry();
1623 // Compute memory operands for safepoint stack slots.
1624 static int SafepointRegisterStackIndex(int reg_code);
1625 MemOperand SafepointRegisterSlot(Register reg);
1626 MemOperand SafepointRegistersAndDoublesSlot(Register reg);
1628 bool generating_stub_;
1630 // This handle will be patched with the code object on installation.
1631 Handle<Object> code_object_;
1633 // Needs access to SafepointRegisterStackIndex for compiled frame
1635 friend class StandardFrame;
1639 // The code patcher is used to patch (typically) small parts of code e.g. for
1640 // debugging and other types of instrumentation. When using the code patcher
1641 // the exact number of bytes specified must be emitted. It is not legal to emit
1642 // relocation information. If any of these constraints are violated it causes
1643 // an assertion to fail.
1646 CodePatcher(byte* address, int instructions);
1647 virtual ~CodePatcher();
1649 // Macro assembler to emit code.
1650 MacroAssembler* masm() { return &masm_; }
1652 // Emit an instruction directly.
1653 void Emit(Instr instr);
1655 // Emit an address directly.
1656 void Emit(Address addr);
1658 // Change the condition part of an instruction leaving the rest of the current
1659 // instruction unchanged.
1660 void ChangeBranchCondition(Condition cond);
1663 byte* address_; // The address of the code being patched.
1664 int size_; // Number of bytes of the expected patch size.
1665 MacroAssembler masm_; // Macro assembler used to generate the code.
1670 #ifdef GENERATED_CODE_COVERAGE
1671 #define CODE_COVERAGE_STRINGIFY(x) #x
1672 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1673 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1674 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1676 #define ACCESS_MASM(masm) masm->
1679 } } // namespace v8::internal
1681 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_