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28 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
29 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
31 #include "assembler.h"
32 #include "mips/assembler-mips.h"
33 #include "v8globals.h"
38 // Forward declaration.
41 // Reserved Register Usage Summary.
43 // Registers t8, t9, and at are reserved for use by the MacroAssembler.
45 // The programmer should know that the MacroAssembler may clobber these three,
46 // but won't touch other registers except in special cases.
48 // Per the MIPS ABI, register t9 must be used for indirect function call
49 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when
50 // trying to update gp register for position-independent-code. Whenever
51 // MIPS generated code calls C code, it must be via t9 register.
54 // Flags used for LeaveExitFrame function.
55 enum LeaveExitFrameMode {
57 NO_EMIT_RETURN = false
60 // Flags used for AllocateHeapNumber
68 // Flags used for the ObjectToDoubleFPURegister function.
69 enum ObjectToDoubleFlags {
71 NO_OBJECT_TO_DOUBLE_FLAGS = 0,
72 // Object is known to be a non smi.
73 OBJECT_NOT_SMI = 1 << 0,
74 // Don't load NaNs or infinities, branch to the non number case instead.
75 AVOID_NANS_AND_INFINITIES = 1 << 1
78 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls.
79 enum BranchDelaySlot {
84 // Flags used for the li macro-assembler function.
86 // If the constant value can be represented in just 16 bits, then
87 // optimize the li to use a single instruction, rather than lui/ori pair.
89 // Always use 2 instructions (lui/ori pair), even if the constant could
90 // be loaded with just one, so that this value is patchable later.
95 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
96 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
97 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved };
99 Register GetRegisterThatIsNotOneOf(Register reg1,
100 Register reg2 = no_reg,
101 Register reg3 = no_reg,
102 Register reg4 = no_reg,
103 Register reg5 = no_reg,
104 Register reg6 = no_reg);
106 bool AreAliased(Register r1, Register r2, Register r3, Register r4);
109 // -----------------------------------------------------------------------------
110 // Static helper functions.
112 inline MemOperand ContextOperand(Register context, int index) {
113 return MemOperand(context, Context::SlotOffset(index));
117 inline MemOperand GlobalObjectOperand() {
118 return ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX);
122 // Generate a MemOperand for loading a field from an object.
123 inline MemOperand FieldMemOperand(Register object, int offset) {
124 return MemOperand(object, offset - kHeapObjectTag);
128 // Generate a MemOperand for storing arguments 5..N on the stack
129 // when calling CallCFunction().
130 inline MemOperand CFunctionArgumentOperand(int index) {
131 ASSERT(index > kCArgSlotCount);
132 // Argument 5 takes the slot just past the four Arg-slots.
133 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize;
134 return MemOperand(sp, offset);
138 // MacroAssembler implements a collection of frequently used macros.
139 class MacroAssembler: public Assembler {
141 // The isolate parameter can be NULL if the macro assembler should
142 // not use isolate-dependent functionality. In this case, it's the
143 // responsibility of the caller to never invoke such function on the
145 MacroAssembler(Isolate* isolate, void* buffer, int size);
148 #define COND_TYPED_ARGS Condition cond, Register r1, const Operand& r2
149 #define COND_ARGS cond, r1, r2
151 // Cases when relocation is not needed.
152 #define DECLARE_NORELOC_PROTOTYPE(Name, target_type) \
153 void Name(target_type target, BranchDelaySlot bd = PROTECT); \
154 inline void Name(BranchDelaySlot bd, target_type target) { \
157 void Name(target_type target, \
159 BranchDelaySlot bd = PROTECT); \
160 inline void Name(BranchDelaySlot bd, \
161 target_type target, \
163 Name(target, COND_ARGS, bd); \
166 #define DECLARE_BRANCH_PROTOTYPES(Name) \
167 DECLARE_NORELOC_PROTOTYPE(Name, Label*) \
168 DECLARE_NORELOC_PROTOTYPE(Name, int16_t)
170 DECLARE_BRANCH_PROTOTYPES(Branch)
171 DECLARE_BRANCH_PROTOTYPES(BranchAndLink)
173 #undef DECLARE_BRANCH_PROTOTYPES
174 #undef COND_TYPED_ARGS
178 // Jump, Call, and Ret pseudo instructions implementing inter-working.
179 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
180 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
182 void Jump(Register target, COND_ARGS);
183 void Jump(intptr_t target, RelocInfo::Mode rmode, COND_ARGS);
184 void Jump(Address target, RelocInfo::Mode rmode, COND_ARGS);
185 void Jump(Handle<Code> code, RelocInfo::Mode rmode, COND_ARGS);
186 static int CallSize(Register target, COND_ARGS);
187 void Call(Register target, COND_ARGS);
188 static int CallSize(Address target, RelocInfo::Mode rmode, COND_ARGS);
189 void Call(Address target, RelocInfo::Mode rmode, COND_ARGS);
190 int CallSize(Handle<Code> code,
191 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
192 TypeFeedbackId ast_id = TypeFeedbackId::None(),
194 void Call(Handle<Code> code,
195 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
196 TypeFeedbackId ast_id = TypeFeedbackId::None(),
199 inline void Ret(BranchDelaySlot bd, Condition cond = al,
200 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
201 Ret(cond, rs, rt, bd);
204 void Branch(Label* L,
207 Heap::RootListIndex index,
208 BranchDelaySlot bdslot = PROTECT);
212 // Emit code to discard a non-negative number of pointer-sized elements
213 // from the stack, clobbering only the sp register.
215 Condition cond = cc_always,
216 Register reg = no_reg,
217 const Operand& op = Operand(no_reg));
219 // Trivial case of DropAndRet that utilizes the delay slot and only emits
221 void DropAndRet(int drop);
223 void DropAndRet(int drop,
228 // Swap two registers. If the scratch register is omitted then a slightly
229 // less efficient form using xor instead of mov is emitted.
230 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
232 void Call(Label* target);
234 inline void Move(Register dst, Register src) {
240 inline void Move(FPURegister dst, FPURegister src) {
246 inline void Move(Register dst_low, Register dst_high, FPURegister src) {
248 mfc1(dst_high, FPURegister::from_code(src.code() + 1));
251 inline void FmoveHigh(Register dst_high, FPURegister src) {
252 mfc1(dst_high, FPURegister::from_code(src.code() + 1));
255 inline void FmoveLow(Register dst_low, FPURegister src) {
259 inline void Move(FPURegister dst, Register src_low, Register src_high) {
261 mtc1(src_high, FPURegister::from_code(dst.code() + 1));
265 void Move(FPURegister dst, double imm);
266 void Movz(Register rd, Register rs, Register rt);
267 void Movn(Register rd, Register rs, Register rt);
268 void Movt(Register rd, Register rs, uint16_t cc = 0);
269 void Movf(Register rd, Register rs, uint16_t cc = 0);
271 void Clz(Register rd, Register rs);
273 // Jump unconditionally to given label.
274 // We NEED a nop in the branch delay slot, as it used by v8, for example in
275 // CodeGenerator::ProcessDeferred().
276 // Currently the branch delay slot is filled by the MacroAssembler.
277 // Use rather b(Label) for code generation.
282 void Load(Register dst, const MemOperand& src, Representation r);
283 void Store(Register src, const MemOperand& dst, Representation r);
285 // Load an object from the root table.
286 void LoadRoot(Register destination,
287 Heap::RootListIndex index);
288 void LoadRoot(Register destination,
289 Heap::RootListIndex index,
290 Condition cond, Register src1, const Operand& src2);
292 // Store an object to the root table.
293 void StoreRoot(Register source,
294 Heap::RootListIndex index);
295 void StoreRoot(Register source,
296 Heap::RootListIndex index,
297 Condition cond, Register src1, const Operand& src2);
299 // ---------------------------------------------------------------------------
302 void IncrementalMarkingRecordWriteHelper(Register object,
306 enum RememberedSetFinalAction {
312 // Record in the remembered set the fact that we have a pointer to new space
313 // at the address pointed to by the addr register. Only works if addr is not
315 void RememberedSetHelper(Register object, // Used for debug code.
318 SaveFPRegsMode save_fp,
319 RememberedSetFinalAction and_then);
321 void CheckPageFlag(Register object,
325 Label* condition_met);
327 void CheckMapDeprecated(Handle<Map> map,
329 Label* if_deprecated);
331 // Check if object is in new space. Jumps if the object is not in new space.
332 // The register scratch can be object itself, but it will be clobbered.
333 void JumpIfNotInNewSpace(Register object,
336 InNewSpace(object, scratch, ne, branch);
339 // Check if object is in new space. Jumps if the object is in new space.
340 // The register scratch can be object itself, but scratch will be clobbered.
341 void JumpIfInNewSpace(Register object,
344 InNewSpace(object, scratch, eq, branch);
347 // Check if an object has a given incremental marking color.
348 void HasColor(Register object,
355 void JumpIfBlack(Register object,
360 // Checks the color of an object. If the object is already grey or black
361 // then we just fall through, since it is already live. If it is white and
362 // we can determine that it doesn't need to be scanned, then we just mark it
363 // black and fall through. For the rest we jump to the label so the
364 // incremental marker can fix its assumptions.
365 void EnsureNotWhite(Register object,
369 Label* object_is_white_and_not_data);
371 // Detects conservatively whether an object is data-only, i.e. it does need to
372 // be scanned by the garbage collector.
373 void JumpIfDataObject(Register value,
375 Label* not_data_object);
377 // Notify the garbage collector that we wrote a pointer into an object.
378 // |object| is the object being stored into, |value| is the object being
379 // stored. value and scratch registers are clobbered by the operation.
380 // The offset is the offset from the start of the object, not the offset from
381 // the tagged HeapObject pointer. For use with FieldOperand(reg, off).
382 void RecordWriteField(
388 SaveFPRegsMode save_fp,
389 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
390 SmiCheck smi_check = INLINE_SMI_CHECK);
392 // As above, but the offset has the tag presubtracted. For use with
393 // MemOperand(reg, off).
394 inline void RecordWriteContextSlot(
400 SaveFPRegsMode save_fp,
401 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
402 SmiCheck smi_check = INLINE_SMI_CHECK) {
403 RecordWriteField(context,
404 offset + kHeapObjectTag,
409 remembered_set_action,
413 // For a given |object| notify the garbage collector that the slot |address|
414 // has been written. |value| is the object being stored. The value and
415 // address registers are clobbered by the operation.
421 SaveFPRegsMode save_fp,
422 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
423 SmiCheck smi_check = INLINE_SMI_CHECK);
426 // ---------------------------------------------------------------------------
427 // Inline caching support.
429 // Generate code for checking access rights - used for security checks
430 // on access to global objects across environments. The holder register
431 // is left untouched, whereas both scratch registers are clobbered.
432 void CheckAccessGlobalProxy(Register holder_reg,
436 void GetNumberHash(Register reg0, Register scratch);
438 void LoadFromNumberDictionary(Label* miss,
447 inline void MarkCode(NopMarkerTypes type) {
451 // Check if the given instruction is a 'type' marker.
452 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
453 // nop(type)). These instructions are generated to mark special location in
454 // the code, like some special IC code.
455 static inline bool IsMarkedCode(Instr instr, int type) {
456 ASSERT((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
457 return IsNop(instr, type);
461 static inline int GetCodeMarker(Instr instr) {
462 uint32_t opcode = ((instr & kOpcodeMask));
463 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift);
464 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift);
465 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift);
467 // Return <n> if we have a sll zero_reg, zero_reg, n
469 bool sllzz = (opcode == SLL &&
470 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
471 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
473 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1;
474 ASSERT((type == -1) ||
475 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
481 // ---------------------------------------------------------------------------
482 // Allocation support.
484 // Allocate an object in new space or old pointer space. The object_size is
485 // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
486 // is passed. If the space is exhausted control continues at the gc_required
487 // label. The allocated object is returned in result. If the flag
488 // tag_allocated_object is true the result is tagged as as a heap object.
489 // All registers are clobbered also when control continues at the gc_required
491 void Allocate(int object_size,
496 AllocationFlags flags);
498 void Allocate(Register object_size,
503 AllocationFlags flags);
505 // Undo allocation in new space. The object passed and objects allocated after
506 // it will no longer be allocated. The caller must make sure that no pointers
507 // are left to the object(s) no longer allocated as they would be invalid when
508 // allocation is undone.
509 void UndoAllocationInNewSpace(Register object, Register scratch);
512 void AllocateTwoByteString(Register result,
518 void AllocateAsciiString(Register result,
524 void AllocateTwoByteConsString(Register result,
529 void AllocateAsciiConsString(Register result,
534 void AllocateTwoByteSlicedString(Register result,
539 void AllocateAsciiSlicedString(Register result,
545 // Allocates a heap number or jumps to the gc_required label if the young
546 // space is full and a scavenge is needed. All registers are clobbered also
547 // when control continues at the gc_required label.
548 void AllocateHeapNumber(Register result,
551 Register heap_number_map,
553 TaggingMode tagging_mode = TAG_RESULT);
554 void AllocateHeapNumberWithValue(Register result,
560 // ---------------------------------------------------------------------------
561 // Instruction macros.
563 #define DEFINE_INSTRUCTION(instr) \
564 void instr(Register rd, Register rs, const Operand& rt); \
565 void instr(Register rd, Register rs, Register rt) { \
566 instr(rd, rs, Operand(rt)); \
568 void instr(Register rs, Register rt, int32_t j) { \
569 instr(rs, rt, Operand(j)); \
572 #define DEFINE_INSTRUCTION2(instr) \
573 void instr(Register rs, const Operand& rt); \
574 void instr(Register rs, Register rt) { \
575 instr(rs, Operand(rt)); \
577 void instr(Register rs, int32_t j) { \
578 instr(rs, Operand(j)); \
581 DEFINE_INSTRUCTION(Addu);
582 DEFINE_INSTRUCTION(Subu);
583 DEFINE_INSTRUCTION(Mul);
584 DEFINE_INSTRUCTION2(Mult);
585 DEFINE_INSTRUCTION2(Multu);
586 DEFINE_INSTRUCTION2(Div);
587 DEFINE_INSTRUCTION2(Divu);
589 DEFINE_INSTRUCTION(And);
590 DEFINE_INSTRUCTION(Or);
591 DEFINE_INSTRUCTION(Xor);
592 DEFINE_INSTRUCTION(Nor);
593 DEFINE_INSTRUCTION2(Neg);
595 DEFINE_INSTRUCTION(Slt);
596 DEFINE_INSTRUCTION(Sltu);
598 // MIPS32 R2 instruction macro.
599 DEFINE_INSTRUCTION(Ror);
601 #undef DEFINE_INSTRUCTION
602 #undef DEFINE_INSTRUCTION2
604 void Pref(int32_t hint, const MemOperand& rs);
607 // ---------------------------------------------------------------------------
608 // Pseudo-instructions.
610 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
612 void Ulw(Register rd, const MemOperand& rs);
613 void Usw(Register rd, const MemOperand& rs);
615 // Load int32 in the rd register.
616 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
617 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {
618 li(rd, Operand(j), mode);
620 void li(Register dst, Handle<Object> value, LiFlags mode = OPTIMIZE_SIZE);
622 // Push multiple registers on the stack.
623 // Registers are saved in numerical order, with higher numbered registers
624 // saved in higher memory addresses.
625 void MultiPush(RegList regs);
626 void MultiPushReversed(RegList regs);
628 void MultiPushFPU(RegList regs);
629 void MultiPushReversedFPU(RegList regs);
631 void push(Register src) {
632 Addu(sp, sp, Operand(-kPointerSize));
633 sw(src, MemOperand(sp, 0));
635 void Push(Register src) { push(src); }
638 void Push(Handle<Object> handle);
639 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
641 // Push two registers. Pushes leftmost register first (to highest address).
642 void Push(Register src1, Register src2) {
643 Subu(sp, sp, Operand(2 * kPointerSize));
644 sw(src1, MemOperand(sp, 1 * kPointerSize));
645 sw(src2, MemOperand(sp, 0 * kPointerSize));
648 // Push three registers. Pushes leftmost register first (to highest address).
649 void Push(Register src1, Register src2, Register src3) {
650 Subu(sp, sp, Operand(3 * kPointerSize));
651 sw(src1, MemOperand(sp, 2 * kPointerSize));
652 sw(src2, MemOperand(sp, 1 * kPointerSize));
653 sw(src3, MemOperand(sp, 0 * kPointerSize));
656 // Push four registers. Pushes leftmost register first (to highest address).
657 void Push(Register src1, Register src2, Register src3, Register src4) {
658 Subu(sp, sp, Operand(4 * kPointerSize));
659 sw(src1, MemOperand(sp, 3 * kPointerSize));
660 sw(src2, MemOperand(sp, 2 * kPointerSize));
661 sw(src3, MemOperand(sp, 1 * kPointerSize));
662 sw(src4, MemOperand(sp, 0 * kPointerSize));
665 void Push(Register src, Condition cond, Register tst1, Register tst2) {
666 // Since we don't have conditional execution we use a Branch.
667 Branch(3, cond, tst1, Operand(tst2));
668 Subu(sp, sp, Operand(kPointerSize));
669 sw(src, MemOperand(sp, 0));
672 // Pops multiple values from the stack and load them in the
673 // registers specified in regs. Pop order is the opposite as in MultiPush.
674 void MultiPop(RegList regs);
675 void MultiPopReversed(RegList regs);
677 void MultiPopFPU(RegList regs);
678 void MultiPopReversedFPU(RegList regs);
680 void pop(Register dst) {
681 lw(dst, MemOperand(sp, 0));
682 Addu(sp, sp, Operand(kPointerSize));
684 void Pop(Register dst) { pop(dst); }
686 // Pop two registers. Pops rightmost register first (from lower address).
687 void Pop(Register src1, Register src2) {
688 ASSERT(!src1.is(src2));
689 lw(src2, MemOperand(sp, 0 * kPointerSize));
690 lw(src1, MemOperand(sp, 1 * kPointerSize));
691 Addu(sp, sp, 2 * kPointerSize);
694 // Pop three registers. Pops rightmost register first (from lower address).
695 void Pop(Register src1, Register src2, Register src3) {
696 lw(src3, MemOperand(sp, 0 * kPointerSize));
697 lw(src2, MemOperand(sp, 1 * kPointerSize));
698 lw(src1, MemOperand(sp, 2 * kPointerSize));
699 Addu(sp, sp, 3 * kPointerSize);
702 void Pop(uint32_t count = 1) {
703 Addu(sp, sp, Operand(count * kPointerSize));
706 // Push and pop the registers that can hold pointers, as defined by the
707 // RegList constant kSafepointSavedRegisters.
708 void PushSafepointRegisters();
709 void PopSafepointRegisters();
710 void PushSafepointRegistersAndDoubles();
711 void PopSafepointRegistersAndDoubles();
712 // Store value in register src in the safepoint stack slot for
714 void StoreToSafepointRegisterSlot(Register src, Register dst);
715 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst);
716 // Load the value of the src register from its safepoint stack slot
717 // into register dst.
718 void LoadFromSafepointRegisterSlot(Register dst, Register src);
720 // Flush the I-cache from asm code. You should use CPU::FlushICache from C.
721 // Does not handle errors.
722 void FlushICache(Register address, unsigned instructions);
724 // MIPS32 R2 instruction macro.
725 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
726 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
728 // ---------------------------------------------------------------------------
729 // FPU macros. These do not handle special cases like NaN or +- inf.
731 // Convert unsigned word to double.
732 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
733 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
735 // Convert double to unsigned word.
736 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
737 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch);
739 void Trunc_w_d(FPURegister fd, FPURegister fs);
740 void Round_w_d(FPURegister fd, FPURegister fs);
741 void Floor_w_d(FPURegister fd, FPURegister fs);
742 void Ceil_w_d(FPURegister fd, FPURegister fs);
743 // Wrapper function for the different cmp/branch types.
744 void BranchF(Label* target,
749 BranchDelaySlot bd = PROTECT);
751 // Alternate (inline) version for better readability with USE_DELAY_SLOT.
752 inline void BranchF(BranchDelaySlot bd,
758 BranchF(target, nan, cc, cmp1, cmp2, bd);
761 // Truncates a double using a specific rounding mode, and writes the value
762 // to the result register.
763 // The except_flag will contain any exceptions caused by the instruction.
764 // If check_inexact is kDontCheckForInexactConversion, then the inexact
765 // exception is masked.
766 void EmitFPUTruncate(FPURoundingMode rounding_mode,
768 DoubleRegister double_input,
770 DoubleRegister double_scratch,
771 Register except_flag,
772 CheckForInexactConversion check_inexact
773 = kDontCheckForInexactConversion);
775 // Performs a truncating conversion of a floating point number as used by
776 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
777 // succeeds, otherwise falls through if result is saturated. On return
778 // 'result' either holds answer, or is clobbered on fall through.
780 // Only public for the test code in test-code-stubs-arm.cc.
781 void TryInlineTruncateDoubleToI(Register result,
782 DoubleRegister input,
785 // Performs a truncating conversion of a floating point number as used by
786 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
787 // Exits with 'result' holding the answer.
788 void TruncateDoubleToI(Register result, DoubleRegister double_input);
790 // Performs a truncating conversion of a heap number as used by
791 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 'result' and 'input'
792 // must be different registers. Exits with 'result' holding the answer.
793 void TruncateHeapNumberToI(Register result, Register object);
795 // Converts the smi or heap number in object to an int32 using the rules
796 // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
797 // and brought into the range -2^31 .. +2^31 - 1. 'result' and 'input' must be
798 // different registers.
799 void TruncateNumberToI(Register object,
801 Register heap_number_map,
805 // Loads the number from object into dst register.
806 // If |object| is neither smi nor heap number, |not_number| is jumped to
807 // with |object| still intact.
808 void LoadNumber(Register object,
810 Register heap_number_map,
814 // Loads the number from object into double_dst in the double format.
815 // Control will jump to not_int32 if the value cannot be exactly represented
816 // by a 32-bit integer.
817 // Floating point value in the 32-bit integer range that are not exact integer
819 void LoadNumberAsInt32Double(Register object,
820 DoubleRegister double_dst,
821 Register heap_number_map,
824 FPURegister double_scratch,
827 // Loads the number from object into dst as a 32-bit integer.
828 // Control will jump to not_int32 if the object cannot be exactly represented
829 // by a 32-bit integer.
830 // Floating point value in the 32-bit integer range that are not exact integer
831 // won't be converted.
832 void LoadNumberAsInt32(Register object,
834 Register heap_number_map,
837 FPURegister double_scratch0,
838 FPURegister double_scratch1,
842 // argc - argument count to be dropped by LeaveExitFrame.
843 // save_doubles - saves FPU registers on stack, currently disabled.
844 // stack_space - extra stack space.
845 void EnterExitFrame(bool save_doubles,
846 int stack_space = 0);
848 // Leave the current exit frame.
849 void LeaveExitFrame(bool save_doubles,
851 bool restore_context,
852 bool do_return = NO_EMIT_RETURN);
854 // Get the actual activation frame alignment for target environment.
855 static int ActivationFrameAlignment();
857 // Make sure the stack is aligned. Only emits code in debug mode.
858 void AssertStackIsAligned();
860 void LoadContext(Register dst, int context_chain_length);
862 // Conditionally load the cached Array transitioned map of type
863 // transitioned_kind from the native context if the map in register
864 // map_in_out is the cached Array map in the native context of
866 void LoadTransitionedArrayMapConditional(
867 ElementsKind expected_kind,
868 ElementsKind transitioned_kind,
871 Label* no_map_match);
873 // Load the initial map for new Arrays from a JSFunction.
874 void LoadInitialArrayMap(Register function_in,
877 bool can_have_holes);
879 void LoadGlobalFunction(int index, Register function);
880 void LoadArrayFunction(Register function);
882 // Load the initial map from the global function. The registers
883 // function and map can be the same, function is then overwritten.
884 void LoadGlobalFunctionInitialMap(Register function,
888 void InitializeRootRegister() {
889 ExternalReference roots_array_start =
890 ExternalReference::roots_array_start(isolate());
891 li(kRootRegister, Operand(roots_array_start));
894 // -------------------------------------------------------------------------
895 // JavaScript invokes.
897 // Set up call kind marking in t1. The method takes t1 as an
898 // explicit first parameter to make the code more readable at the
900 void SetCallKind(Register dst, CallKind kind);
902 // Invoke the JavaScript function code by either calling or jumping.
903 void InvokeCode(Register code,
904 const ParameterCount& expected,
905 const ParameterCount& actual,
907 const CallWrapper& call_wrapper,
910 void InvokeCode(Handle<Code> code,
911 const ParameterCount& expected,
912 const ParameterCount& actual,
913 RelocInfo::Mode rmode,
917 // Invoke the JavaScript function in the given register. Changes the
918 // current context to the context in the function before invoking.
919 void InvokeFunction(Register function,
920 const ParameterCount& actual,
922 const CallWrapper& call_wrapper,
925 void InvokeFunction(Register function,
926 const ParameterCount& expected,
927 const ParameterCount& actual,
929 const CallWrapper& call_wrapper,
932 void InvokeFunction(Handle<JSFunction> function,
933 const ParameterCount& expected,
934 const ParameterCount& actual,
936 const CallWrapper& call_wrapper,
940 void IsObjectJSObjectType(Register heap_object,
945 void IsInstanceJSObjectType(Register map,
949 void IsObjectJSStringType(Register object,
953 void IsObjectNameType(Register object,
957 #ifdef ENABLE_DEBUGGER_SUPPORT
958 // -------------------------------------------------------------------------
965 // -------------------------------------------------------------------------
966 // Exception handling.
968 // Push a new try handler and link into try handler chain.
969 void PushTryHandler(StackHandler::Kind kind, int handler_index);
971 // Unlink the stack handler on top of the stack from the try handler chain.
972 // Must preserve the result register.
973 void PopTryHandler();
975 // Passes thrown value to the handler of top of the try handler chain.
976 void Throw(Register value);
978 // Propagates an uncatchable exception to the top of the current JS stack's
980 void ThrowUncatchable(Register value);
982 // Throw a message string as an exception.
983 void Throw(BailoutReason reason);
985 // Throw a message string as an exception if a condition is not true.
986 void ThrowIf(Condition cc, BailoutReason reason, Register rs, Operand rt);
988 // Copies a fixed number of fields of heap objects from src to dst.
989 void CopyFields(Register dst, Register src, RegList temps, int field_count);
991 // Copies a number of bytes from src to dst. All registers are clobbered. On
992 // exit src and dst will point to the place just after where the last byte was
993 // read or written and length will be zero.
994 void CopyBytes(Register src,
999 // Initialize fields with filler values. Fields starting at |start_offset|
1000 // not including end_offset are overwritten with the value in |filler|. At
1001 // the end the loop, |start_offset| takes the value of |end_offset|.
1002 void InitializeFieldsWithFiller(Register start_offset,
1003 Register end_offset,
1006 // -------------------------------------------------------------------------
1007 // Support functions.
1009 // Try to get function prototype of a function and puts the value in
1010 // the result register. Checks that the function really is a
1011 // function and jumps to the miss label if the fast checks fail. The
1012 // function register will be untouched; the other registers may be
1014 void TryGetFunctionPrototype(Register function,
1018 bool miss_on_bound_function = false);
1020 void GetObjectType(Register function,
1024 // Check if a map for a JSObject indicates that the object has fast elements.
1025 // Jump to the specified label if it does not.
1026 void CheckFastElements(Register map,
1030 // Check if a map for a JSObject indicates that the object can have both smi
1031 // and HeapObject elements. Jump to the specified label if it does not.
1032 void CheckFastObjectElements(Register map,
1036 // Check if a map for a JSObject indicates that the object has fast smi only
1037 // elements. Jump to the specified label if it does not.
1038 void CheckFastSmiElements(Register map,
1042 // Check to see if maybe_number can be stored as a double in
1043 // FastDoubleElements. If it can, store it at the index specified by key in
1044 // the FastDoubleElements array elements. Otherwise jump to fail.
1045 void StoreNumberToDoubleElements(Register value_reg,
1047 Register elements_reg,
1052 int elements_offset = 0);
1054 // Compare an object's map with the specified map and its transitioned
1055 // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Jumps to
1056 // "branch_to" if the result of the comparison is "cond". If multiple map
1057 // compares are required, the compare sequences branches to early_success.
1058 void CompareMapAndBranch(Register obj,
1061 Label* early_success,
1065 // As above, but the map of the object is already loaded into the register
1066 // which is preserved by the code generated.
1067 void CompareMapAndBranch(Register obj_map,
1069 Label* early_success,
1073 // Check if the map of an object is equal to a specified map and branch to
1074 // label if not. Skip the smi check if not required (object is known to be a
1075 // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
1076 // against maps that are ElementsKind transition maps of the specificed map.
1077 void CheckMap(Register obj,
1081 SmiCheckType smi_check_type);
1084 void CheckMap(Register obj,
1086 Heap::RootListIndex index,
1088 SmiCheckType smi_check_type);
1090 // Check if the map of an object is equal to a specified map and branch to a
1091 // specified target if equal. Skip the smi check if not required (object is
1092 // known to be a heap object)
1093 void DispatchMap(Register obj,
1096 Handle<Code> success,
1097 SmiCheckType smi_check_type);
1099 // Generates code for reporting that an illegal operation has
1101 void IllegalOperation(int num_arguments);
1104 // Load and check the instance type of an object for being a string.
1105 // Loads the type into the second argument register.
1106 // Returns a condition that will be enabled if the object was a string.
1107 Condition IsObjectStringType(Register obj,
1110 lw(type, FieldMemOperand(obj, HeapObject::kMapOffset));
1111 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset));
1112 And(type, type, Operand(kIsNotStringMask));
1113 ASSERT_EQ(0, kStringTag);
1118 // Picks out an array index from the hash field.
1120 // hash - holds the index's hash. Clobbered.
1121 // index - holds the overwritten index on exit.
1122 void IndexFromHash(Register hash, Register index);
1124 // Get the number of least significant bits from a register.
1125 void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
1126 void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
1128 // Load the value of a number object into a FPU double register. If the
1129 // object is not a number a jump to the label not_number is performed
1130 // and the FPU double register is unchanged.
1131 void ObjectToDoubleFPURegister(
1136 Register heap_number_map,
1138 ObjectToDoubleFlags flags = NO_OBJECT_TO_DOUBLE_FLAGS);
1140 // Load the value of a smi object into a FPU double register. The register
1141 // scratch1 can be the same register as smi in which case smi will hold the
1142 // untagged value afterwards.
1143 void SmiToDoubleFPURegister(Register smi,
1147 // -------------------------------------------------------------------------
1148 // Overflow handling functions.
1149 // Usage: first call the appropriate arithmetic function, then call one of the
1150 // jump functions with the overflow_dst register as the second parameter.
1152 void AdduAndCheckForOverflow(Register dst,
1155 Register overflow_dst,
1156 Register scratch = at);
1158 void SubuAndCheckForOverflow(Register dst,
1161 Register overflow_dst,
1162 Register scratch = at);
1164 void BranchOnOverflow(Label* label,
1165 Register overflow_check,
1166 BranchDelaySlot bd = PROTECT) {
1167 Branch(label, lt, overflow_check, Operand(zero_reg), bd);
1170 void BranchOnNoOverflow(Label* label,
1171 Register overflow_check,
1172 BranchDelaySlot bd = PROTECT) {
1173 Branch(label, ge, overflow_check, Operand(zero_reg), bd);
1176 void RetOnOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1177 Ret(lt, overflow_check, Operand(zero_reg), bd);
1180 void RetOnNoOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1181 Ret(ge, overflow_check, Operand(zero_reg), bd);
1184 // -------------------------------------------------------------------------
1187 // See comments at the beginning of CEntryStub::Generate.
1188 inline void PrepareCEntryArgs(int num_args) {
1190 li(s1, (num_args - 1) * kPointerSize);
1193 inline void PrepareCEntryFunction(const ExternalReference& ref) {
1194 li(s2, Operand(ref));
1197 // Call a code stub.
1198 void CallStub(CodeStub* stub,
1199 TypeFeedbackId ast_id = TypeFeedbackId::None(),
1200 Condition cond = cc_always,
1201 Register r1 = zero_reg,
1202 const Operand& r2 = Operand(zero_reg),
1203 BranchDelaySlot bd = PROTECT);
1205 // Tail call a code stub (jump).
1206 void TailCallStub(CodeStub* stub);
1208 void CallJSExitStub(CodeStub* stub);
1210 // Call a runtime routine.
1211 void CallRuntime(const Runtime::Function* f,
1213 SaveFPRegsMode save_doubles = kDontSaveFPRegs);
1214 void CallRuntimeSaveDoubles(Runtime::FunctionId id) {
1215 const Runtime::Function* function = Runtime::FunctionForId(id);
1216 CallRuntime(function, function->nargs, kSaveFPRegs);
1219 // Convenience function: Same as above, but takes the fid instead.
1220 void CallRuntime(Runtime::FunctionId id,
1222 SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
1223 CallRuntime(Runtime::FunctionForId(id), num_arguments, save_doubles);
1226 // Convenience function: call an external reference.
1227 void CallExternalReference(const ExternalReference& ext,
1229 BranchDelaySlot bd = PROTECT);
1231 // Tail call of a runtime routine (jump).
1232 // Like JumpToExternalReference, but also takes care of passing the number
1234 void TailCallExternalReference(const ExternalReference& ext,
1238 // Convenience function: tail call a runtime routine (jump).
1239 void TailCallRuntime(Runtime::FunctionId fid,
1243 int CalculateStackPassedWords(int num_reg_arguments,
1244 int num_double_arguments);
1246 // Before calling a C-function from generated code, align arguments on stack
1247 // and add space for the four mips argument slots.
1248 // After aligning the frame, non-register arguments must be stored on the
1249 // stack, after the argument-slots using helper: CFunctionArgumentOperand().
1250 // The argument count assumes all arguments are word sized.
1251 // Some compilers/platforms require the stack to be aligned when calling
1253 // Needs a scratch register to do some arithmetic. This register will be
1255 void PrepareCallCFunction(int num_reg_arguments,
1256 int num_double_registers,
1258 void PrepareCallCFunction(int num_reg_arguments,
1261 // Arguments 1-4 are placed in registers a0 thru a3 respectively.
1262 // Arguments 5..n are stored to stack using following:
1263 // sw(t0, CFunctionArgumentOperand(5));
1265 // Calls a C function and cleans up the space for arguments allocated
1266 // by PrepareCallCFunction. The called function is not allowed to trigger a
1267 // garbage collection, since that might move the code and invalidate the
1268 // return address (unless this is somehow accounted for by the called
1270 void CallCFunction(ExternalReference function, int num_arguments);
1271 void CallCFunction(Register function, int num_arguments);
1272 void CallCFunction(ExternalReference function,
1273 int num_reg_arguments,
1274 int num_double_arguments);
1275 void CallCFunction(Register function,
1276 int num_reg_arguments,
1277 int num_double_arguments);
1278 void GetCFunctionDoubleResult(const DoubleRegister dst);
1280 // There are two ways of passing double arguments on MIPS, depending on
1281 // whether soft or hard floating point ABI is used. These functions
1282 // abstract parameter passing for the three different ways we call
1283 // C functions from generated code.
1284 void SetCallCDoubleArguments(DoubleRegister dreg);
1285 void SetCallCDoubleArguments(DoubleRegister dreg1, DoubleRegister dreg2);
1286 void SetCallCDoubleArguments(DoubleRegister dreg, Register reg);
1288 // Calls an API function. Allocates HandleScope, extracts returned value
1289 // from handle and propagates exceptions. Restores context. stack_space
1290 // - space to be unwound on exit (includes the call JS arguments space and
1291 // the additional space allocated for the fast call).
1292 void CallApiFunctionAndReturn(ExternalReference function,
1293 Address function_address,
1294 ExternalReference thunk_ref,
1295 Register thunk_last_arg,
1297 MemOperand return_value_operand,
1298 MemOperand* context_restore_operand);
1300 // Jump to the builtin routine.
1301 void JumpToExternalReference(const ExternalReference& builtin,
1302 BranchDelaySlot bd = PROTECT);
1304 // Invoke specified builtin JavaScript function. Adds an entry to
1305 // the unresolved list if the name does not resolve.
1306 void InvokeBuiltin(Builtins::JavaScript id,
1308 const CallWrapper& call_wrapper = NullCallWrapper());
1310 // Store the code object for the given builtin in the target register and
1311 // setup the function in a1.
1312 void GetBuiltinEntry(Register target, Builtins::JavaScript id);
1314 // Store the function for the given builtin in the target register.
1315 void GetBuiltinFunction(Register target, Builtins::JavaScript id);
1319 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders.
1323 Handle<Object> CodeObject() {
1324 ASSERT(!code_object_.is_null());
1325 return code_object_;
1328 // -------------------------------------------------------------------------
1329 // StatsCounter support.
1331 void SetCounter(StatsCounter* counter, int value,
1332 Register scratch1, Register scratch2);
1333 void IncrementCounter(StatsCounter* counter, int value,
1334 Register scratch1, Register scratch2);
1335 void DecrementCounter(StatsCounter* counter, int value,
1336 Register scratch1, Register scratch2);
1339 // -------------------------------------------------------------------------
1342 // Calls Abort(msg) if the condition cc is not satisfied.
1343 // Use --debug_code to enable.
1344 void Assert(Condition cc, BailoutReason reason, Register rs, Operand rt);
1345 void AssertFastElements(Register elements);
1347 // Like Assert(), but always enabled.
1348 void Check(Condition cc, BailoutReason reason, Register rs, Operand rt);
1350 // Print a message to stdout and abort execution.
1351 void Abort(BailoutReason msg);
1353 // Verify restrictions about code generated in stubs.
1354 void set_generating_stub(bool value) { generating_stub_ = value; }
1355 bool generating_stub() { return generating_stub_; }
1356 void set_has_frame(bool value) { has_frame_ = value; }
1357 bool has_frame() { return has_frame_; }
1358 inline bool AllowThisStubCall(CodeStub* stub);
1360 // ---------------------------------------------------------------------------
1361 // Number utilities.
1363 // Check whether the value of reg is a power of two and not zero. If not
1364 // control continues at the label not_power_of_two. If reg is a power of two
1365 // the register scratch contains the value of (reg - 1) when control falls
1367 void JumpIfNotPowerOfTwoOrZero(Register reg,
1369 Label* not_power_of_two_or_zero);
1371 // -------------------------------------------------------------------------
1374 void SmiTag(Register reg) {
1375 Addu(reg, reg, reg);
1378 // Test for overflow < 0: use BranchOnOverflow() or BranchOnNoOverflow().
1379 void SmiTagCheckOverflow(Register reg, Register overflow);
1380 void SmiTagCheckOverflow(Register dst, Register src, Register overflow);
1382 void SmiTag(Register dst, Register src) {
1383 Addu(dst, src, src);
1386 // Try to convert int32 to smi. If the value is to large, preserve
1387 // the original value and jump to not_a_smi. Destroys scratch and
1389 void TrySmiTag(Register reg, Register scratch, Label* not_a_smi) {
1390 TrySmiTag(reg, reg, scratch, not_a_smi);
1392 void TrySmiTag(Register dst,
1396 SmiTagCheckOverflow(at, src, scratch);
1397 BranchOnOverflow(not_a_smi, scratch);
1401 void SmiUntag(Register reg) {
1402 sra(reg, reg, kSmiTagSize);
1405 void SmiUntag(Register dst, Register src) {
1406 sra(dst, src, kSmiTagSize);
1409 // Test if the register contains a smi.
1410 inline void SmiTst(Register value, Register scratch) {
1411 And(scratch, value, Operand(kSmiTagMask));
1413 inline void NonNegativeSmiTst(Register value, Register scratch) {
1414 And(scratch, value, Operand(kSmiTagMask | kSmiSignMask));
1417 // Untag the source value into destination and jump if source is a smi.
1418 // Souce and destination can be the same register.
1419 void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
1421 // Untag the source value into destination and jump if source is not a smi.
1422 // Souce and destination can be the same register.
1423 void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
1425 // Jump the register contains a smi.
1426 void JumpIfSmi(Register value,
1428 Register scratch = at,
1429 BranchDelaySlot bd = PROTECT);
1431 // Jump if the register contains a non-smi.
1432 void JumpIfNotSmi(Register value,
1433 Label* not_smi_label,
1434 Register scratch = at,
1435 BranchDelaySlot bd = PROTECT);
1437 // Jump if either of the registers contain a non-smi.
1438 void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
1439 // Jump if either of the registers contain a smi.
1440 void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
1442 // Abort execution if argument is a smi, enabled via --debug-code.
1443 void AssertNotSmi(Register object);
1444 void AssertSmi(Register object);
1446 // Abort execution if argument is not a string, enabled via --debug-code.
1447 void AssertString(Register object);
1449 // Abort execution if argument is not a name, enabled via --debug-code.
1450 void AssertName(Register object);
1452 // Abort execution if reg is not the root value with the given index,
1453 // enabled via --debug-code.
1454 void AssertIsRoot(Register reg, Heap::RootListIndex index);
1456 // ---------------------------------------------------------------------------
1457 // HeapNumber utilities.
1459 void JumpIfNotHeapNumber(Register object,
1460 Register heap_number_map,
1462 Label* on_not_heap_number);
1464 // -------------------------------------------------------------------------
1465 // String utilities.
1467 // Generate code to do a lookup in the number string cache. If the number in
1468 // the register object is found in the cache the generated code falls through
1469 // with the result in the result register. The object and the result register
1470 // can be the same. If the number is not found in the cache the code jumps to
1471 // the label not_found with only the content of register object unchanged.
1472 void LookupNumberStringCache(Register object,
1479 // Checks if both instance types are sequential ASCII strings and jumps to
1480 // label if either is not.
1481 void JumpIfBothInstanceTypesAreNotSequentialAscii(
1482 Register first_object_instance_type,
1483 Register second_object_instance_type,
1488 // Check if instance type is sequential ASCII string and jump to label if
1490 void JumpIfInstanceTypeIsNotSequentialAscii(Register type,
1494 void JumpIfNotUniqueName(Register reg, Label* not_unique_name);
1496 void EmitSeqStringSetCharCheck(Register string,
1500 uint32_t encoding_mask);
1502 // Test that both first and second are sequential ASCII strings.
1503 // Assume that they are non-smis.
1504 void JumpIfNonSmisNotBothSequentialAsciiStrings(Register first,
1510 // Test that both first and second are sequential ASCII strings.
1511 // Check that they are non-smis.
1512 void JumpIfNotBothSequentialAsciiStrings(Register first,
1518 void ClampUint8(Register output_reg, Register input_reg);
1520 void ClampDoubleToUint8(Register result_reg,
1521 DoubleRegister input_reg,
1522 DoubleRegister temp_double_reg);
1525 void LoadInstanceDescriptors(Register map, Register descriptors);
1526 void EnumLength(Register dst, Register map);
1527 void NumberOfOwnDescriptors(Register dst, Register map);
1529 template<typename Field>
1530 void DecodeField(Register reg) {
1531 static const int shift = Field::kShift;
1532 static const int mask = (Field::kMask >> shift) << kSmiTagSize;
1533 srl(reg, reg, shift);
1534 And(reg, reg, Operand(mask));
1537 // Generates function and stub prologue code.
1538 void Prologue(PrologueFrameMode frame_mode);
1540 // Activation support.
1541 void EnterFrame(StackFrame::Type type);
1542 void LeaveFrame(StackFrame::Type type);
1544 // Patch the relocated value (lui/ori pair).
1545 void PatchRelocatedValue(Register li_location,
1547 Register new_value);
1548 // Get the relocatad value (loaded data) from the lui/ori pair.
1549 void GetRelocatedValue(Register li_location,
1553 // Expects object in a0 and returns map with validated enum cache
1554 // in a0. Assumes that any other register can be used as a scratch.
1555 void CheckEnumCache(Register null_value, Label* call_runtime);
1557 // AllocationMemento support. Arrays may have an associated
1558 // AllocationMemento object that can be checked for in order to pretransition
1560 // On entry, receiver_reg should point to the array object.
1561 // scratch_reg gets clobbered.
1562 // If allocation info is present, jump to allocation_memento_present.
1563 void TestJSArrayForAllocationMemento(
1564 Register receiver_reg,
1565 Register scratch_reg,
1566 Label* no_memento_found,
1567 Condition cond = al,
1568 Label* allocation_memento_present = NULL);
1570 void JumpIfJSArrayHasAllocationMemento(Register receiver_reg,
1571 Register scratch_reg,
1572 Label* memento_found) {
1573 Label no_memento_found;
1574 TestJSArrayForAllocationMemento(receiver_reg, scratch_reg,
1575 &no_memento_found, eq, memento_found);
1576 bind(&no_memento_found);
1579 // Jumps to found label if a prototype map has dictionary elements.
1580 void JumpIfDictionaryInPrototypeChain(Register object, Register scratch0,
1581 Register scratch1, Label* found);
1584 void CallCFunctionHelper(Register function,
1585 int num_reg_arguments,
1586 int num_double_arguments);
1588 void BranchShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1589 void BranchShort(int16_t offset, Condition cond, Register rs,
1591 BranchDelaySlot bdslot = PROTECT);
1592 void BranchShort(Label* L, BranchDelaySlot bdslot = PROTECT);
1593 void BranchShort(Label* L, Condition cond, Register rs,
1595 BranchDelaySlot bdslot = PROTECT);
1596 void BranchAndLinkShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1597 void BranchAndLinkShort(int16_t offset, Condition cond, Register rs,
1599 BranchDelaySlot bdslot = PROTECT);
1600 void BranchAndLinkShort(Label* L, BranchDelaySlot bdslot = PROTECT);
1601 void BranchAndLinkShort(Label* L, Condition cond, Register rs,
1603 BranchDelaySlot bdslot = PROTECT);
1604 void J(Label* L, BranchDelaySlot bdslot);
1605 void Jr(Label* L, BranchDelaySlot bdslot);
1606 void Jalr(Label* L, BranchDelaySlot bdslot);
1608 // Helper functions for generating invokes.
1609 void InvokePrologue(const ParameterCount& expected,
1610 const ParameterCount& actual,
1611 Handle<Code> code_constant,
1614 bool* definitely_mismatches,
1616 const CallWrapper& call_wrapper,
1617 CallKind call_kind);
1619 // Get the code for the given builtin. Returns if able to resolve
1620 // the function in the 'resolved' flag.
1621 Handle<Code> ResolveBuiltin(Builtins::JavaScript id, bool* resolved);
1623 void InitializeNewString(Register string,
1625 Heap::RootListIndex map_index,
1629 // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
1630 void InNewSpace(Register object,
1632 Condition cond, // eq for new space, ne otherwise.
1635 // Helper for finding the mark bits for an address. Afterwards, the
1636 // bitmap register points at the word with the mark bits and the mask
1637 // the position of the first bit. Leaves addr_reg unchanged.
1638 inline void GetMarkBits(Register addr_reg,
1639 Register bitmap_reg,
1642 // Helper for throwing exceptions. Compute a handler address and jump to
1643 // it. See the implementation for register usage.
1644 void JumpToHandlerEntry();
1646 // Compute memory operands for safepoint stack slots.
1647 static int SafepointRegisterStackIndex(int reg_code);
1648 MemOperand SafepointRegisterSlot(Register reg);
1649 MemOperand SafepointRegistersAndDoublesSlot(Register reg);
1651 bool generating_stub_;
1653 // This handle will be patched with the code object on installation.
1654 Handle<Object> code_object_;
1656 // Needs access to SafepointRegisterStackIndex for compiled frame
1658 friend class StandardFrame;
1662 // The code patcher is used to patch (typically) small parts of code e.g. for
1663 // debugging and other types of instrumentation. When using the code patcher
1664 // the exact number of bytes specified must be emitted. It is not legal to emit
1665 // relocation information. If any of these constraints are violated it causes
1666 // an assertion to fail.
1669 CodePatcher(byte* address, int instructions);
1670 virtual ~CodePatcher();
1672 // Macro assembler to emit code.
1673 MacroAssembler* masm() { return &masm_; }
1675 // Emit an instruction directly.
1676 void Emit(Instr instr);
1678 // Emit an address directly.
1679 void Emit(Address addr);
1681 // Change the condition part of an instruction leaving the rest of the current
1682 // instruction unchanged.
1683 void ChangeBranchCondition(Condition cond);
1686 byte* address_; // The address of the code being patched.
1687 int size_; // Number of bytes of the expected patch size.
1688 MacroAssembler masm_; // Macro assembler used to generate the code.
1693 #ifdef GENERATED_CODE_COVERAGE
1694 #define CODE_COVERAGE_STRINGIFY(x) #x
1695 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1696 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1697 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1699 #define ACCESS_MASM(masm) masm->
1702 } } // namespace v8::internal
1704 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_