2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
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7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
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13 * The above copyright notice and this permission notice (including the next
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23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "ir_uniform.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
46 #include "main/mtypes.h"
47 #include "main/shaderobj.h"
48 #include "program/hash_table.h"
51 #include "main/shaderapi.h"
52 #include "main/uniforms.h"
53 #include "program/prog_instruction.h"
54 #include "program/prog_optimize.h"
55 #include "program/prog_print.h"
56 #include "program/program.h"
57 #include "program/prog_parameter.h"
58 #include "program/sampler.h"
64 static int swizzle_for_size(int size);
67 * This struct is a corresponding struct to Mesa prog_src_register, with
72 src_reg(gl_register_file file, int index, const glsl_type *type)
76 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
77 this->swizzle = swizzle_for_size(type->vector_elements);
79 this->swizzle = SWIZZLE_XYZW;
86 this->file = PROGRAM_UNDEFINED;
93 explicit src_reg(dst_reg reg);
95 gl_register_file file; /**< PROGRAM_* from Mesa */
96 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
97 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
98 int negate; /**< NEGATE_XYZW mask from mesa */
99 /** Register index should be offset by the integer in this reg. */
105 dst_reg(gl_register_file file, int writemask)
109 this->writemask = writemask;
110 this->cond_mask = COND_TR;
111 this->reladdr = NULL;
116 this->file = PROGRAM_UNDEFINED;
119 this->cond_mask = COND_TR;
120 this->reladdr = NULL;
123 explicit dst_reg(src_reg reg);
125 gl_register_file file; /**< PROGRAM_* from Mesa */
126 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
127 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
129 /** Register index should be offset by the integer in this reg. */
133 src_reg::src_reg(dst_reg reg)
135 this->file = reg.file;
136 this->index = reg.index;
137 this->swizzle = SWIZZLE_XYZW;
139 this->reladdr = reg.reladdr;
142 dst_reg::dst_reg(src_reg reg)
144 this->file = reg.file;
145 this->index = reg.index;
146 this->writemask = WRITEMASK_XYZW;
147 this->cond_mask = COND_TR;
148 this->reladdr = reg.reladdr;
151 class ir_to_mesa_instruction : public exec_node {
153 /* Callers of this ralloc-based new need not call delete. It's
154 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
155 static void* operator new(size_t size, void *ctx)
159 node = rzalloc_size(ctx, size);
160 assert(node != NULL);
168 /** Pointer to the ir source this tree came from for debugging */
170 GLboolean cond_update;
172 int sampler; /**< sampler index */
173 int tex_target; /**< One of TEXTURE_*_INDEX */
174 GLboolean tex_shadow;
177 class variable_storage : public exec_node {
179 variable_storage(ir_variable *var, gl_register_file file, int index)
180 : file(file), index(index), var(var)
185 gl_register_file file;
187 ir_variable *var; /* variable that maps to this, if any */
190 class function_entry : public exec_node {
192 ir_function_signature *sig;
195 * identifier of this function signature used by the program.
197 * At the point that Mesa instructions for function calls are
198 * generated, we don't know the address of the first instruction of
199 * the function body. So we make the BranchTarget that is called a
200 * small integer and rewrite them during set_branchtargets().
205 * Pointer to first instruction of the function body.
207 * Set during function body emits after main() is processed.
209 ir_to_mesa_instruction *bgn_inst;
212 * Index of the first instruction of the function body in actual
215 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
219 /** Storage for the return value. */
223 class ir_to_mesa_visitor : public ir_visitor {
225 ir_to_mesa_visitor();
226 ~ir_to_mesa_visitor();
228 function_entry *current_function;
230 struct gl_context *ctx;
231 struct gl_program *prog;
232 struct gl_shader_program *shader_program;
233 struct gl_shader_compiler_options *options;
237 variable_storage *find_variable_storage(ir_variable *var);
239 src_reg get_temp(const glsl_type *type);
240 void reladdr_to_temp(ir_instruction *ir, src_reg *reg, int *num_reladdr);
242 src_reg src_reg_for_float(float val);
245 * \name Visit methods
247 * As typical for the visitor pattern, there must be one \c visit method for
248 * each concrete subclass of \c ir_instruction. Virtual base classes within
249 * the hierarchy should not have \c visit methods.
252 virtual void visit(ir_variable *);
253 virtual void visit(ir_loop *);
254 virtual void visit(ir_loop_jump *);
255 virtual void visit(ir_function_signature *);
256 virtual void visit(ir_function *);
257 virtual void visit(ir_expression *);
258 virtual void visit(ir_swizzle *);
259 virtual void visit(ir_dereference_variable *);
260 virtual void visit(ir_dereference_array *);
261 virtual void visit(ir_dereference_record *);
262 virtual void visit(ir_assignment *);
263 virtual void visit(ir_constant *);
264 virtual void visit(ir_call *);
265 virtual void visit(ir_return *);
266 virtual void visit(ir_discard *);
267 virtual void visit(ir_texture *);
268 virtual void visit(ir_if *);
273 /** List of variable_storage */
276 /** List of function_entry */
277 exec_list function_signatures;
278 int next_signature_id;
280 /** List of ir_to_mesa_instruction */
281 exec_list instructions;
283 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op);
285 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
286 dst_reg dst, src_reg src0);
288 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
289 dst_reg dst, src_reg src0, src_reg src1);
291 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
293 src_reg src0, src_reg src1, src_reg src2);
296 * Emit the correct dot-product instruction for the type of arguments
298 ir_to_mesa_instruction * emit_dp(ir_instruction *ir,
304 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
305 dst_reg dst, src_reg src0);
307 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
308 dst_reg dst, src_reg src0, src_reg src1);
310 void emit_scs(ir_instruction *ir, enum prog_opcode op,
311 dst_reg dst, const src_reg &src);
313 bool try_emit_mad(ir_expression *ir,
315 bool try_emit_mad_for_and_not(ir_expression *ir,
317 bool try_emit_sat(ir_expression *ir);
319 void emit_swz(ir_expression *ir);
321 bool process_move_condition(ir_rvalue *ir);
323 void copy_propagate(void);
328 src_reg undef_src = src_reg(PROGRAM_UNDEFINED, 0, NULL);
330 dst_reg undef_dst = dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP);
332 dst_reg address_reg = dst_reg(PROGRAM_ADDRESS, WRITEMASK_X);
335 swizzle_for_size(int size)
337 int size_swizzles[4] = {
338 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
339 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
340 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
341 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
344 assert((size >= 1) && (size <= 4));
345 return size_swizzles[size - 1];
348 ir_to_mesa_instruction *
349 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
351 src_reg src0, src_reg src1, src_reg src2)
353 ir_to_mesa_instruction *inst = new(mem_ctx) ir_to_mesa_instruction();
356 /* If we have to do relative addressing, we want to load the ARL
357 * reg directly for one of the regs, and preload the other reladdr
358 * sources into temps.
360 num_reladdr += dst.reladdr != NULL;
361 num_reladdr += src0.reladdr != NULL;
362 num_reladdr += src1.reladdr != NULL;
363 num_reladdr += src2.reladdr != NULL;
365 reladdr_to_temp(ir, &src2, &num_reladdr);
366 reladdr_to_temp(ir, &src1, &num_reladdr);
367 reladdr_to_temp(ir, &src0, &num_reladdr);
370 emit(ir, OPCODE_ARL, address_reg, *dst.reladdr);
373 assert(num_reladdr == 0);
382 this->instructions.push_tail(inst);
388 ir_to_mesa_instruction *
389 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
390 dst_reg dst, src_reg src0, src_reg src1)
392 return emit(ir, op, dst, src0, src1, undef_src);
395 ir_to_mesa_instruction *
396 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
397 dst_reg dst, src_reg src0)
399 assert(dst.writemask != 0);
400 return emit(ir, op, dst, src0, undef_src, undef_src);
403 ir_to_mesa_instruction *
404 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op)
406 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
409 ir_to_mesa_instruction *
410 ir_to_mesa_visitor::emit_dp(ir_instruction *ir,
411 dst_reg dst, src_reg src0, src_reg src1,
414 static const gl_inst_opcode dot_opcodes[] = {
415 OPCODE_DP2, OPCODE_DP3, OPCODE_DP4
418 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
422 * Emits Mesa scalar opcodes to produce unique answers across channels.
424 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
425 * channel determines the result across all channels. So to do a vec4
426 * of this operation, we want to emit a scalar per source channel used
427 * to produce dest channels.
430 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
432 src_reg orig_src0, src_reg orig_src1)
435 int done_mask = ~dst.writemask;
437 /* Mesa RCP is a scalar operation splatting results to all channels,
438 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
441 for (i = 0; i < 4; i++) {
442 GLuint this_mask = (1 << i);
443 ir_to_mesa_instruction *inst;
444 src_reg src0 = orig_src0;
445 src_reg src1 = orig_src1;
447 if (done_mask & this_mask)
450 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
451 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
452 for (j = i + 1; j < 4; j++) {
453 /* If there is another enabled component in the destination that is
454 * derived from the same inputs, generate its value on this pass as
457 if (!(done_mask & (1 << j)) &&
458 GET_SWZ(src0.swizzle, j) == src0_swiz &&
459 GET_SWZ(src1.swizzle, j) == src1_swiz) {
460 this_mask |= (1 << j);
463 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
464 src0_swiz, src0_swiz);
465 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
466 src1_swiz, src1_swiz);
468 inst = emit(ir, op, dst, src0, src1);
469 inst->dst.writemask = this_mask;
470 done_mask |= this_mask;
475 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
476 dst_reg dst, src_reg src0)
478 src_reg undef = undef_src;
480 undef.swizzle = SWIZZLE_XXXX;
482 emit_scalar(ir, op, dst, src0, undef);
486 * Emit an OPCODE_SCS instruction
488 * The \c SCS opcode functions a bit differently than the other Mesa (or
489 * ARB_fragment_program) opcodes. Instead of splatting its result across all
490 * four components of the destination, it writes one value to the \c x
491 * component and another value to the \c y component.
493 * \param ir IR instruction being processed
494 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
496 * \param dst Destination register
497 * \param src Source register
500 ir_to_mesa_visitor::emit_scs(ir_instruction *ir, enum prog_opcode op,
504 /* Vertex programs cannot use the SCS opcode.
506 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
507 emit_scalar(ir, op, dst, src);
511 const unsigned component = (op == OPCODE_SIN) ? 0 : 1;
512 const unsigned scs_mask = (1U << component);
513 int done_mask = ~dst.writemask;
516 assert(op == OPCODE_SIN || op == OPCODE_COS);
518 /* If there are compnents in the destination that differ from the component
519 * that will be written by the SCS instrution, we'll need a temporary.
521 if (scs_mask != unsigned(dst.writemask)) {
522 tmp = get_temp(glsl_type::vec4_type);
525 for (unsigned i = 0; i < 4; i++) {
526 unsigned this_mask = (1U << i);
529 if ((done_mask & this_mask) != 0)
532 /* The source swizzle specified which component of the source generates
533 * sine / cosine for the current component in the destination. The SCS
534 * instruction requires that this value be swizzle to the X component.
535 * Replace the current swizzle with a swizzle that puts the source in
538 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
540 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
541 src0_swiz, src0_swiz);
542 for (unsigned j = i + 1; j < 4; j++) {
543 /* If there is another enabled component in the destination that is
544 * derived from the same inputs, generate its value on this pass as
547 if (!(done_mask & (1 << j)) &&
548 GET_SWZ(src0.swizzle, j) == src0_swiz) {
549 this_mask |= (1 << j);
553 if (this_mask != scs_mask) {
554 ir_to_mesa_instruction *inst;
555 dst_reg tmp_dst = dst_reg(tmp);
557 /* Emit the SCS instruction.
559 inst = emit(ir, OPCODE_SCS, tmp_dst, src0);
560 inst->dst.writemask = scs_mask;
562 /* Move the result of the SCS instruction to the desired location in
565 tmp.swizzle = MAKE_SWIZZLE4(component, component,
566 component, component);
567 inst = emit(ir, OPCODE_SCS, dst, tmp);
568 inst->dst.writemask = this_mask;
570 /* Emit the SCS instruction to write directly to the destination.
572 ir_to_mesa_instruction *inst = emit(ir, OPCODE_SCS, dst, src0);
573 inst->dst.writemask = scs_mask;
576 done_mask |= this_mask;
581 ir_to_mesa_visitor::src_reg_for_float(float val)
583 src_reg src(PROGRAM_CONSTANT, -1, NULL);
585 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
586 (const gl_constant_value *)&val, 1, &src.swizzle);
592 type_size(const struct glsl_type *type)
597 switch (type->base_type) {
600 case GLSL_TYPE_FLOAT:
602 if (type->is_matrix()) {
603 return type->matrix_columns;
605 /* Regardless of size of vector, it gets a vec4. This is bad
606 * packing for things like floats, but otherwise arrays become a
607 * mess. Hopefully a later pass over the code can pack scalars
608 * down if appropriate.
612 case GLSL_TYPE_ARRAY:
613 assert(type->length > 0);
614 return type_size(type->fields.array) * type->length;
615 case GLSL_TYPE_STRUCT:
617 for (i = 0; i < type->length; i++) {
618 size += type_size(type->fields.structure[i].type);
621 case GLSL_TYPE_SAMPLER:
622 /* Samplers take up one slot in UNIFORMS[], but they're baked in
633 * In the initial pass of codegen, we assign temporary numbers to
634 * intermediate results. (not SSA -- variable assignments will reuse
635 * storage). Actual register allocation for the Mesa VM occurs in a
636 * pass over the Mesa IR later.
639 ir_to_mesa_visitor::get_temp(const glsl_type *type)
643 src.file = PROGRAM_TEMPORARY;
644 src.index = next_temp;
646 next_temp += type_size(type);
648 if (type->is_array() || type->is_record()) {
649 src.swizzle = SWIZZLE_NOOP;
651 src.swizzle = swizzle_for_size(type->vector_elements);
659 ir_to_mesa_visitor::find_variable_storage(ir_variable *var)
662 variable_storage *entry;
664 foreach_iter(exec_list_iterator, iter, this->variables) {
665 entry = (variable_storage *)iter.get();
667 if (entry->var == var)
675 ir_to_mesa_visitor::visit(ir_variable *ir)
677 if (strcmp(ir->name, "gl_FragCoord") == 0) {
678 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
680 fp->OriginUpperLeft = ir->origin_upper_left;
681 fp->PixelCenterInteger = ir->pixel_center_integer;
684 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
686 const ir_state_slot *const slots = ir->state_slots;
687 assert(ir->state_slots != NULL);
689 /* Check if this statevar's setup in the STATE file exactly
690 * matches how we'll want to reference it as a
691 * struct/array/whatever. If not, then we need to move it into
692 * temporary storage and hope that it'll get copy-propagated
695 for (i = 0; i < ir->num_state_slots; i++) {
696 if (slots[i].swizzle != SWIZZLE_XYZW) {
701 variable_storage *storage;
703 if (i == ir->num_state_slots) {
704 /* We'll set the index later. */
705 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
706 this->variables.push_tail(storage);
710 /* The variable_storage constructor allocates slots based on the size
711 * of the type. However, this had better match the number of state
712 * elements that we're going to copy into the new temporary.
714 assert((int) ir->num_state_slots == type_size(ir->type));
716 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
718 this->variables.push_tail(storage);
719 this->next_temp += type_size(ir->type);
721 dst = dst_reg(src_reg(PROGRAM_TEMPORARY, storage->index, NULL));
725 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
726 int index = _mesa_add_state_reference(this->prog->Parameters,
727 (gl_state_index *)slots[i].tokens);
729 if (storage->file == PROGRAM_STATE_VAR) {
730 if (storage->index == -1) {
731 storage->index = index;
733 assert(index == storage->index + (int)i);
736 src_reg src(PROGRAM_STATE_VAR, index, NULL);
737 src.swizzle = slots[i].swizzle;
738 emit(ir, OPCODE_MOV, dst, src);
739 /* even a float takes up a whole vec4 reg in a struct/array. */
744 if (storage->file == PROGRAM_TEMPORARY &&
745 dst.index != storage->index + (int) ir->num_state_slots) {
746 linker_error(this->shader_program,
747 "failed to load builtin uniform `%s' "
748 "(%d/%d regs loaded)\n",
749 ir->name, dst.index - storage->index,
750 type_size(ir->type));
756 ir_to_mesa_visitor::visit(ir_loop *ir)
758 ir_dereference_variable *counter = NULL;
760 if (ir->counter != NULL)
761 counter = new(mem_ctx) ir_dereference_variable(ir->counter);
763 if (ir->from != NULL) {
764 assert(ir->counter != NULL);
767 new(mem_ctx) ir_assignment(counter, ir->from, NULL);
772 emit(NULL, OPCODE_BGNLOOP);
776 new(mem_ctx) ir_expression(ir->cmp, glsl_type::bool_type,
778 ir_if *if_stmt = new(mem_ctx) ir_if(e);
781 new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break);
783 if_stmt->then_instructions.push_tail(brk);
785 if_stmt->accept(this);
788 visit_exec_list(&ir->body_instructions, this);
792 new(mem_ctx) ir_expression(ir_binop_add, counter->type,
793 counter, ir->increment);
796 new(mem_ctx) ir_assignment(counter, e, NULL);
801 emit(NULL, OPCODE_ENDLOOP);
805 ir_to_mesa_visitor::visit(ir_loop_jump *ir)
808 case ir_loop_jump::jump_break:
809 emit(NULL, OPCODE_BRK);
811 case ir_loop_jump::jump_continue:
812 emit(NULL, OPCODE_CONT);
819 ir_to_mesa_visitor::visit(ir_function_signature *ir)
826 ir_to_mesa_visitor::visit(ir_function *ir)
828 /* Ignore function bodies other than main() -- we shouldn't see calls to
829 * them since they should all be inlined before we get to ir_to_mesa.
831 if (strcmp(ir->name, "main") == 0) {
832 const ir_function_signature *sig;
835 sig = ir->matching_signature(&empty);
839 foreach_iter(exec_list_iterator, iter, sig->body) {
840 ir_instruction *ir = (ir_instruction *)iter.get();
848 ir_to_mesa_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
850 int nonmul_operand = 1 - mul_operand;
853 ir_expression *expr = ir->operands[mul_operand]->as_expression();
854 if (!expr || expr->operation != ir_binop_mul)
857 expr->operands[0]->accept(this);
859 expr->operands[1]->accept(this);
861 ir->operands[nonmul_operand]->accept(this);
864 this->result = get_temp(ir->type);
865 emit(ir, OPCODE_MAD, dst_reg(this->result), a, b, c);
871 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
873 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
874 * implemented using multiplication, and logical-or is implemented using
875 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
876 * As result, the logical expression (a & !b) can be rewritten as:
880 * - (a * 1) - (a * b)
884 * This final expression can be implemented as a single MAD(a, -b, a)
888 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
890 const int other_operand = 1 - try_operand;
893 ir_expression *expr = ir->operands[try_operand]->as_expression();
894 if (!expr || expr->operation != ir_unop_logic_not)
897 ir->operands[other_operand]->accept(this);
899 expr->operands[0]->accept(this);
902 b.negate = ~b.negate;
904 this->result = get_temp(ir->type);
905 emit(ir, OPCODE_MAD, dst_reg(this->result), a, b, a);
911 ir_to_mesa_visitor::try_emit_sat(ir_expression *ir)
913 /* Saturates were only introduced to vertex programs in
914 * NV_vertex_program3, so don't give them to drivers in the VP.
916 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
919 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
923 sat_src->accept(this);
924 src_reg src = this->result;
926 /* If we generated an expression instruction into a temporary in
927 * processing the saturate's operand, apply the saturate to that
928 * instruction. Otherwise, generate a MOV to do the saturate.
930 * Note that we have to be careful to only do this optimization if
931 * the instruction in question was what generated src->result. For
932 * example, ir_dereference_array might generate a MUL instruction
933 * to create the reladdr, and return us a src reg using that
934 * reladdr. That MUL result is not the value we're trying to
937 ir_expression *sat_src_expr = sat_src->as_expression();
938 ir_to_mesa_instruction *new_inst;
939 new_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
940 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
941 sat_src_expr->operation == ir_binop_add ||
942 sat_src_expr->operation == ir_binop_dot)) {
943 new_inst->saturate = true;
945 this->result = get_temp(ir->type);
946 ir_to_mesa_instruction *inst;
947 inst = emit(ir, OPCODE_MOV, dst_reg(this->result), src);
948 inst->saturate = true;
955 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction *ir,
956 src_reg *reg, int *num_reladdr)
961 emit(ir, OPCODE_ARL, address_reg, *reg->reladdr);
963 if (*num_reladdr != 1) {
964 src_reg temp = get_temp(glsl_type::vec4_type);
966 emit(ir, OPCODE_MOV, dst_reg(temp), *reg);
974 ir_to_mesa_visitor::emit_swz(ir_expression *ir)
976 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
977 * This means that each of the operands is either an immediate value of -1,
978 * 0, or 1, or is a component from one source register (possibly with
981 uint8_t components[4] = { 0 };
982 bool negate[4] = { false };
983 ir_variable *var = NULL;
985 for (unsigned i = 0; i < ir->type->vector_elements; i++) {
986 ir_rvalue *op = ir->operands[i];
988 assert(op->type->is_scalar());
991 switch (op->ir_type) {
992 case ir_type_constant: {
994 assert(op->type->is_scalar());
996 const ir_constant *const c = op->as_constant();
998 components[i] = SWIZZLE_ONE;
999 } else if (c->is_zero()) {
1000 components[i] = SWIZZLE_ZERO;
1001 } else if (c->is_negative_one()) {
1002 components[i] = SWIZZLE_ONE;
1005 assert(!"SWZ constant must be 0.0 or 1.0.");
1012 case ir_type_dereference_variable: {
1013 ir_dereference_variable *const deref =
1014 (ir_dereference_variable *) op;
1016 assert((var == NULL) || (deref->var == var));
1017 components[i] = SWIZZLE_X;
1023 case ir_type_expression: {
1024 ir_expression *const expr = (ir_expression *) op;
1026 assert(expr->operation == ir_unop_neg);
1029 op = expr->operands[0];
1033 case ir_type_swizzle: {
1034 ir_swizzle *const swiz = (ir_swizzle *) op;
1036 components[i] = swiz->mask.x;
1042 assert(!"Should not get here.");
1048 assert(var != NULL);
1050 ir_dereference_variable *const deref =
1051 new(mem_ctx) ir_dereference_variable(var);
1053 this->result.file = PROGRAM_UNDEFINED;
1054 deref->accept(this);
1055 if (this->result.file == PROGRAM_UNDEFINED) {
1057 printf("Failed to get tree for expression operand:\n");
1065 src.swizzle = MAKE_SWIZZLE4(components[0],
1069 src.negate = ((unsigned(negate[0]) << 0)
1070 | (unsigned(negate[1]) << 1)
1071 | (unsigned(negate[2]) << 2)
1072 | (unsigned(negate[3]) << 3));
1074 /* Storage for our result. Ideally for an assignment we'd be using the
1075 * actual storage for the result here, instead.
1077 const src_reg result_src = get_temp(ir->type);
1078 dst_reg result_dst = dst_reg(result_src);
1080 /* Limit writes to the channels that will be used by result_src later.
1081 * This does limit this temp's use as a temporary for multi-instruction
1084 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1086 emit(ir, OPCODE_SWZ, result_dst, src);
1087 this->result = result_src;
1091 ir_to_mesa_visitor::visit(ir_expression *ir)
1093 unsigned int operand;
1094 src_reg op[Elements(ir->operands)];
1098 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1100 if (ir->operation == ir_binop_add) {
1101 if (try_emit_mad(ir, 1))
1103 if (try_emit_mad(ir, 0))
1107 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1109 if (ir->operation == ir_binop_logic_and) {
1110 if (try_emit_mad_for_and_not(ir, 1))
1112 if (try_emit_mad_for_and_not(ir, 0))
1116 if (try_emit_sat(ir))
1119 if (ir->operation == ir_quadop_vector) {
1124 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1125 this->result.file = PROGRAM_UNDEFINED;
1126 ir->operands[operand]->accept(this);
1127 if (this->result.file == PROGRAM_UNDEFINED) {
1129 printf("Failed to get tree for expression operand:\n");
1130 ir->operands[operand]->accept(&v);
1133 op[operand] = this->result;
1135 /* Matrix expression operands should have been broken down to vector
1136 * operations already.
1138 assert(!ir->operands[operand]->type->is_matrix());
1141 int vector_elements = ir->operands[0]->type->vector_elements;
1142 if (ir->operands[1]) {
1143 vector_elements = MAX2(vector_elements,
1144 ir->operands[1]->type->vector_elements);
1147 this->result.file = PROGRAM_UNDEFINED;
1149 /* Storage for our result. Ideally for an assignment we'd be using
1150 * the actual storage for the result here, instead.
1152 result_src = get_temp(ir->type);
1153 /* convenience for the emit functions below. */
1154 result_dst = dst_reg(result_src);
1155 /* Limit writes to the channels that will be used by result_src later.
1156 * This does limit this temp's use as a temporary for multi-instruction
1159 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1161 switch (ir->operation) {
1162 case ir_unop_logic_not:
1163 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1164 * older GPUs implement SEQ using multiple instructions (i915 uses two
1165 * SGE instructions and a MUL instruction). Since our logic values are
1166 * 0.0 and 1.0, 1-x also implements !x.
1168 op[0].negate = ~op[0].negate;
1169 emit(ir, OPCODE_ADD, result_dst, op[0], src_reg_for_float(1.0));
1172 op[0].negate = ~op[0].negate;
1176 emit(ir, OPCODE_ABS, result_dst, op[0]);
1179 emit(ir, OPCODE_SSG, result_dst, op[0]);
1182 emit_scalar(ir, OPCODE_RCP, result_dst, op[0]);
1186 emit_scalar(ir, OPCODE_EX2, result_dst, op[0]);
1190 assert(!"not reached: should be handled by ir_explog_to_explog2");
1193 emit_scalar(ir, OPCODE_LG2, result_dst, op[0]);
1196 emit_scalar(ir, OPCODE_SIN, result_dst, op[0]);
1199 emit_scalar(ir, OPCODE_COS, result_dst, op[0]);
1201 case ir_unop_sin_reduced:
1202 emit_scs(ir, OPCODE_SIN, result_dst, op[0]);
1204 case ir_unop_cos_reduced:
1205 emit_scs(ir, OPCODE_COS, result_dst, op[0]);
1209 emit(ir, OPCODE_DDX, result_dst, op[0]);
1212 emit(ir, OPCODE_DDY, result_dst, op[0]);
1215 case ir_unop_noise: {
1216 const enum prog_opcode opcode =
1217 prog_opcode(OPCODE_NOISE1
1218 + (ir->operands[0]->type->vector_elements) - 1);
1219 assert((opcode >= OPCODE_NOISE1) && (opcode <= OPCODE_NOISE4));
1221 emit(ir, opcode, result_dst, op[0]);
1226 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1229 emit(ir, OPCODE_SUB, result_dst, op[0], op[1]);
1233 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1236 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1239 /* Floating point should be lowered by MOD_TO_FRACT in the compiler. */
1240 assert(ir->type->is_integer());
1241 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1245 emit(ir, OPCODE_SLT, result_dst, op[0], op[1]);
1247 case ir_binop_greater:
1248 emit(ir, OPCODE_SGT, result_dst, op[0], op[1]);
1250 case ir_binop_lequal:
1251 emit(ir, OPCODE_SLE, result_dst, op[0], op[1]);
1253 case ir_binop_gequal:
1254 emit(ir, OPCODE_SGE, result_dst, op[0], op[1]);
1256 case ir_binop_equal:
1257 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1259 case ir_binop_nequal:
1260 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1262 case ir_binop_all_equal:
1263 /* "==" operator producing a scalar boolean. */
1264 if (ir->operands[0]->type->is_vector() ||
1265 ir->operands[1]->type->is_vector()) {
1266 src_reg temp = get_temp(glsl_type::vec4_type);
1267 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1269 /* After the dot-product, the value will be an integer on the
1270 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1272 emit_dp(ir, result_dst, temp, temp, vector_elements);
1274 /* Negating the result of the dot-product gives values on the range
1275 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1276 * achieved using SGE.
1278 src_reg sge_src = result_src;
1279 sge_src.negate = ~sge_src.negate;
1280 emit(ir, OPCODE_SGE, result_dst, sge_src, src_reg_for_float(0.0));
1282 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1285 case ir_binop_any_nequal:
1286 /* "!=" operator producing a scalar boolean. */
1287 if (ir->operands[0]->type->is_vector() ||
1288 ir->operands[1]->type->is_vector()) {
1289 src_reg temp = get_temp(glsl_type::vec4_type);
1290 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1292 /* After the dot-product, the value will be an integer on the
1293 * range [0,4]. Zero stays zero, and positive values become 1.0.
1295 ir_to_mesa_instruction *const dp =
1296 emit_dp(ir, result_dst, temp, temp, vector_elements);
1297 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1298 /* The clamping to [0,1] can be done for free in the fragment
1299 * shader with a saturate.
1301 dp->saturate = true;
1303 /* Negating the result of the dot-product gives values on the range
1304 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1305 * achieved using SLT.
1307 src_reg slt_src = result_src;
1308 slt_src.negate = ~slt_src.negate;
1309 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1312 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1317 assert(ir->operands[0]->type->is_vector());
1319 /* After the dot-product, the value will be an integer on the
1320 * range [0,4]. Zero stays zero, and positive values become 1.0.
1322 ir_to_mesa_instruction *const dp =
1323 emit_dp(ir, result_dst, op[0], op[0],
1324 ir->operands[0]->type->vector_elements);
1325 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1326 /* The clamping to [0,1] can be done for free in the fragment
1327 * shader with a saturate.
1329 dp->saturate = true;
1331 /* Negating the result of the dot-product gives values on the range
1332 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1333 * is achieved using SLT.
1335 src_reg slt_src = result_src;
1336 slt_src.negate = ~slt_src.negate;
1337 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1342 case ir_binop_logic_xor:
1343 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1346 case ir_binop_logic_or: {
1347 /* After the addition, the value will be an integer on the
1348 * range [0,2]. Zero stays zero, and positive values become 1.0.
1350 ir_to_mesa_instruction *add =
1351 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1352 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1353 /* The clamping to [0,1] can be done for free in the fragment
1354 * shader with a saturate.
1356 add->saturate = true;
1358 /* Negating the result of the addition gives values on the range
1359 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1360 * is achieved using SLT.
1362 src_reg slt_src = result_src;
1363 slt_src.negate = ~slt_src.negate;
1364 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1369 case ir_binop_logic_and:
1370 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1371 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1375 assert(ir->operands[0]->type->is_vector());
1376 assert(ir->operands[0]->type == ir->operands[1]->type);
1377 emit_dp(ir, result_dst, op[0], op[1],
1378 ir->operands[0]->type->vector_elements);
1382 /* sqrt(x) = x * rsq(x). */
1383 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1384 emit(ir, OPCODE_MUL, result_dst, result_src, op[0]);
1385 /* For incoming channels <= 0, set the result to 0. */
1386 op[0].negate = ~op[0].negate;
1387 emit(ir, OPCODE_CMP, result_dst,
1388 op[0], result_src, src_reg_for_float(0.0));
1391 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1399 /* Mesa IR lacks types, ints are stored as truncated floats. */
1404 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1408 emit(ir, OPCODE_SNE, result_dst,
1409 op[0], src_reg_for_float(0.0));
1411 case ir_unop_bitcast_f2i: // Ignore these 4, they can't happen here anyway
1412 case ir_unop_bitcast_f2u:
1413 case ir_unop_bitcast_i2f:
1414 case ir_unop_bitcast_u2f:
1417 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1420 op[0].negate = ~op[0].negate;
1421 emit(ir, OPCODE_FLR, result_dst, op[0]);
1422 result_src.negate = ~result_src.negate;
1425 emit(ir, OPCODE_FLR, result_dst, op[0]);
1428 emit(ir, OPCODE_FRC, result_dst, op[0]);
1432 emit(ir, OPCODE_MIN, result_dst, op[0], op[1]);
1435 emit(ir, OPCODE_MAX, result_dst, op[0], op[1]);
1438 emit_scalar(ir, OPCODE_POW, result_dst, op[0], op[1]);
1441 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1442 * hardware backends have no way to avoid Mesa IR generation
1443 * even if they don't use it, we need to emit "something" and
1446 case ir_binop_lshift:
1447 case ir_binop_rshift:
1448 case ir_binop_bit_and:
1449 case ir_binop_bit_xor:
1450 case ir_binop_bit_or:
1451 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1454 case ir_unop_bit_not:
1455 case ir_unop_round_even:
1456 emit(ir, OPCODE_MOV, result_dst, op[0]);
1459 case ir_quadop_vector:
1460 /* This operation should have already been handled.
1462 assert(!"Should not get here.");
1466 this->result = result_src;
1471 ir_to_mesa_visitor::visit(ir_swizzle *ir)
1477 /* Note that this is only swizzles in expressions, not those on the left
1478 * hand side of an assignment, which do write masking. See ir_assignment
1482 ir->val->accept(this);
1484 assert(src.file != PROGRAM_UNDEFINED);
1486 for (i = 0; i < 4; i++) {
1487 if (i < ir->type->vector_elements) {
1490 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1493 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1496 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1499 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1503 /* If the type is smaller than a vec4, replicate the last
1506 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1510 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1516 ir_to_mesa_visitor::visit(ir_dereference_variable *ir)
1518 variable_storage *entry = find_variable_storage(ir->var);
1519 ir_variable *var = ir->var;
1522 switch (var->mode) {
1523 case ir_var_uniform:
1524 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1526 this->variables.push_tail(entry);
1530 /* The linker assigns locations for varyings and attributes,
1531 * including deprecated builtins (like gl_Color),
1532 * user-assigned generic attributes (glBindVertexLocation),
1533 * and user-defined varyings.
1535 * FINISHME: We would hit this path for function arguments. Fix!
1537 assert(var->location != -1);
1538 entry = new(mem_ctx) variable_storage(var,
1543 assert(var->location != -1);
1544 entry = new(mem_ctx) variable_storage(var,
1548 case ir_var_system_value:
1549 entry = new(mem_ctx) variable_storage(var,
1550 PROGRAM_SYSTEM_VALUE,
1554 case ir_var_temporary:
1555 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1557 this->variables.push_tail(entry);
1559 next_temp += type_size(var->type);
1564 printf("Failed to make storage for %s\n", var->name);
1569 this->result = src_reg(entry->file, entry->index, var->type);
1573 ir_to_mesa_visitor::visit(ir_dereference_array *ir)
1577 int element_size = type_size(ir->type);
1579 index = ir->array_index->constant_expression_value();
1581 ir->array->accept(this);
1585 src.index += index->value.i[0] * element_size;
1587 /* Variable index array dereference. It eats the "vec4" of the
1588 * base of the array and an index that offsets the Mesa register
1591 ir->array_index->accept(this);
1595 if (element_size == 1) {
1596 index_reg = this->result;
1598 index_reg = get_temp(glsl_type::float_type);
1600 emit(ir, OPCODE_MUL, dst_reg(index_reg),
1601 this->result, src_reg_for_float(element_size));
1604 /* If there was already a relative address register involved, add the
1605 * new and the old together to get the new offset.
1607 if (src.reladdr != NULL) {
1608 src_reg accum_reg = get_temp(glsl_type::float_type);
1610 emit(ir, OPCODE_ADD, dst_reg(accum_reg),
1611 index_reg, *src.reladdr);
1613 index_reg = accum_reg;
1616 src.reladdr = ralloc(mem_ctx, src_reg);
1617 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
1620 /* If the type is smaller than a vec4, replicate the last channel out. */
1621 if (ir->type->is_scalar() || ir->type->is_vector())
1622 src.swizzle = swizzle_for_size(ir->type->vector_elements);
1624 src.swizzle = SWIZZLE_NOOP;
1630 ir_to_mesa_visitor::visit(ir_dereference_record *ir)
1633 const glsl_type *struct_type = ir->record->type;
1636 ir->record->accept(this);
1638 for (i = 0; i < struct_type->length; i++) {
1639 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
1641 offset += type_size(struct_type->fields.structure[i].type);
1644 /* If the type is smaller than a vec4, replicate the last channel out. */
1645 if (ir->type->is_scalar() || ir->type->is_vector())
1646 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
1648 this->result.swizzle = SWIZZLE_NOOP;
1650 this->result.index += offset;
1654 * We want to be careful in assignment setup to hit the actual storage
1655 * instead of potentially using a temporary like we might with the
1656 * ir_dereference handler.
1659 get_assignment_lhs(ir_dereference *ir, ir_to_mesa_visitor *v)
1661 /* The LHS must be a dereference. If the LHS is a variable indexed array
1662 * access of a vector, it must be separated into a series conditional moves
1663 * before reaching this point (see ir_vec_index_to_cond_assign).
1665 assert(ir->as_dereference());
1666 ir_dereference_array *deref_array = ir->as_dereference_array();
1668 assert(!deref_array->array->type->is_vector());
1671 /* Use the rvalue deref handler for the most part. We'll ignore
1672 * swizzles in it and write swizzles using writemask, though.
1675 return dst_reg(v->result);
1679 * Process the condition of a conditional assignment
1681 * Examines the condition of a conditional assignment to generate the optimal
1682 * first operand of a \c CMP instruction. If the condition is a relational
1683 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1684 * used as the source for the \c CMP instruction. Otherwise the comparison
1685 * is processed to a boolean result, and the boolean result is used as the
1686 * operand to the CMP instruction.
1689 ir_to_mesa_visitor::process_move_condition(ir_rvalue *ir)
1691 ir_rvalue *src_ir = ir;
1693 bool switch_order = false;
1695 ir_expression *const expr = ir->as_expression();
1696 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
1697 bool zero_on_left = false;
1699 if (expr->operands[0]->is_zero()) {
1700 src_ir = expr->operands[1];
1701 zero_on_left = true;
1702 } else if (expr->operands[1]->is_zero()) {
1703 src_ir = expr->operands[0];
1704 zero_on_left = false;
1708 * (a < 0) T F F ( a < 0) T F F
1709 * (0 < a) F F T (-a < 0) F F T
1710 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1711 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1712 * (a > 0) F F T (-a < 0) F F T
1713 * (0 > a) T F F ( a < 0) T F F
1714 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1715 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1717 * Note that exchanging the order of 0 and 'a' in the comparison simply
1718 * means that the value of 'a' should be negated.
1721 switch (expr->operation) {
1723 switch_order = false;
1724 negate = zero_on_left;
1727 case ir_binop_greater:
1728 switch_order = false;
1729 negate = !zero_on_left;
1732 case ir_binop_lequal:
1733 switch_order = true;
1734 negate = !zero_on_left;
1737 case ir_binop_gequal:
1738 switch_order = true;
1739 negate = zero_on_left;
1743 /* This isn't the right kind of comparison afterall, so make sure
1744 * the whole condition is visited.
1752 src_ir->accept(this);
1754 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1755 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1756 * choose which value OPCODE_CMP produces without an extra instruction
1757 * computing the condition.
1760 this->result.negate = ~this->result.negate;
1762 return switch_order;
1766 ir_to_mesa_visitor::visit(ir_assignment *ir)
1772 ir->rhs->accept(this);
1775 l = get_assignment_lhs(ir->lhs, this);
1777 /* FINISHME: This should really set to the correct maximal writemask for each
1778 * FINISHME: component written (in the loops below). This case can only
1779 * FINISHME: occur for matrices, arrays, and structures.
1781 if (ir->write_mask == 0) {
1782 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
1783 l.writemask = WRITEMASK_XYZW;
1784 } else if (ir->lhs->type->is_scalar()) {
1785 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1786 * FINISHME: W component of fragment shader output zero, work correctly.
1788 l.writemask = WRITEMASK_XYZW;
1791 int first_enabled_chan = 0;
1794 assert(ir->lhs->type->is_vector());
1795 l.writemask = ir->write_mask;
1797 for (int i = 0; i < 4; i++) {
1798 if (l.writemask & (1 << i)) {
1799 first_enabled_chan = GET_SWZ(r.swizzle, i);
1804 /* Swizzle a small RHS vector into the channels being written.
1806 * glsl ir treats write_mask as dictating how many channels are
1807 * present on the RHS while Mesa IR treats write_mask as just
1808 * showing which channels of the vec4 RHS get written.
1810 for (int i = 0; i < 4; i++) {
1811 if (l.writemask & (1 << i))
1812 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
1814 swizzles[i] = first_enabled_chan;
1816 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
1817 swizzles[2], swizzles[3]);
1820 assert(l.file != PROGRAM_UNDEFINED);
1821 assert(r.file != PROGRAM_UNDEFINED);
1823 if (ir->condition) {
1824 const bool switch_order = this->process_move_condition(ir->condition);
1825 src_reg condition = this->result;
1827 for (i = 0; i < type_size(ir->lhs->type); i++) {
1829 emit(ir, OPCODE_CMP, l, condition, src_reg(l), r);
1831 emit(ir, OPCODE_CMP, l, condition, r, src_reg(l));
1838 for (i = 0; i < type_size(ir->lhs->type); i++) {
1839 emit(ir, OPCODE_MOV, l, r);
1848 ir_to_mesa_visitor::visit(ir_constant *ir)
1851 GLfloat stack_vals[4] = { 0 };
1852 GLfloat *values = stack_vals;
1855 /* Unfortunately, 4 floats is all we can get into
1856 * _mesa_add_unnamed_constant. So, make a temp to store an
1857 * aggregate constant and move each constant value into it. If we
1858 * get lucky, copy propagation will eliminate the extra moves.
1861 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
1862 src_reg temp_base = get_temp(ir->type);
1863 dst_reg temp = dst_reg(temp_base);
1865 foreach_iter(exec_list_iterator, iter, ir->components) {
1866 ir_constant *field_value = (ir_constant *)iter.get();
1867 int size = type_size(field_value->type);
1871 field_value->accept(this);
1874 for (i = 0; i < (unsigned int)size; i++) {
1875 emit(ir, OPCODE_MOV, temp, src);
1881 this->result = temp_base;
1885 if (ir->type->is_array()) {
1886 src_reg temp_base = get_temp(ir->type);
1887 dst_reg temp = dst_reg(temp_base);
1888 int size = type_size(ir->type->fields.array);
1892 for (i = 0; i < ir->type->length; i++) {
1893 ir->array_elements[i]->accept(this);
1895 for (int j = 0; j < size; j++) {
1896 emit(ir, OPCODE_MOV, temp, src);
1902 this->result = temp_base;
1906 if (ir->type->is_matrix()) {
1907 src_reg mat = get_temp(ir->type);
1908 dst_reg mat_column = dst_reg(mat);
1910 for (i = 0; i < ir->type->matrix_columns; i++) {
1911 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
1912 values = &ir->value.f[i * ir->type->vector_elements];
1914 src = src_reg(PROGRAM_CONSTANT, -1, NULL);
1915 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1916 (gl_constant_value *) values,
1917 ir->type->vector_elements,
1919 emit(ir, OPCODE_MOV, mat_column, src);
1928 src.file = PROGRAM_CONSTANT;
1929 switch (ir->type->base_type) {
1930 case GLSL_TYPE_FLOAT:
1931 values = &ir->value.f[0];
1933 case GLSL_TYPE_UINT:
1934 for (i = 0; i < ir->type->vector_elements; i++) {
1935 values[i] = ir->value.u[i];
1939 for (i = 0; i < ir->type->vector_elements; i++) {
1940 values[i] = ir->value.i[i];
1943 case GLSL_TYPE_BOOL:
1944 for (i = 0; i < ir->type->vector_elements; i++) {
1945 values[i] = ir->value.b[i];
1949 assert(!"Non-float/uint/int/bool constant");
1952 this->result = src_reg(PROGRAM_CONSTANT, -1, ir->type);
1953 this->result.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1954 (gl_constant_value *) values,
1955 ir->type->vector_elements,
1956 &this->result.swizzle);
1960 ir_to_mesa_visitor::visit(ir_call *ir)
1962 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1966 ir_to_mesa_visitor::visit(ir_texture *ir)
1968 src_reg result_src, coord, lod_info, projector, dx, dy;
1969 dst_reg result_dst, coord_dst;
1970 ir_to_mesa_instruction *inst = NULL;
1971 prog_opcode opcode = OPCODE_NOP;
1973 if (ir->op == ir_txs)
1974 this->result = src_reg_for_float(0.0);
1976 ir->coordinate->accept(this);
1978 /* Put our coords in a temp. We'll need to modify them for shadow,
1979 * projection, or LOD, so the only case we'd use it as is is if
1980 * we're doing plain old texturing. Mesa IR optimization should
1981 * handle cleaning up our mess in that case.
1983 coord = get_temp(glsl_type::vec4_type);
1984 coord_dst = dst_reg(coord);
1985 emit(ir, OPCODE_MOV, coord_dst, this->result);
1987 if (ir->projector) {
1988 ir->projector->accept(this);
1989 projector = this->result;
1992 /* Storage for our result. Ideally for an assignment we'd be using
1993 * the actual storage for the result here, instead.
1995 result_src = get_temp(glsl_type::vec4_type);
1996 result_dst = dst_reg(result_src);
2001 opcode = OPCODE_TEX;
2004 opcode = OPCODE_TXB;
2005 ir->lod_info.bias->accept(this);
2006 lod_info = this->result;
2009 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2011 opcode = OPCODE_TXL;
2012 ir->lod_info.lod->accept(this);
2013 lod_info = this->result;
2016 opcode = OPCODE_TXD;
2017 ir->lod_info.grad.dPdx->accept(this);
2019 ir->lod_info.grad.dPdy->accept(this);
2024 const glsl_type *sampler_type = ir->sampler->type;
2026 if (ir->projector) {
2027 if (opcode == OPCODE_TEX) {
2028 /* Slot the projector in as the last component of the coord. */
2029 coord_dst.writemask = WRITEMASK_W;
2030 emit(ir, OPCODE_MOV, coord_dst, projector);
2031 coord_dst.writemask = WRITEMASK_XYZW;
2032 opcode = OPCODE_TXP;
2034 src_reg coord_w = coord;
2035 coord_w.swizzle = SWIZZLE_WWWW;
2037 /* For the other TEX opcodes there's no projective version
2038 * since the last slot is taken up by lod info. Do the
2039 * projective divide now.
2041 coord_dst.writemask = WRITEMASK_W;
2042 emit(ir, OPCODE_RCP, coord_dst, projector);
2044 /* In the case where we have to project the coordinates "by hand,"
2045 * the shadow comparitor value must also be projected.
2047 src_reg tmp_src = coord;
2048 if (ir->shadow_comparitor) {
2049 /* Slot the shadow value in as the second to last component of the
2052 ir->shadow_comparitor->accept(this);
2054 tmp_src = get_temp(glsl_type::vec4_type);
2055 dst_reg tmp_dst = dst_reg(tmp_src);
2057 /* Projective division not allowed for array samplers. */
2058 assert(!sampler_type->sampler_array);
2060 tmp_dst.writemask = WRITEMASK_Z;
2061 emit(ir, OPCODE_MOV, tmp_dst, this->result);
2063 tmp_dst.writemask = WRITEMASK_XY;
2064 emit(ir, OPCODE_MOV, tmp_dst, coord);
2067 coord_dst.writemask = WRITEMASK_XYZ;
2068 emit(ir, OPCODE_MUL, coord_dst, tmp_src, coord_w);
2070 coord_dst.writemask = WRITEMASK_XYZW;
2071 coord.swizzle = SWIZZLE_XYZW;
2075 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2076 * comparitor was put in the correct place (and projected) by the code,
2077 * above, that handles by-hand projection.
2079 if (ir->shadow_comparitor && (!ir->projector || opcode == OPCODE_TXP)) {
2080 /* Slot the shadow value in as the second to last component of the
2083 ir->shadow_comparitor->accept(this);
2085 /* XXX This will need to be updated for cubemap array samplers. */
2086 if (sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2087 sampler_type->sampler_array) {
2088 coord_dst.writemask = WRITEMASK_W;
2090 coord_dst.writemask = WRITEMASK_Z;
2093 emit(ir, OPCODE_MOV, coord_dst, this->result);
2094 coord_dst.writemask = WRITEMASK_XYZW;
2097 if (opcode == OPCODE_TXL || opcode == OPCODE_TXB) {
2098 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2099 coord_dst.writemask = WRITEMASK_W;
2100 emit(ir, OPCODE_MOV, coord_dst, lod_info);
2101 coord_dst.writemask = WRITEMASK_XYZW;
2104 if (opcode == OPCODE_TXD)
2105 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2107 inst = emit(ir, opcode, result_dst, coord);
2109 if (ir->shadow_comparitor)
2110 inst->tex_shadow = GL_TRUE;
2112 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2113 this->shader_program,
2116 switch (sampler_type->sampler_dimensionality) {
2117 case GLSL_SAMPLER_DIM_1D:
2118 inst->tex_target = (sampler_type->sampler_array)
2119 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2121 case GLSL_SAMPLER_DIM_2D:
2122 inst->tex_target = (sampler_type->sampler_array)
2123 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2125 case GLSL_SAMPLER_DIM_3D:
2126 inst->tex_target = TEXTURE_3D_INDEX;
2128 case GLSL_SAMPLER_DIM_CUBE:
2129 inst->tex_target = TEXTURE_CUBE_INDEX;
2131 case GLSL_SAMPLER_DIM_RECT:
2132 inst->tex_target = TEXTURE_RECT_INDEX;
2134 case GLSL_SAMPLER_DIM_BUF:
2135 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2137 case GLSL_SAMPLER_DIM_EXTERNAL:
2138 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2141 assert(!"Should not get here.");
2144 this->result = result_src;
2148 ir_to_mesa_visitor::visit(ir_return *ir)
2150 /* Non-void functions should have been inlined. We may still emit RETs
2151 * from main() unless the EmitNoMainReturn option is set.
2153 assert(!ir->get_value());
2154 emit(ir, OPCODE_RET);
2158 ir_to_mesa_visitor::visit(ir_discard *ir)
2160 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
2162 if (ir->condition) {
2163 ir->condition->accept(this);
2164 this->result.negate = ~this->result.negate;
2165 emit(ir, OPCODE_KIL, undef_dst, this->result);
2167 emit(ir, OPCODE_KIL_NV);
2170 fp->UsesKill = GL_TRUE;
2174 ir_to_mesa_visitor::visit(ir_if *ir)
2176 ir_to_mesa_instruction *cond_inst, *if_inst;
2177 ir_to_mesa_instruction *prev_inst;
2179 prev_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2181 ir->condition->accept(this);
2182 assert(this->result.file != PROGRAM_UNDEFINED);
2184 if (this->options->EmitCondCodes) {
2185 cond_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2187 /* See if we actually generated any instruction for generating
2188 * the condition. If not, then cook up a move to a temp so we
2189 * have something to set cond_update on.
2191 if (cond_inst == prev_inst) {
2192 src_reg temp = get_temp(glsl_type::bool_type);
2193 cond_inst = emit(ir->condition, OPCODE_MOV, dst_reg(temp), result);
2195 cond_inst->cond_update = GL_TRUE;
2197 if_inst = emit(ir->condition, OPCODE_IF);
2198 if_inst->dst.cond_mask = COND_NE;
2200 if_inst = emit(ir->condition, OPCODE_IF, undef_dst, this->result);
2203 this->instructions.push_tail(if_inst);
2205 visit_exec_list(&ir->then_instructions, this);
2207 if (!ir->else_instructions.is_empty()) {
2208 emit(ir->condition, OPCODE_ELSE);
2209 visit_exec_list(&ir->else_instructions, this);
2212 if_inst = emit(ir->condition, OPCODE_ENDIF);
2215 ir_to_mesa_visitor::ir_to_mesa_visitor()
2217 result.file = PROGRAM_UNDEFINED;
2219 next_signature_id = 1;
2220 current_function = NULL;
2221 mem_ctx = ralloc_context(NULL);
2224 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2226 ralloc_free(mem_ctx);
2229 static struct prog_src_register
2230 mesa_src_reg_from_ir_src_reg(src_reg reg)
2232 struct prog_src_register mesa_reg;
2234 mesa_reg.File = reg.file;
2235 assert(reg.index < (1 << INST_INDEX_BITS));
2236 mesa_reg.Index = reg.index;
2237 mesa_reg.Swizzle = reg.swizzle;
2238 mesa_reg.RelAddr = reg.reladdr != NULL;
2239 mesa_reg.Negate = reg.negate;
2241 mesa_reg.HasIndex2 = GL_FALSE;
2242 mesa_reg.RelAddr2 = 0;
2243 mesa_reg.Index2 = 0;
2249 set_branchtargets(ir_to_mesa_visitor *v,
2250 struct prog_instruction *mesa_instructions,
2251 int num_instructions)
2253 int if_count = 0, loop_count = 0;
2254 int *if_stack, *loop_stack;
2255 int if_stack_pos = 0, loop_stack_pos = 0;
2258 for (i = 0; i < num_instructions; i++) {
2259 switch (mesa_instructions[i].Opcode) {
2263 case OPCODE_BGNLOOP:
2268 mesa_instructions[i].BranchTarget = -1;
2275 if_stack = rzalloc_array(v->mem_ctx, int, if_count);
2276 loop_stack = rzalloc_array(v->mem_ctx, int, loop_count);
2278 for (i = 0; i < num_instructions; i++) {
2279 switch (mesa_instructions[i].Opcode) {
2281 if_stack[if_stack_pos] = i;
2285 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2286 if_stack[if_stack_pos - 1] = i;
2289 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2292 case OPCODE_BGNLOOP:
2293 loop_stack[loop_stack_pos] = i;
2296 case OPCODE_ENDLOOP:
2298 /* Rewrite any breaks/conts at this nesting level (haven't
2299 * already had a BranchTarget assigned) to point to the end
2302 for (j = loop_stack[loop_stack_pos]; j < i; j++) {
2303 if (mesa_instructions[j].Opcode == OPCODE_BRK ||
2304 mesa_instructions[j].Opcode == OPCODE_CONT) {
2305 if (mesa_instructions[j].BranchTarget == -1) {
2306 mesa_instructions[j].BranchTarget = i;
2310 /* The loop ends point at each other. */
2311 mesa_instructions[i].BranchTarget = loop_stack[loop_stack_pos];
2312 mesa_instructions[loop_stack[loop_stack_pos]].BranchTarget = i;
2315 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
2316 function_entry *entry = (function_entry *)iter.get();
2318 if (entry->sig_id == mesa_instructions[i].BranchTarget) {
2319 mesa_instructions[i].BranchTarget = entry->inst;
2331 print_program(struct prog_instruction *mesa_instructions,
2332 ir_instruction **mesa_instruction_annotation,
2333 int num_instructions)
2335 ir_instruction *last_ir = NULL;
2339 for (i = 0; i < num_instructions; i++) {
2340 struct prog_instruction *mesa_inst = mesa_instructions + i;
2341 ir_instruction *ir = mesa_instruction_annotation[i];
2343 fprintf(stdout, "%3d: ", i);
2345 if (last_ir != ir && ir) {
2348 for (j = 0; j < indent; j++) {
2349 fprintf(stdout, " ");
2355 fprintf(stdout, " "); /* line number spacing. */
2358 indent = _mesa_fprint_instruction_opt(stdout, mesa_inst, indent,
2359 PROG_PRINT_DEBUG, NULL);
2363 class add_uniform_to_shader : public uniform_field_visitor {
2365 add_uniform_to_shader(struct gl_shader_program *shader_program,
2366 struct gl_program_parameter_list *params)
2367 : shader_program(shader_program), params(params), idx(-1)
2372 void process(ir_variable *var)
2375 this->uniform_field_visitor::process(var);
2377 var->location = this->idx;
2381 virtual void visit_field(const glsl_type *type, const char *name);
2383 struct gl_shader_program *shader_program;
2384 struct gl_program_parameter_list *params;
2389 add_uniform_to_shader::visit_field(const glsl_type *type, const char *name)
2393 if (type->is_vector() || type->is_scalar()) {
2394 size = type->vector_elements;
2396 size = type_size(type) * 4;
2399 gl_register_file file;
2400 if (type->is_sampler() ||
2401 (type->is_array() && type->fields.array->is_sampler())) {
2402 file = PROGRAM_SAMPLER;
2404 file = PROGRAM_UNIFORM;
2407 int index = _mesa_lookup_parameter_index(params, -1, name);
2409 index = _mesa_add_parameter(params, file, name, size, type->gl_type,
2412 /* Sampler uniform values are stored in prog->SamplerUnits,
2413 * and the entry in that array is selected by this index we
2414 * store in ParameterValues[].
2416 if (file == PROGRAM_SAMPLER) {
2419 this->shader_program->UniformHash->get(location,
2420 params->Parameters[index].Name);
2426 struct gl_uniform_storage *storage =
2427 &this->shader_program->UniformStorage[location];
2429 for (unsigned int j = 0; j < size / 4; j++)
2430 params->ParameterValues[index + j][0].f = storage->sampler + j;
2434 /* The first part of the uniform that's processed determines the base
2435 * location of the whole uniform (for structures).
2442 * Generate the program parameters list for the user uniforms in a shader
2444 * \param shader_program Linked shader program. This is only used to
2445 * emit possible link errors to the info log.
2446 * \param sh Shader whose uniforms are to be processed.
2447 * \param params Parameter list to be filled in.
2450 _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program
2452 struct gl_shader *sh,
2453 struct gl_program_parameter_list
2456 add_uniform_to_shader add(shader_program, params);
2458 foreach_list(node, sh->ir) {
2459 ir_variable *var = ((ir_instruction *) node)->as_variable();
2461 if ((var == NULL) || (var->mode != ir_var_uniform)
2462 || (strncmp(var->name, "gl_", 3) == 0))
2470 _mesa_associate_uniform_storage(struct gl_context *ctx,
2471 struct gl_shader_program *shader_program,
2472 struct gl_program_parameter_list *params)
2474 /* After adding each uniform to the parameter list, connect the storage for
2475 * the parameter with the tracking structure used by the API for the
2478 unsigned last_location = unsigned(~0);
2479 for (unsigned i = 0; i < params->NumParameters; i++) {
2480 if (params->Parameters[i].Type != PROGRAM_UNIFORM)
2485 shader_program->UniformHash->get(location, params->Parameters[i].Name);
2491 if (location != last_location) {
2492 struct gl_uniform_storage *storage =
2493 &shader_program->UniformStorage[location];
2494 enum gl_uniform_driver_format format = uniform_native;
2496 unsigned columns = 0;
2497 switch (storage->type->base_type) {
2498 case GLSL_TYPE_UINT:
2499 assert(ctx->Const.NativeIntegers);
2500 format = uniform_native;
2505 (ctx->Const.NativeIntegers) ? uniform_native : uniform_int_float;
2508 case GLSL_TYPE_FLOAT:
2509 format = uniform_native;
2510 columns = storage->type->matrix_columns;
2512 case GLSL_TYPE_BOOL:
2513 if (ctx->Const.NativeIntegers) {
2514 format = (ctx->Const.UniformBooleanTrue == 1)
2515 ? uniform_bool_int_0_1 : uniform_bool_int_0_not0;
2517 format = uniform_bool_float;
2521 case GLSL_TYPE_SAMPLER:
2522 format = uniform_native;
2526 assert(!"Should not get here.");
2530 _mesa_uniform_attach_driver_storage(storage,
2531 4 * sizeof(float) * columns,
2534 ¶ms->ParameterValues[i]);
2536 /* After attaching the driver's storage to the uniform, propagate any
2537 * data from the linker's backing store. This will cause values from
2538 * initializers in the source code to be copied over.
2540 _mesa_propagate_uniforms_to_driver_storage(storage,
2542 MAX2(1, storage->array_elements));
2544 last_location = location;
2550 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2551 * channels for copy propagation and updates following instructions to
2552 * use the original versions.
2554 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2555 * will occur. As an example, a TXP production before this pass:
2557 * 0: MOV TEMP[1], INPUT[4].xyyy;
2558 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2559 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2563 * 0: MOV TEMP[1], INPUT[4].xyyy;
2564 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2565 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2567 * which allows for dead code elimination on TEMP[1]'s writes.
2570 ir_to_mesa_visitor::copy_propagate(void)
2572 ir_to_mesa_instruction **acp = rzalloc_array(mem_ctx,
2573 ir_to_mesa_instruction *,
2574 this->next_temp * 4);
2575 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
2578 foreach_iter(exec_list_iterator, iter, this->instructions) {
2579 ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
2581 assert(inst->dst.file != PROGRAM_TEMPORARY
2582 || inst->dst.index < this->next_temp);
2584 /* First, do any copy propagation possible into the src regs. */
2585 for (int r = 0; r < 3; r++) {
2586 ir_to_mesa_instruction *first = NULL;
2588 int acp_base = inst->src[r].index * 4;
2590 if (inst->src[r].file != PROGRAM_TEMPORARY ||
2591 inst->src[r].reladdr)
2594 /* See if we can find entries in the ACP consisting of MOVs
2595 * from the same src register for all the swizzled channels
2596 * of this src register reference.
2598 for (int i = 0; i < 4; i++) {
2599 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2600 ir_to_mesa_instruction *copy_chan = acp[acp_base + src_chan];
2607 assert(acp_level[acp_base + src_chan] <= level);
2612 if (first->src[0].file != copy_chan->src[0].file ||
2613 first->src[0].index != copy_chan->src[0].index) {
2621 /* We've now validated that we can copy-propagate to
2622 * replace this src register reference. Do it.
2624 inst->src[r].file = first->src[0].file;
2625 inst->src[r].index = first->src[0].index;
2628 for (int i = 0; i < 4; i++) {
2629 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2630 ir_to_mesa_instruction *copy_inst = acp[acp_base + src_chan];
2631 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
2634 inst->src[r].swizzle = swizzle;
2639 case OPCODE_BGNLOOP:
2640 case OPCODE_ENDLOOP:
2641 /* End of a basic block, clear the ACP entirely. */
2642 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2651 /* Clear all channels written inside the block from the ACP, but
2652 * leaving those that were not touched.
2654 for (int r = 0; r < this->next_temp; r++) {
2655 for (int c = 0; c < 4; c++) {
2656 if (!acp[4 * r + c])
2659 if (acp_level[4 * r + c] >= level)
2660 acp[4 * r + c] = NULL;
2663 if (inst->op == OPCODE_ENDIF)
2668 /* Continuing the block, clear any written channels from
2671 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
2672 /* Any temporary might be written, so no copy propagation
2673 * across this instruction.
2675 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2676 } else if (inst->dst.file == PROGRAM_OUTPUT &&
2677 inst->dst.reladdr) {
2678 /* Any output might be written, so no copy propagation
2679 * from outputs across this instruction.
2681 for (int r = 0; r < this->next_temp; r++) {
2682 for (int c = 0; c < 4; c++) {
2683 if (!acp[4 * r + c])
2686 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
2687 acp[4 * r + c] = NULL;
2690 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
2691 inst->dst.file == PROGRAM_OUTPUT) {
2692 /* Clear where it's used as dst. */
2693 if (inst->dst.file == PROGRAM_TEMPORARY) {
2694 for (int c = 0; c < 4; c++) {
2695 if (inst->dst.writemask & (1 << c)) {
2696 acp[4 * inst->dst.index + c] = NULL;
2701 /* Clear where it's used as src. */
2702 for (int r = 0; r < this->next_temp; r++) {
2703 for (int c = 0; c < 4; c++) {
2704 if (!acp[4 * r + c])
2707 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
2709 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
2710 acp[4 * r + c]->src[0].index == inst->dst.index &&
2711 inst->dst.writemask & (1 << src_chan))
2713 acp[4 * r + c] = NULL;
2721 /* If this is a copy, add it to the ACP. */
2722 if (inst->op == OPCODE_MOV &&
2723 inst->dst.file == PROGRAM_TEMPORARY &&
2724 !inst->dst.reladdr &&
2726 !inst->src[0].reladdr &&
2727 !inst->src[0].negate) {
2728 for (int i = 0; i < 4; i++) {
2729 if (inst->dst.writemask & (1 << i)) {
2730 acp[4 * inst->dst.index + i] = inst;
2731 acp_level[4 * inst->dst.index + i] = level;
2737 ralloc_free(acp_level);
2743 * Convert a shader's GLSL IR into a Mesa gl_program.
2745 static struct gl_program *
2746 get_mesa_program(struct gl_context *ctx,
2747 struct gl_shader_program *shader_program,
2748 struct gl_shader *shader)
2750 ir_to_mesa_visitor v;
2751 struct prog_instruction *mesa_instructions, *mesa_inst;
2752 ir_instruction **mesa_instruction_annotation;
2754 struct gl_program *prog;
2756 const char *target_string;
2757 struct gl_shader_compiler_options *options =
2758 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
2760 switch (shader->Type) {
2761 case GL_VERTEX_SHADER:
2762 target = GL_VERTEX_PROGRAM_ARB;
2763 target_string = "vertex";
2765 case GL_FRAGMENT_SHADER:
2766 target = GL_FRAGMENT_PROGRAM_ARB;
2767 target_string = "fragment";
2769 case GL_GEOMETRY_SHADER:
2770 target = GL_GEOMETRY_PROGRAM_NV;
2771 target_string = "geometry";
2774 assert(!"should not be reached");
2778 validate_ir_tree(shader->ir);
2780 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
2783 prog->Parameters = _mesa_new_parameter_list();
2786 v.shader_program = shader_program;
2787 v.options = options;
2789 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
2792 /* Emit Mesa IR for main(). */
2793 visit_exec_list(shader->ir, &v);
2794 v.emit(NULL, OPCODE_END);
2796 prog->NumTemporaries = v.next_temp;
2798 int num_instructions = 0;
2799 foreach_iter(exec_list_iterator, iter, v.instructions) {
2804 (struct prog_instruction *)calloc(num_instructions,
2805 sizeof(*mesa_instructions));
2806 mesa_instruction_annotation = ralloc_array(v.mem_ctx, ir_instruction *,
2811 /* Convert ir_mesa_instructions into prog_instructions.
2813 mesa_inst = mesa_instructions;
2815 foreach_iter(exec_list_iterator, iter, v.instructions) {
2816 const ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
2818 mesa_inst->Opcode = inst->op;
2819 mesa_inst->CondUpdate = inst->cond_update;
2821 mesa_inst->SaturateMode = SATURATE_ZERO_ONE;
2822 mesa_inst->DstReg.File = inst->dst.file;
2823 mesa_inst->DstReg.Index = inst->dst.index;
2824 mesa_inst->DstReg.CondMask = inst->dst.cond_mask;
2825 mesa_inst->DstReg.WriteMask = inst->dst.writemask;
2826 mesa_inst->DstReg.RelAddr = inst->dst.reladdr != NULL;
2827 mesa_inst->SrcReg[0] = mesa_src_reg_from_ir_src_reg(inst->src[0]);
2828 mesa_inst->SrcReg[1] = mesa_src_reg_from_ir_src_reg(inst->src[1]);
2829 mesa_inst->SrcReg[2] = mesa_src_reg_from_ir_src_reg(inst->src[2]);
2830 mesa_inst->TexSrcUnit = inst->sampler;
2831 mesa_inst->TexSrcTarget = inst->tex_target;
2832 mesa_inst->TexShadow = inst->tex_shadow;
2833 mesa_instruction_annotation[i] = inst->ir;
2835 /* Set IndirectRegisterFiles. */
2836 if (mesa_inst->DstReg.RelAddr)
2837 prog->IndirectRegisterFiles |= 1 << mesa_inst->DstReg.File;
2839 /* Update program's bitmask of indirectly accessed register files */
2840 for (unsigned src = 0; src < 3; src++)
2841 if (mesa_inst->SrcReg[src].RelAddr)
2842 prog->IndirectRegisterFiles |= 1 << mesa_inst->SrcReg[src].File;
2844 switch (mesa_inst->Opcode) {
2846 if (options->MaxIfDepth == 0) {
2847 linker_warning(shader_program,
2848 "Couldn't flatten if-statement. "
2849 "This will likely result in software "
2850 "rasterization.\n");
2853 case OPCODE_BGNLOOP:
2854 if (options->EmitNoLoops) {
2855 linker_warning(shader_program,
2856 "Couldn't unroll loop. "
2857 "This will likely result in software "
2858 "rasterization.\n");
2862 if (options->EmitNoCont) {
2863 linker_warning(shader_program,
2864 "Couldn't lower continue-statement. "
2865 "This will likely result in software "
2866 "rasterization.\n");
2870 prog->NumAddressRegs = 1;
2879 if (!shader_program->LinkStatus)
2883 if (!shader_program->LinkStatus) {
2887 set_branchtargets(&v, mesa_instructions, num_instructions);
2889 if (ctx->Shader.Flags & GLSL_DUMP) {
2891 printf("GLSL IR for linked %s program %d:\n", target_string,
2892 shader_program->Name);
2893 _mesa_print_ir(shader->ir, NULL);
2896 printf("Mesa IR for linked %s program %d:\n", target_string,
2897 shader_program->Name);
2898 print_program(mesa_instructions, mesa_instruction_annotation,
2902 prog->Instructions = mesa_instructions;
2903 prog->NumInstructions = num_instructions;
2905 /* Setting this to NULL prevents a possible double free in the fail_exit
2908 mesa_instructions = NULL;
2910 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
2912 prog->SamplersUsed = shader->active_samplers;
2913 prog->ShadowSamplers = shader->shadow_samplers;
2914 _mesa_update_shader_textures_used(shader_program, prog);
2916 /* Set the gl_FragDepth layout. */
2917 if (target == GL_FRAGMENT_PROGRAM_ARB) {
2918 struct gl_fragment_program *fp = (struct gl_fragment_program *)prog;
2919 fp->FragDepthLayout = shader_program->FragDepthLayout;
2922 _mesa_reference_program(ctx, &shader->Program, prog);
2924 if ((ctx->Shader.Flags & GLSL_NO_OPT) == 0) {
2925 _mesa_optimize_program(ctx, prog);
2928 /* This has to be done last. Any operation that can cause
2929 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2930 * program constant) has to happen before creating this linkage.
2932 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
2933 if (!shader_program->LinkStatus) {
2940 free(mesa_instructions);
2941 _mesa_reference_program(ctx, &shader->Program, NULL);
2949 * Called via ctx->Driver.LinkShader()
2950 * This actually involves converting GLSL IR into Mesa gl_programs with
2951 * code lowering and other optimizations.
2954 _mesa_ir_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
2956 assert(prog->LinkStatus);
2958 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
2959 if (prog->_LinkedShaders[i] == NULL)
2963 exec_list *ir = prog->_LinkedShaders[i]->ir;
2964 const struct gl_shader_compiler_options *options =
2965 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
2971 do_mat_op_to_vec(ir);
2972 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2
2973 | LOG_TO_LOG2 | INT_DIV_TO_MUL_RCP
2974 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0)));
2976 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
2978 progress = do_common_optimization(ir, true, true,
2979 options->MaxUnrollIterations)
2982 progress = lower_quadop_vector(ir, true) || progress;
2984 if (options->MaxIfDepth == 0)
2985 progress = lower_discard(ir) || progress;
2987 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
2989 if (options->EmitNoNoise)
2990 progress = lower_noise(ir) || progress;
2992 /* If there are forms of indirect addressing that the driver
2993 * cannot handle, perform the lowering pass.
2995 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
2996 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
2998 lower_variable_index_to_cond_assign(ir,
2999 options->EmitNoIndirectInput,
3000 options->EmitNoIndirectOutput,
3001 options->EmitNoIndirectTemp,
3002 options->EmitNoIndirectUniform)
3005 progress = do_vec_index_to_cond_assign(ir) || progress;
3008 validate_ir_tree(ir);
3011 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
3012 struct gl_program *linked_prog;
3014 if (prog->_LinkedShaders[i] == NULL)
3017 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
3020 static const GLenum targets[] = {
3021 GL_VERTEX_PROGRAM_ARB,
3022 GL_FRAGMENT_PROGRAM_ARB,
3023 GL_GEOMETRY_PROGRAM_NV
3026 if (i == MESA_SHADER_VERTEX) {
3027 ((struct gl_vertex_program *)linked_prog)->UsesClipDistance
3028 = prog->Vert.UsesClipDistance;
3031 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
3033 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
3038 _mesa_reference_program(ctx, &linked_prog, NULL);
3041 return prog->LinkStatus;
3046 * Compile a GLSL shader. Called via glCompileShader().
3049 _mesa_glsl_compile_shader(struct gl_context *ctx, struct gl_shader *shader)
3051 struct _mesa_glsl_parse_state *state =
3052 new(shader) _mesa_glsl_parse_state(ctx, shader->Type, shader);
3054 const char *source = shader->Source;
3055 /* Check if the user called glCompileShader without first calling
3056 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3058 if (source == NULL) {
3059 shader->CompileStatus = GL_FALSE;
3063 state->error = preprocess(state, &source, &state->info_log,
3064 &ctx->Extensions, ctx->API);
3066 if (ctx->Shader.Flags & GLSL_DUMP) {
3067 printf("GLSL source for %s shader %d:\n",
3068 _mesa_glsl_shader_target_name(state->target), shader->Name);
3069 printf("%s\n", shader->Source);
3072 if (!state->error) {
3073 _mesa_glsl_lexer_ctor(state, source);
3074 _mesa_glsl_parse(state);
3075 _mesa_glsl_lexer_dtor(state);
3078 ralloc_free(shader->ir);
3079 shader->ir = new(shader) exec_list;
3080 if (!state->error && !state->translation_unit.is_empty())
3081 _mesa_ast_to_hir(shader->ir, state);
3083 if (!state->error && !shader->ir->is_empty()) {
3084 validate_ir_tree(shader->ir);
3086 /* Do some optimization at compile time to reduce shader IR size
3087 * and reduce later work if the same shader is linked multiple times
3089 while (do_common_optimization(shader->ir, false, false, 32))
3092 validate_ir_tree(shader->ir);
3095 shader->symbols = state->symbols;
3097 shader->CompileStatus = !state->error;
3098 shader->InfoLog = state->info_log;
3099 shader->Version = state->language_version;
3100 memcpy(shader->builtins_to_link, state->builtins_to_link,
3101 sizeof(shader->builtins_to_link[0]) * state->num_builtins_to_link);
3102 shader->num_builtins_to_link = state->num_builtins_to_link;
3104 if (ctx->Shader.Flags & GLSL_LOG) {
3105 _mesa_write_shader_to_file(shader);
3108 if (ctx->Shader.Flags & GLSL_DUMP) {
3109 if (shader->CompileStatus) {
3110 printf("GLSL IR for shader %d:\n", shader->Name);
3111 _mesa_print_ir(shader->ir, NULL);
3114 printf("GLSL shader %d failed to compile.\n", shader->Name);
3116 if (shader->InfoLog && shader->InfoLog[0] != 0) {
3117 printf("GLSL shader %d info log:\n", shader->Name);
3118 printf("%s\n", shader->InfoLog);
3122 /* Retain any live IR, but trash the rest. */
3123 reparent_ir(shader->ir, shader->ir);
3130 * Link a GLSL shader program. Called via glLinkProgram().
3133 _mesa_glsl_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
3137 _mesa_clear_shader_program_data(ctx, prog);
3139 prog->LinkStatus = GL_TRUE;
3141 for (i = 0; i < prog->NumShaders; i++) {
3142 if (!prog->Shaders[i]->CompileStatus) {
3143 linker_error(prog, "linking with uncompiled shader");
3144 prog->LinkStatus = GL_FALSE;
3148 if (prog->LinkStatus) {
3149 link_shaders(ctx, prog);
3152 if (prog->LinkStatus) {
3153 if (!ctx->Driver.LinkShader(ctx, prog)) {
3154 prog->LinkStatus = GL_FALSE;
3158 if (ctx->Shader.Flags & GLSL_DUMP) {
3159 if (!prog->LinkStatus) {
3160 printf("GLSL shader program %d failed to link\n", prog->Name);
3163 if (prog->InfoLog && prog->InfoLog[0] != 0) {
3164 printf("GLSL shader program %d info log:\n", prog->Name);
3165 printf("%s\n", prog->InfoLog);