Tizen 2.0 Release
[profile/ivi/osmesa.git] / src / mesa / drivers / dri / sis / sis_reg.h
1 /**************************************************************************
2
3 Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
4 Copyright 2003 Eric Anholt
5 All Rights Reserved.
6
7 Permission is hereby granted, free of charge, to any person obtaining a
8 copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sub license, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial portions
17 of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22 ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
23 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25 USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **************************************************************************/
28
29 /*
30  * Authors:
31  *   Sung-Ching Lin <sclin@sis.com.tw>
32  *   Eric Anholt <anholt@FreeBSD.org>
33  */
34
35 #ifndef _sis_reg_h_
36 #define _sis_reg_h_
37
38 /*
39  * Define All the Register Address of 6327
40  */
41 #define REG_SRC_ADDR                    0x8200
42 #define REG_SRC_PITCH                   0x8204
43 #       define BLIT_DEPTH_8             0x00000000
44 #       define BLIT_DEPTH_15            0x40000000
45 #       define BLIT_DEPTH_16            0x80000000
46 #       define BLIT_DEPTH_32            0xc0000000
47 #define REG_SRC_X_Y                     0x8208
48 #define REG_DST_X_Y                     0x820c
49 #define REG_DST_ADDR                    0x8210
50 #define REG_DST_PITCH_HEIGHT            0x8214
51 #define REG_WIDTH_HEIGHT                0x8218
52 #define REG_PATFG                       0x821c
53 #define REG_PATBG                       0x8220
54 #define REG_SRCFG                       0x8224
55 #define REG_SRCBG                       0x8228
56 #define REG_MONOPAT0                    0x822c
57 #define REG_MONOPAT1                    0x8230
58 #define REG_CLIPLT                      0x8234
59 #define REG_CLIPRB                      0x8238
60 #define REG_BLIT_CMD                    0x823c
61 #       define CMD_ROP_PAT              0x0000f000
62 #       define CMD_ROP_SRC              0x0000cc00
63 #       define CMD_DD_ENABLE            0x00000006
64 #       define CMD_SRC_VIDEO            0x00000000
65 #       define CMD_SRC_CPU              0x00000010
66 #       define CMD_DIR_X_DEC            0x00000000
67 #       define CMD_DIR_X_INC            0x00010000
68 #       define CMD_DIR_Y_DEC            0x00000000
69 #       define CMD_DIR_Y_INC            0x00020000
70
71 #define REG_CommandQueue                0x8240
72  
73 #define REG_3D_TSFSa                    0x8800
74 #define REG_3D_TSZa                     0x8804
75 #define REG_3D_TSXa                     0x8808
76 #define REG_3D_TSYa                     0x880C
77 #define REG_3D_TSARGBa                  0x8810
78 #define REG_3D_TSWGa                    0x8814
79 #define REG_3D_TSUAa                    0x8818
80 #define REG_3D_TSVAa                    0x881C
81 #define REG_3D_TSUBa                    0x8820
82 #define REG_3D_TSVBa                    0x8824
83 #define REG_3D_TSUCa                    0x8828
84 #define REG_3D_TSVCa                    0x882C
85
86 #define REG_3D_TSFSb                    0x8830
87 #define REG_3D_TSZb                     0x8834
88 #define REG_3D_TSXb                     0x8838
89 #define REG_3D_TSYb                     0x883C
90 #define REG_3D_TSARGBb                  0x8840
91 #define REG_3D_TSWGb                    0x8844
92 #define REG_3D_TSUAb                    0x8848
93 #define REG_3D_TSVAb                    0x884C
94 #define REG_3D_TSUBb                    0x8850
95 #define REG_3D_TSVBb                    0x8854
96 #define REG_3D_TSUCb                    0x8858
97 #define REG_3D_TSVCb                    0x885C
98
99 #define REG_3D_TSFSc                    0x8860
100 #define REG_3D_TSZc                     0x8864
101 #define REG_3D_TSXc                     0x8868
102 #define REG_3D_TSYc                     0x886C
103 #define REG_3D_TSARGBc                  0x8870
104 #define REG_3D_TSWGc                    0x8874
105 #define REG_3D_TSUAc                    0x8878
106 #define REG_3D_TSVAc                    0x887C
107 #define REG_3D_TSUBc                    0x8880
108 #define REG_3D_TSVBc                    0x8884
109 #define REG_3D_TSUCc                    0x8888
110 #define REG_3D_TSVCc                    0x888C
111
112 /*
113  * REG_3D_AGPCmdSetting (89e4h-89f7)
114  */
115 #define REG_3D_AGPCmBase                0x89E4
116 #define REG_3D_AGPRmDwNum               0x89E8
117 #define REG_3D_AGPTtDwNum               0x89EC
118 #define REG_3D_AGPCmFire                0x89F0
119
120 #define REG_3D_ParsingSet               0x89F4
121 #define REG_3D_PrimitiveSet             0x89F8
122 #define REG_3D_ShadeMode                0x89F8
123 #define REG_3D_EngineFire               0x89FC
124 #define REG_3D_EngineStatus             0x89FC
125 #define REG_3D_TEnable                  0x8A00
126 #define REG_3D_TEnable2                 0x8A04
127
128 #define REG_3D_ZSet                     0x8A08
129 #define REG_3D_ZBias                    0x8A0C
130 #define REG_3D_ZStWriteMask             0x8A10
131
132 #define REG_3D_ZAddress                 0x8A14
133 #define REG_3D_AlphaSet                 0x8A18
134 #define REG_3D_AlphaAddress             0x8A1C
135 #define REG_3D_DstSet                   0x8A20
136 #define REG_3D_DstAlphaWriteMask        0x8A24
137
138 #define REG_3D_DstAddress               0x8A28
139
140 #define REG_3D_LinePattern              0x8A2C
141
142 #define REG_3D_FogSet                   0x8A30
143
144 #define REG_3D_FogFarDistance           0x8A34
145 #define REG_3D_FogInverseDistance       0x8A38
146 #define REG_3D_FogFactorDensity         0x8A3C
147
148 #define REG_3D_StencilSet               0x8A44
149 #define REG_3D_StencilSet2              0x8A48
150 #define REG_3D_StencilAddress           0x8A4C
151
152 #define REG_3D_DstBlendMode             0x8A50
153 #define REG_3D_SrcBlendMode             0x8A50
154 #define REG_3D_ClipTopBottom            0x8A54
155 #define REG_3D_ClipLeftRight            0x8A58
156
157 #define REG_3D_Brightness               0x8A5C
158
159 #define REG_3D_BumpMapSet               0x8A68
160 #define REG_3D_BumpMapAddress           0x8A6C
161 #define REG_3D_BumpMapPitch             0x8A70
162 #define REG_3D_BumpMapMatrix0           0x8A74
163 #define REG_3D_BumpMapMatrix1           0x8A78
164
165 /*
166  * Define the Texture Register Address of 6326
167  */
168 #define REG_3D_TextureSet                     0x8A7C
169 #define REG_3D_TextureWidthHeight             0x8A7C
170 #define REG_3D_TextureMip                     0x8A80
171
172 #define REG_3D_TextureTransparencyColorHigh    0x8A84
173 #define REG_3D_TextureTransparencyColorLow     0x8A88
174 #define REG_3D_TextureBorderColor              0x8A8C
175 #define REG_3D_TextureAddress0                 0x8A90
176 #define REG_3D_TextureAddress1                 0x8A94
177 #define REG_3D_TextureAddress2                 0x8A98
178 #define REG_3D_TextureAddress3                 0x8A9C
179 #define REG_3D_TextureAddress4                 0x8AA0
180 #define REG_3D_TextureAddress5                 0x8AA4
181 #define REG_3D_TextureAddress6                 0x8AA8
182 #define REG_3D_TextureAddress7                 0x8AAC
183 #define REG_3D_TextureAddress8                 0x8AB0
184 #define REG_3D_TextureAddress9                 0x8AB4
185 #define REG_3D_TextureAddress10                0x8AB8
186 #define REG_3D_TextureAddress11                0x8ABC
187 #define REG_3D_TexturePitch0                   0x8AC0
188 #define REG_3D_TexturePitch1                   0x8AC0
189 #define REG_3D_TexturePitch2                   0x8AC4
190 #define REG_3D_TexturePitch3                   0x8AC4
191 #define REG_3D_TexturePitch4                   0x8AC8
192 #define REG_3D_TexturePitch5                   0x8AC8
193 #define REG_3D_TexturePitch6                   0x8ACC
194 #define REG_3D_TexturePitch7                   0x8ACC
195 #define REG_3D_TexturePitch8                   0x8AD0
196 #define REG_3D_TexturePitch9                   0x8AD0
197 #define REG_3D_TexturePitch10                  0x8AD4
198
199 #define REG_3D_Texture1Set                     0x8ADC
200 #define REG_3D_Texture1WidthHeight             0x8ADC
201 #define REG_3D_Texture1Mip                     0x8AE0
202
203 #define REG_3D_Texture1TransparencyColorHigh   0x8AE4
204 #define REG_3D_Texture1TransparencyColorLow    0x8AE8
205 #define REG_3D_Texture1BorderColor             0x8AEC
206 #define REG_3D_Texture1Address0                0x8AF0
207 #define REG_3D_Texture1Address1                0x8AF4
208 #define REG_3D_Texture1Address2                0x8AF8
209 #define REG_3D_Texture1Address3                0x8AFC
210 #define REG_3D_Texture1Address4                0x8B00
211 #define REG_3D_Texture1Address5                0x8B04
212 #define REG_3D_Texture1Address6                0x8B08
213 #define REG_3D_Texture1Address7                0x8B0C
214 #define REG_3D_Texture1Address8                0x8B10
215 #define REG_3D_Texture1Address9                0x8B14
216 #define REG_3D_Texture1Address10               0x8B18
217 #define REG_3D_Texture1Address11               0x8B1C
218 #define REG_3D_Texture1Pitch0                  0x8B20
219 #define REG_3D_Texture1Pitch1                  0x8B20
220 #define REG_3D_Texture1Pitch2                  0x8B24
221 #define REG_3D_Texture1Pitch3                  0x8B24
222 #define REG_3D_Texture1Pitch4                  0x8B28
223 #define REG_3D_Texture1Pitch5                  0x8B28
224 #define REG_3D_Texture1Pitch6                  0x8B2C
225 #define REG_3D_Texture1Pitch7                  0x8B2C
226 #define REG_3D_Texture1Pitch8                  0x8B30
227 #define REG_3D_Texture1Pitch9                  0x8B30
228 #define REG_3D_Texture1Pitch10                 0x8B34
229
230 #define REG_3D_TextureBlendFactor              0x8B3C
231 #define REG_3D_TextureColorBlendSet0           0x8B40
232 #define REG_3D_TextureColorBlendSet1           0x8B44
233 #define REG_3D_TextureAlphaBlendSet0           0x8B48
234 #define REG_3D_TextureAlphaBlendSet1           0x8B4C
235 /*
236  * Define the End of Primitive List of 6326
237  */
238 #define REG_3D_EndPrimitiveList                0X8B50
239
240
241 /*
242  * Define the Stipple Register Address of 6326
243  */
244 #define REG_3D_Stipple0                        0X8B60
245
246 #define REG_3D_TexturePalette                  0x8C00
247
248 /*
249  * REG_CommandQueue -- (8240h-8243h)
250  */
251 #define MASK_QueueLen                           0x0000ffff
252 #define SiS_EngIdle2d                           0x80000000
253 #define SiS_EngIdle                             0xe0000000
254 #define MASK_EngState                           0xf0000000
255
256 /*
257  * REG_3D_ParsingSet -- Define Parsing Mask (89F4h-89F7h)
258  */
259 #define MASK_VertexDWSize                       0xf0000000
260 #define MASK_VertexDataFormat                   0x0fff0000
261 /* Because the original MASK_PsVertex_* names of these bits appared to be
262  * wrong, new names SiS_PS_* based off of the 4.3.0 driver and research are
263  * below.
264  */
265 #define SiS_PS_HAS_XYZ                          MASK_PsVertex_HAS_RHW
266 #define SiS_PS_HAS_W                            MASK_PsVertex_HAS_NORMALXYZ
267 #define SiS_PS_HAS_DIFFUSE                      MASK_PsVertex_HAS_SPECULAR
268 #define SiS_PS_HAS_SPECULAR                     MASK_PsVertex_HAS_DIFFUSE
269 #define SiS_PS_HAS_UV0                          MASK_PsVertex_HAS_UVSet2
270 #define SiS_PS_HAS_UV1                          MASK_PsVertex_HAS_UVSet3
271 #define MASK_PsVertex_HAS_RHW                   0x08000000
272 #define MASK_PsVertex_HAS_NORMALXYZ             0x04000000
273 #define MASK_PsVertex_HAS_DIFFUSE               0x02000000
274 #define MASK_PsVertex_HAS_SPECULAR              0x01000000
275 #define MASK_PsUVSet                            0x00ff0000
276 #define MASK_PsVertex_HAS_1SetUV                0x00800000
277 #define MASK_PsVertex_HAS_2SetUV                0x00c00000
278 #define MASK_PsVertex_HAS_3SetUV                0x00e00000
279 #define MASK_PsVertex_HAS_UVSet1                0x00800000
280 #define MASK_PsVertex_HAS_UVSet2                0x00400000
281 #define MASK_PsVertex_HAS_UVSet3                0x00200000
282 #define MASK_PsCullDirection_CCW                0x00008000
283 #define MASK_PsShadingMode                      0x00007000
284 /* XXX Shading modes just a guess, but seem to work*/
285 #define MASK_PsShadingFlatA                     0x00001000
286 #define MASK_PsShadingFlatB                     0x00002000
287 #define MASK_PsShadingFlatC                     0x00003000
288 #define MASK_PsShadingSmooth                    0x00004000
289 #define MASK_PsTextureFrom                      0x000003f0
290 #define MASK_PsTexture0FromA                    0x00000000
291 #define MASK_PsTexture1FromA                    0x00000000
292 #define MASK_PsTexture1FromB                    0x00000040
293 #define MASK_PsBumpTextureFromA                 0x00000000
294 #define MASK_PsBumpTextureFromB                 0x00000010
295 #define MASK_PsBumpTextureFromC                 0x00000020
296 #define MASK_PsDataType                         0x0000000f
297 #define MASK_PsPointList                        0x00000000
298 #define MASK_PsLineList                         0x00000004
299 #define MASK_PsLineStrip                        0x00000005
300 #define MASK_PsTriangleList                     0x00000008
301 #define MASK_PsTriangleStrip                    0x00000009
302 #define MASK_PsTriangleFan                      0x0000000a
303
304 /*
305  * REG_3D_PrimitiveSet -- Define Fire Primitive Mask (89F8h-89FBh)
306  */
307 #define MASK_DrawPrimitiveCommand       0x00000007
308 #define MASK_SetFirePosition            0x00001F00
309 #define MASK_BumpTextureFrom            0x00030000
310 #define MASK_Texture1From               0x000C0000
311 #define MASK_Texture0From               0x00300000
312 #define MASK_ShadingMode                0x07000000
313 #define MASK_CullDirection              0x08000000
314
315 #define OP_3D_POINT_DRAW                0x00000000
316 #define OP_3D_LINE_DRAW                 0x00000001
317 #define OP_3D_TRIANGLE_DRAW             0x00000002
318
319 #define OP_3D_DIRECTION_RIGHT           0x00000000
320 #define OP_3D_DIRECTION_LEFT            0x00000100
321 #define OP_3D_DIRECTION_HORIZONTAL      0x00000000
322 #define OP_3D_DIRECTION_VERTICAL        0x00000100
323
324 #define OP_3D_FIRE_TFIRE                0x00000000
325 #define OP_3D_FIRE_TSARGBa              0x00000100
326 #define OP_3D_FIRE_TSWa                 0x00000200
327 #define OP_3D_FIRE_TSVAa                0x00000300
328 #define OP_3D_FIRE_TSVBa                0x00000400
329 #define OP_3D_FIRE_TSVCa                0x00000500
330
331 #define OP_3D_FIRE_TSARGBb              0x00000900
332 #define OP_3D_FIRE_TSWb                 0x00000a00
333 #define OP_3D_FIRE_TSVAb                0x00000b00
334 #define OP_3D_FIRE_TSVBb                0x00000c00
335 #define OP_3D_FIRE_TSVCb                0x00000d00
336
337 #define OP_3D_FIRE_TSARGBc              0x00001100
338 #define OP_3D_FIRE_TSWc                 0x00001200
339 #define OP_3D_FIRE_TSVAc                0x00001300
340 #define OP_3D_FIRE_TSVBc                0x00001400
341 #define OP_3D_FIRE_TSVCc                0x00001500
342
343 #define OP_3D_Texture0FromA             0x00000000
344 #define OP_3D_Texture0FromB             0x00100000
345 #define OP_3D_Texture0FromC             0x00200000
346 #define OP_3D_Texture1FromA             0x00000000
347 #define OP_3D_Texture1FromB             0x00040000
348 #define OP_3D_Texture1FromC             0x00080000
349 #define OP_3D_TextureBumpFromA          0x00000000
350 #define OP_3D_TextureBumpFromB          0x00010000
351 #define OP_3D_TextureBumpFromC          0x00020000
352
353 #define OP_3D_CullDirection_CCW         0x08000000
354
355 #define SHADE_FLAT_VertexA              0x01000000
356 #define SHADE_FLAT_VertexB              0x02000000
357 #define SHADE_FLAT_VertexC              0x03000000
358 #define SHADE_GOURAUD                   0x04000000
359
360 /*
361  *           Define Command Queue Length Mask (89FCh-89FF)
362  */
363 #define MASK_CmdQueueLen                0x0FFF0000
364
365 /*
366  * REG_3D_TEnable -- Define Capility Enable Mask (8A00h-8A03h)
367  */
368 #define MASK_DitherEnable               0x00000001
369 #define MASK_BlendEnable                0x00000002
370 #define MASK_FogTestEnable              0x00000004
371 #define MASK_FogEnable                  0x00000008
372 #define MASK_SpecularEnable             0x00000010
373 #define MASK_FogPerspectiveEnable      0x00000020
374 #define MASK_TextureCacheClear          0x00000040
375 #define MASK_TextureCacheEnable         0x00000080
376 #define MASK_BumpMapEnable              0x00000100
377 #define MASK_TexturePerspectiveEnable   0x00000200
378 #define MASK_TextureEnable              0x00000400
379 #define MASK_CullEnable                 0x00000800
380 #define MASK_TextureNumUsed             0x0000F000
381 #define MASK_AlphaBufferEnable          0x00010000
382 #define MASK_AlphaTestEnable            0x00020000
383 #define MASK_AlphaWriteEnable           0x00040000
384 #define MASK_ZTestEnable                0x00080000
385 #define MASK_ZWriteEnable               0x00100000
386 #define MASK_StencilBufferEnable        0x00200000
387 #define MASK_StencilTestEnable          0x00400000
388 #define MASK_StencilWriteEnable         0x00800000
389 #define MASK_Texture0TransparencyEnable 0x01000000
390 #define MASK_Texture1TransparencyEnable 0x02000000
391 #define MASK_TextureAWrapUCorrection    0x04000000
392 #define MASK_TextureAWrapVCorrection    0x08000000
393 #define MASK_TextureBWrapUCorrection    0x10000000
394 #define MASK_TextureBWrapVCorrection    0x20000000
395 #define MASK_TextureCWrapUCorrection    0x40000000
396 #define MASK_TextureCWrapVCorrection    0x80000000
397
398 /*
399  * REG_3D_TEnable2 -- Define Capility Enable Mask2 (8A04h-8A07h)
400  */
401 #define MASK_Texture0BlockTextureEnable 0x00000001
402 #define MASK_Texture1BlockTextureEnable 0x00000002
403 #define MASK_Texture0AnisotropicEnable  0x00000010
404 #define MASK_Texture1AnisotropicEnable  0x00000020
405 #define MASK_TextureMipmapBiasEnable    0x00000040
406 #define MASK_LinePatternEnable          0x00000100
407 #define MASK_StippleAlphaEnable         0x00000200
408 #define MASK_StippleEnable              0x00000400
409 #define MASK_AntiAliasEnable            0x00000800
410 #define MASK_ZMaskWriteEnable           0x00001000
411 #define MASK_StencilMaskWriteEnable     0x00002000
412 #define MASK_AlphaMaskWriteEnable       0x00004000
413 #define MASK_ColorMaskWriteEnable       0x00008000
414 #define MASK_ZCacheClear                0x00010000
415 #define MASK_ZCacheEnable               0x00020000
416 #define MASK_StencilCacheClear          0x00040000
417 #define MASK_StencilCacheEnable         0x00080000
418 #define MASK_AlphaCacheClear            0x00100000
419 #define MASK_AlphaCacheEnable           0x00200000
420 #define MASK_ColorCacheClear            0x00400000
421 #define MASK_ColorCacheEnable           0x00800000
422
423 /*
424  * REG_3D_ZSet -- Define Z Buffer Setting Mask (8A08h-8A0Bh)
425  */
426 #define MASK_ZBufferPitch               0x00000FFF
427 #define MASK_ZTestMode                  0x00070000
428 #define MASK_ZBufferInSystem            0x00080000
429 #define MASK_ZBufferFormat              0x01F00000
430
431 #define SiS_Z_COMP_NEVER                0x00000000
432 #define SiS_Z_COMP_S_LT_B               0x00010000
433 #define SiS_Z_COMP_S_EQ_B               0x00020000
434 #define SiS_Z_COMP_S_LE_B               0x00030000
435 #define SiS_Z_COMP_S_GT_B               0x00040000
436 #define SiS_Z_COMP_S_NE_B               0x00050000
437 #define SiS_Z_COMP_S_GE_B               0x00060000
438 #define SiS_Z_COMP_ALWAYS               0x00070000
439
440 #define SiS_ZFORMAT_Z16                 0x00000000
441 #define SiS_ZFORMAT_Z16_INT             0x00100000
442 #define SiS_ZFORMAT_S1Z15               0x00400000
443 #define SiS_ZFORMAT_S1Z15_INT           0x00500000
444 #define SiS_ZFORMAT_Z32                 0x00800000
445 #define SiS_ZFORMAT_S1Z31               0x00C00000
446 #define SiS_ZFORMAT_S2Z30               0x00D00000
447 #define SiS_ZFORMAT_S4Z28               0x00E00000
448 #define SiS_ZFORMAT_S8Z24               0x00F00000
449 #define SiS_ZFORMAT_FZ30                0x01800000
450 #define SiS_ZFORMAT_FS1Z30              0x01C00000
451 #define SiS_ZFORMAT_FS2Z30              0x01D00000
452
453 /*
454  * REG_3D_ZBias -- Define Z Buffer Setting Mask (8A0Ch-8A0Fh)
455  */
456 #define MASK_ZBias                      0xFFFFFFFF
457
458 /*
459  * REG_3D_ZStWriteMask -- Define Z and Stencil Buffer Mask (8A10h-8A13h)
460  */
461 #define MASK_ZWriteMask                 0x00FFFFFF
462
463 /*
464  * REG_3D_ZAddress -- Define Z Buffer Base Address(8A14h-8A17h)
465  */
466 #define MASK_ZAddress                   0xFFFFFFFF
467
468 /*
469  * REG_3D_AlphaSet -- Define Alpha Buffer Setting Mask (8A18h-8A1Bh)
470  */
471 #define MASK_AlphaBufferPitch           0x000003FF
472 #define MASK_AlphaRefValue              0x00FF0000
473 #define MASK_AlphaTestMode              0x07000000
474 #define MASK_AlphaBufferInSystem        0x08000000
475 #define MASK_AlphaBufferFormat          0x30000000
476
477 #define SiS_ALPHA_NEVER                 0x00000000
478 #define SiS_ALPHA_LESS                  0x01000000
479 #define SiS_ALPHA_EQUAL                 0x02000000
480 #define SiS_ALPHA_LEQUAL                0x03000000
481 #define SiS_ALPHA_GREATER               0x04000000
482 #define SiS_ALPHA_NOTEQUAL              0x05000000
483 #define SiS_ALPHA_GEQUAL                0x06000000
484 #define SiS_ALPHA_ALWAYS                0x07000000
485
486 /*
487  * REG_3D_AlphaAddress -- Define Alpha Buffer Base Address(8A1Ch-8A1Fh)
488  */
489 #define MASK_AlphaAddress               0xFFFFFFFF
490
491 /*
492  * REG_3D_DstSet -- Define Destination Buffer Setting Mask (8A20h-8A23h)
493  */
494 #define MASK_DstBufferPitch             0x00000FFF
495 #define MASK_DstBufferFormat            0x000F0000
496 #define MASK_DstBufferBitDepth          0x00300000
497 #define MASK_DstBufferRgbOrder          0x00400000
498 #define MASK_DstBufferInSystem          0x00800000
499 #define MASK_Dst7BitFormat              0x007F0000
500 #define MASK_ROP2                       0x0F000000
501
502 #define DST_FORMAT_RGB_555              0x00100000
503 #define DST_FORMAT_RGB_565              0x00110000
504 #define DST_FORMAT_ARGB_1555            0x00120000
505 #define DST_FORMAT_ARGB_4444            0x00130000
506 #define DST_FORMAT_ARGB_1888            0x00300000
507 #define DST_FORMAT_ARGB_2888            0x00310000
508 #define DST_FORMAT_ARGB_4888            0x00320000
509 #define DST_FORMAT_ARGB_8888            0x00330000
510 #define DST_FORMAT_ARGB_0888            0x00340000
511
512 #define DST_FORMAT_BGR_555              0x00500000
513 #define DST_FORMAT_BGR_565              0x00510000
514 #define DST_FORMAT_ABGR_1555            0x00520000
515 #define DST_FORMAT_ABGR_4444            0x00530000
516 #define DST_FORMAT_ABGR_1888            0x00700000
517 #define DST_FORMAT_ABGR_2888            0x00710000
518 #define DST_FORMAT_ABGR_4888            0x00720000
519 #define DST_FORMAT_ABGR_8888            0x00730000
520 #define DST_FORMAT_ABGR_0888            0x00740000
521
522 #define LOP_CLEAR                       0x00000000
523 #define LOP_NOR                         0x01000000
524 #define LOP_AND_INVERTED                0x02000000
525 #define LOP_COPY_INVERTED               0x03000000
526 #define LOP_AND_REVERSE                 0x04000000
527 #define LOP_INVERT                      0x05000000
528 #define LOP_XOR                         0x06000000
529 #define LOP_NAND                        0x07000000
530 #define LOP_AND                         0x08000000
531 #define LOP_EQUIV                       0x09000000
532 #define LOP_NOOP                        0x0a000000
533 #define LOP_OR_INVERTED                 0x0b000000
534 #define LOP_COPY                        0x0c000000
535 #define LOP_OR_REVERSE                  0x0d000000
536 #define LOP_OR                          0x0e000000
537 #define LOP_SET                         0x0f000000
538
539 /*
540  * REG_3D_DstAlphaWriteMask -- Define Destination/Alpha  Buffer Write Mask (8A24h-8A27h)
541  */
542 #define MASK_ColorWriteMask             0x00FFFFFF
543 #define MASK_AlphaWriteMask             0xFF000000
544
545 /*
546  * REG_3D_DstAddress -- Define Destination Buffer Base Address(8A1Ch-8A1Fh)
547  */
548 #define MASK_DstAddress                 0xFFFFFFFF
549
550 /*
551  * REG_3D_LinePattern -- Define Line Pattern (8A2Ch-8A2Fh)
552  */
553 #define MASK_LinePatternRepeatFactor    0x00007FFF
554 #define MASK_LinePatternLastPixelFlag   0x00008000
555 #define MASK_LinePattern                0xFFFF0000
556
557 /*
558  * REG_3D_FogSet -- Define Fog Mask (8A30h-8A33h)
559  */
560 #define MASK_FogColor                   0x00FFFFFF
561 #define MASK_FogMode                    0x07000000
562 #define MASK_FogZLookup                 0x08000000
563
564 #define FOGMODE_CHEAP                   0x04000000
565 #define FOGMODE_LINEAR                  0x05000000
566 #define FOGMODE_EXP                     0x06000000
567 #define FOGMODE_EXP2                    0x07000000
568
569 /*
570  * REG_3D_FogStartEnd -- Define Fog Start End Setting   (0x8A34 - 0x8A37)
571  */
572 #define MASK_FogFarDistance             0x0007FFFF
573
574 /*
575  * REG_3D_FogStartEnd -- Define Fog End Setting         (0x8A38 - 0x8A3B)
576  */
577 #define MASK_FogInvFarDistance          0x0007FFFF
578
579 /*
580  * REG_3D_FogFactorDensity              (0x8A3C - 0x8A3F)
581  */
582 #define MASK_FogDensity                 0x0003FFFF
583 #define MASK_FogFactor                  0xFF000000
584
585 /*
586  * REG_3D_StencilSet -- Define stencil test (8A44h-8A47h)
587  */
588 #define MASK_StencilValueMask           0x000000ff
589 #define MASK_StencilRefMask             0x0000ff00
590 #define MASK_StencilTestMode            0x07000000
591 #define MASK_StencilBufferInSystem      0x08000000
592 #define MASK_StencilFormat              0x30000000
593
594 #define SiS_STENCIL_NEVER               0x00000000
595 #define SiS_STENCIL_LESS                0x01000000
596 #define SiS_STENCIL_EQUAL               0x02000000
597 #define SiS_STENCIL_LEQUAL              0x03000000
598 #define SiS_STENCIL_GREATER             0x04000000
599 #define SiS_STENCIL_NOTEQUAL            0x05000000
600 #define SiS_STENCIL_GEQUAL              0x06000000
601 #define SiS_STENCIL_ALWAYS              0x07000000
602
603 #define STENCIL_FORMAT_1                0x00000000
604 #define STENCIL_FORMAT_2                0x10000000
605 #define STENCIL_FORMAT_4                0x20000000
606 #define STENCIL_FORMAT_8                0x30000000
607
608 /*
609  * REG_3D_StencilSet2 -- Define stencil test (8A4h-8A47h)
610  */
611 #define MASK_StencilBufferPitch         0x00000FFF
612 #define MASK_StencilZPassOp             0x00007000
613 #define MASK_StencilZFailOp             0x00070000
614 #define MASK_StencilFailOp              0x00700000
615 #define MASK_StencilWriteMask           0xFF000000
616
617 #define SiS_SFAIL_KEEP                  0x00000000
618 #define SiS_SFAIL_ZERO                  0x00100000
619 #define SiS_SFAIL_REPLACE               0x00200000
620 #define SiS_SFAIL_INCR                  0x00300000      /* guess -- was _WRAP */
621 #define SiS_SFAIL_DECR                  0x00400000      /* guess -- was _WRAP */
622 #define SiS_SFAIL_INVERT                0x00500000
623 #define SiS_SFAIL_INCR_WRAP             0x00600000      /* guess */
624 #define SiS_SFAIL_DECR_WRAP             0x00700000      /* guess */
625
626 #define SiS_SPASS_ZFAIL_KEEP            0x00000000
627 #define SiS_SPASS_ZFAIL_ZERO            0x00010000
628 #define SiS_SPASS_ZFAIL_REPLACE         0x00020000
629 #define SiS_SPASS_ZFAIL_INCR            0x00030000      /* guess -- was _WRAP */
630 #define SiS_SPASS_ZFAIL_DECR            0x00040000      /* guess -- was _WRAP */
631 #define SiS_SPASS_ZFAIL_INVERT          0x00050000
632 #define SiS_SPASS_ZFAIL_INCR_WRAP       0x00060000      /* guess */
633 #define SiS_SPASS_ZFAIL_DECR_WRAP       0x00070000      /* guess */
634
635 #define SiS_SPASS_ZPASS_KEEP            0x00000000
636 #define SiS_SPASS_ZPASS_ZERO            0x00001000
637 #define SiS_SPASS_ZPASS_REPLACE         0x00002000
638 #define SiS_SPASS_ZPASS_INCR            0x00003000      /* guess -- was _WRAP */
639 #define SiS_SPASS_ZPASS_DECR            0x00004000      /* guess -- was _WRAP */
640 #define SiS_SPASS_ZPASS_INVERT          0x00005000
641 #define SiS_SPASS_ZPASS_INCR_WRAP       0x00006000      /* guess */
642 #define SiS_SPASS_ZPASS_DECR_WRAP       0x00007000      /* guess */
643
644 /*
645  * REG_3D_DstBlendMode                  (0x8A50 - 0x8A53)
646  */
647 #define MASK_SrcBlendMode               0x0000000F
648 #define MASK_DstBlendMode               0x000000F0
649
650 #define SiS_D_ZERO                      0x00000000
651 #define SiS_D_ONE                       0x00000010
652 #define SiS_D_SRC_COLOR                 0x00000020
653 #define SiS_D_ONE_MINUS_SRC_COLOR       0x00000030
654 #define SiS_D_SRC_ALPHA                 0x00000040
655 #define SiS_D_ONE_MINUS_SRC_ALPHA       0x00000050
656 #define SiS_D_DST_ALPHA                 0x00000060
657 #define SiS_D_ONE_MINUS_DST_ALPHA       0x00000070
658 #define SiS_D_DST_COLOR                 0x00000080
659 #define SiS_D_ONE_MINUS_DST_COLOR       0x00000090
660 #define SiS_D_SRC_ALPHA_SAT             0x000000a0
661
662 #define SiS_S_ZERO                      0x00000000
663 #define SiS_S_ONE                       0x00000001
664 #define SiS_S_SRC_COLOR                 0x00000002
665 #define SiS_S_ONE_MINUS_SRC_COLOR       0x00000003
666 #define SiS_S_SRC_ALPHA                 0x00000004
667 #define SiS_S_ONE_MINUS_SRC_ALPHA       0x00000005
668 #define SiS_S_DST_ALPHA                 0x00000006
669 #define SiS_S_ONE_MINUS_DST_ALPHA       0x00000007
670 #define SiS_S_DST_COLOR                 0x00000008
671 #define SiS_S_ONE_MINUS_DST_COLOR       0x00000009
672 #define SiS_S_SRC_ALPHA_SATURATE        0x0000000a
673 #define SiS_S_BOTH_SRC_ALPHA            0x0000000b
674 #define SiS_S_BOTH_ONE_MINUS_SRC_ALPHA  0x0000000c
675
676 /*
677  * REG_3D_ClipTopBottom                 (0x8A54 - 0x8A57)
678  */
679 #define MASK_BottomClip                 0x00001FFF
680 #define MASK_TopClip                    0x03FFE000
681
682 /*
683  * REG_3D_ClipLeftRight                 (0x8A58 - 0x8A5B)
684  */
685 #define MASK_RightClip                  0x00001FFF
686 #define MASK_LeftClip                   0x03FFE000
687
688 /* 
689  * REG_3D_TextureSet                    (0x8A7C - 0x8A7F)
690  * REG_3D_Texture1Set                   (0x8ADC - 0x8ADF)
691  */
692 #define MASK_TextureHeight              0x0000000F
693 #define MASK_TextureWidth               0x000000F0
694 #define MASK_TextureLevel               0x00000F00
695 #define MASK_TextureSignYUVFormat       0x00001000
696 #define MASK_TextureMappingMode         0x00FF0000
697 #define MASK_TextureWrapU               0x00010000
698 #define MASK_TextureWrapV               0x00020000
699 #define MASK_TextureMirrorU             0x00040000
700 #define MASK_TextureMirrorV             0x00080000
701 #define MASK_TextureClampU              0x00100000
702 #define MASK_TextureClampV              0x00200000
703 #define MASK_TextureBorderU             0x00400000
704 #define MASK_TextureBorderV             0x00800000
705 #define MASK_TextureFormat              0xFF000000
706 #define MASK_TextureBitDepth            0x70000000
707 #define MASK_TextureRgbOrder            0x80000000
708
709 #define TEXEL_INDEX1                    0x00000000
710 #define TEXEL_INDEX2                    0x01000000
711 #define TEXEL_INDEX4                    0x02000000
712 #define TEXEL_INDEX8                    0x03000000
713
714 #define TEXEL_INDEX1WithAlpha           0x04000000
715 #define TEXEL_INDEX2WithAlpha           0x05000000
716 #define TEXEL_INDEX4WithAlpha           0x06000000
717 #define TEXEL_INDEX8WithAlpha           0x07000000
718
719 #define TEXEL_I1                        0x10000000
720 #define TEXEL_I2                        0x11000000
721 #define TEXEL_I4                        0x12000000
722 #define TEXEL_I8                        0x13000000
723
724 #define TEXEL_DXT1                      0x19000000
725 #define TEXEL_DXT2                      0x1A000000
726 #define TEXEL_DXT3                      0x1B000000
727
728 #define TEXEL_YUV422                    0x20000000
729 #define TEXEL_YVU422                    0x21000000
730 #define TEXEL_UVY422                    0x22000000
731 #define TEXEL_VUY422                    0x23000000
732 #define TEXEL_YUV411                    0x24000000
733
734 #define TEXEL_L1                        0x30000000
735 #define TEXEL_L2                        0x31000000
736 #define TEXEL_L4                        0x32000000
737 #define TEXEL_L8                        0x33000000
738
739 #define TEXEL_AL11                      0x34000000
740 #define TEXEL_AL44                      0x35000000
741 #define TEXEL_AL26                      0x37000000
742 #define TEXEL_AL88                      0x38000000
743
744 #define TEXEL_A1                        0x40000000
745 #define TEXEL_A2                        0x41000000
746 #define TEXEL_A4                        0x42000000
747 #define TEXEL_A8                        0x43000000
748
749 #define TEXEL_RGB_332_8                 0x50000000
750 #define TEXEL_RGB_233_8                 0x51000000
751 #define TEXEL_RGB_232_8                 0x52000000
752 #define TEXEL_ARGB_1232_8               0x53000000
753 #define TEXEL_ARGB_2222_8               0x54000000
754
755 #define TEXEL_RGB_555_16                0x60000000
756 #define TEXEL_RGB_565_16                0x61000000
757 #define TEXEL_ARGB_1555_16              0x62000000
758 #define TEXEL_ARGB_4444_16              0x63000000
759
760 #define TEXEL_ARGB_1888_32              0x70000000
761 #define TEXEL_ARGB_2888_32              0x71000000
762 #define TEXEL_ARGB_4888_32              0x72000000
763 #define TEXEL_ARGB_8888_32              0x73000000
764 #define TEXEL_ARGB_0888_32              0x74000000
765
766 #define TEXEL_BGR_332_8                 0xD0000000
767 #define TEXEL_BGR_233_8                 0xD1000000
768 #define TEXEL_BGR_232_8                 0xD2000000
769 #define TEXEL_ABGR_1232_8               0xD3000000
770 #define TEXEL_ABGR_2222_8               0xD4000000
771
772 #define TEXEL_BGR_555_16                0xE0000000
773 #define TEXEL_BGR_565_16                0xE1000000
774 #define TEXEL_ABGR_1555_16              0xE2000000
775 #define TEXEL_ABGR_4444_16              0xE3000000
776
777 #define TEXEL_ABGR_1888_32              0xF0000000
778 #define TEXEL_ABGR_2888_32              0xF1000000
779 #define TEXEL_ABGR_4888_32              0xF2000000
780 #define TEXEL_ABGR_8888_32              0xF3000000
781 #define TEXEL_ABGR_0888_32              0xF4000000
782
783 #define TEXEL_VU88                      0x00000000
784 #define TEXEL_LVU655                    0x00800000
785 #define TEXEL_LVU888                    0x01000000
786 #define TEXEL_UV88                      0x02000000
787 #define TEXEL_LUV655                    0x02800000
788 #define TEXEL_LUV888                    0x03000000
789
790 /* 
791  * REG_3D_TextureMip                    (0x8A80 - 0x8A83)
792  * REG_3D_Texture1Mip                   (0x8AE0 - 0x8AE3)
793  */
794 #define MASK_TextureAnisotropyRatio     0x0000000F
795 #define MASK_TextureMipmapLodBias       0x00003FF0
796 #define MASK_TextureFilterMin           0x0001C000
797 #define MASK_TextureFilterMag           0x00020000
798 #define MASK_TextureFilter              0x0003C000
799 #define MASK_TextureLevelInSystem       0x3FFC0000
800 #define MASK_TextureLevel0InSystem      0x00040000
801 #define MASK_TextureBlockLength         0xF0000000
802
803 #define TEXTURE_FILTER_NEAREST                  0x00000000
804 #define TEXTURE_FILTER_LINEAR                   0x00004000
805 #define TEXTURE_FILTER_NEAREST_MIP_NEAREST      0x00008000
806 #define TEXTURE_FILTER_NEAREST_MIP_LINEAR       0x00010000
807 #define TEXTURE_FILTER_LINEAR_MIP_NEAREST       0x0000c000
808 #define TEXTURE_FILTER_LINEAR_MIP_LINEAR        0x00014000
809
810 /* 
811  * REG_3D_TextureTransparencyColorHigh  (0x8A84 - 0x8A87)
812  * REG_3D_Texture1TransparencyColorHigh (0x8AE4 - 0x8AE7)
813  */
814 #define MASK_TextureTransparencyColorHighB      0x000000FF
815 #define MASK_TextureTransparencyColorHighG      0x0000FF00
816 #define MASK_TextureTransparencyColorHighR      0x00FF0000
817 #define MASK_TextureAlphaTransparencyMode       0x08000000
818
819 /* 
820  * REG_3D_TextureTransparencyColorLow   (0x8A88 - 0x8A8B)
821  * REG_3D_Texture1TransparencyColorLow  (0x8AE8 - 0x8AEB)
822  */
823 #define MASK_TextureTransparencyColorLowB       0x000000FF
824 #define MASK_TextureTransparencyColorLowG       0x0000FF00
825 #define MASK_TextureTransparencyColorLowR       0x00FF0000
826 #define MASK_TextureBlockHeight                 0x07000000
827 #define MASK_TextureBlockWidth                  0x70000000
828
829 /* 
830  * REG_3D_TextureTransparencyColorLow   (0x8A8C - 0x8A8F)
831  * REG_3D_Texture1TransparencyColorLow  (0x8AEC - 0x8AEF)
832  */
833 #define MASK_TextureBorderColorB       0x000000FF
834 #define MASK_TextureBorderColorG       0x0000FF00
835 #define MASK_TextureBorderColorR       0x00FF0000
836 #define MASK_TextureBorderColorA       0xFF000000
837
838 /*
839  * REG_3D_TexturePitch0-10              (0x8AC0 - 0x8AD7)
840  * REG_3D_Texture1Pitch0-10             (0x8B20 - 0x8B37)
841  */
842 #define MASK_TexturePitchOdd            0x000003FF
843 #define MASK_TexturePitchEven           0x03FF0000
844 #define SHIFT_TexturePitchEven          16
845
846 /*
847  * REG_3D_TextureColorBlendSet0         (0x8B40 - 0x8B43)
848  * REG_3D_TextureColorBlendSet1         (0x8B44 - 0x8B46)
849  * REG_3D_TextureAlphaBlendSet0         (0x8B40 - 0x8B43)
850  * REG_3D_TextureAlphaBlendSet1         (0x8B44 - 0x8B46)
851  */
852 #define STAGE0_C_CF                     0xa1485000
853 #define STAGE0_C_CS                     0xc1485000
854 #define STAGE0_C_CFCS                   0xa1705000
855 #define STAGE0_C_CFOMAS_CSAS            0xc534c001
856 #define STAGE0_C_CFOMCS_CCCS            0x4530c001
857
858 #define STAGE0_A_AF                     0x63230000
859 #define STAGE0_A_AS                     0xc3230000
860 #define STAGE0_A_AFAS                   0x63c30000
861 #define STAGE0_A_AFOMAS_ACAS            0x46c60001
862
863 #define STAGE1_C_CF                     0xa1485000
864 #define STAGE1_C_CS                     0xe1485000
865 #define STAGE1_C_CFCS                   0xa1785000
866 #define STAGE1_C_CFOMAS_CSAS            0xe5394001
867 #define STAGE1_C_CFOMCS_CCCS            0x45394001
868
869 #define STAGE1_A_AF                     0xa3230000
870 #define STAGE1_A_AS                     0xe3230000
871 #define STAGE1_A_AFAS                   0xa3e30000
872 #define STAGE1_A_AFOMAS_ACAS            0x4aea0001
873
874 /* What registers are these associated with? */
875 #define MASK_BMMemoryInSystem           0x00000080
876 #define MASK_BMHeight                   0x00000F00
877 #define MASK_BMWidth                    0x0000F000
878 #define MASK_BMFilter                   0x00010000
879 #define MASK_BMMappingMode              0x007E0000
880 #define MASK_BMFormat                   0x07800000
881 #define MASK_BMTxBumpmap                0x08000000
882
883 #define MASK_BMAddress                  0xFFFFFFFC
884
885 #define MASK_BMOffset                   0xFF800000
886 #define MASK_BMScale                    0x007FE000
887 #define MASK_BMPitch                    0x00001FFF
888
889 #define MASK_BMMatrix00                 0x000007FF
890 #define MASK_BMMatrix01                 0x07FF0000
891 #define MASK_BMMatrix10                 0x000007FF
892 #define MASK_BMMatrix11                 0x07FF0000
893
894 #define MASK_TextureRealInSystem        0x00000001
895 #define MASK_TextureDowngrade           0x00000002
896
897 #define ALPHA_BUFFER_FORMAT_1           0x00000000
898 #define ALPHA_BUFFER_FORMAT_2           0x10000000
899 #define ALPHA_BUFFER_FORMAT_4           0x20000000
900 #define ALPHA_BUFFER_FORMAT_8           0x30000000
901
902 #endif