0f1d9c215840af6fffda81ca89066d2662ade8ce
[profile/ivi/mesa.git] / src / mesa / drivers / dri / radeon / radeon_texture.c
1 /*
2  * Copyright (C) 2008 Nicolai Haehnle.
3  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
4  *
5  * The Weather Channel (TM) funded Tungsten Graphics to develop the
6  * initial release of the Radeon 8500 driver under the XFree86 license.
7  * This notice must be preserved.
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining
10  * a copy of this software and associated documentation files (the
11  * "Software"), to deal in the Software without restriction, including
12  * without limitation the rights to use, copy, modify, merge, publish,
13  * distribute, sublicense, and/or sell copies of the Software, and to
14  * permit persons to whom the Software is furnished to do so, subject to
15  * the following conditions:
16  *
17  * The above copyright notice and this permission notice (including the
18  * next paragraph) shall be included in all copies or substantial
19  * portions of the Software.
20  *
21  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28  *
29  */
30
31 #include "main/glheader.h"
32 #include "main/imports.h"
33 #include "main/context.h"
34 #include "main/convolve.h"
35 #include "main/mipmap.h"
36 #include "main/texcompress.h"
37 #include "main/texformat.h"
38 #include "main/texstore.h"
39 #include "main/teximage.h"
40 #include "main/texobj.h"
41 #include "main/texgetimage.h"
42
43 #include "xmlpool.h"            /* for symbolic values of enum-type options */
44
45 #include "radeon_common.h"
46
47 #include "radeon_mipmap_tree.h"
48
49
50 static void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
51         GLuint numrows, GLuint rowsize)
52 {
53         assert(rowsize <= dststride);
54         assert(rowsize <= srcstride);
55
56         if (rowsize == srcstride && rowsize == dststride) {
57                 memcpy(dst, src, numrows*rowsize);
58         } else {
59                 GLuint i;
60                 for(i = 0; i < numrows; ++i) {
61                         memcpy(dst, src, rowsize);
62                         dst += dststride;
63                         src += srcstride;
64                 }
65         }
66 }
67
68 /* textures */
69 /**
70  * Allocate an empty texture image object.
71  */
72 struct gl_texture_image *radeonNewTextureImage(GLcontext *ctx)
73 {
74         return CALLOC(sizeof(radeon_texture_image));
75 }
76
77 /**
78  * Free memory associated with this texture image.
79  */
80 void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage)
81 {
82         radeon_texture_image* image = get_radeon_texture_image(timage);
83
84         if (image->mt) {
85                 radeon_miptree_unreference(image->mt);
86                 image->mt = 0;
87                 assert(!image->base.Data);
88         } else {
89                 _mesa_free_texture_image_data(ctx, timage);
90         }
91         if (image->bo) {
92                 radeon_bo_unref(image->bo);
93                 image->bo = NULL;
94         }
95         if (timage->Data) {
96                 _mesa_free_texmemory(timage->Data);
97                 timage->Data = NULL;
98         }
99 }
100
101 /* Set Data pointer and additional data for mapped texture image */
102 static void teximage_set_map_data(radeon_texture_image *image)
103 {
104         radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
105
106         image->base.Data = image->mt->bo->ptr + lvl->faces[image->mtface].offset;
107         image->base.RowStride = lvl->rowstride / image->mt->bpp;
108 }
109
110
111 /**
112  * Map a single texture image for glTexImage and friends.
113  */
114 void radeon_teximage_map(radeon_texture_image *image, GLboolean write_enable)
115 {
116         if (image->mt) {
117                 assert(!image->base.Data);
118
119                 radeon_bo_map(image->mt->bo, write_enable);
120                 teximage_set_map_data(image);
121         }
122 }
123
124
125 void radeon_teximage_unmap(radeon_texture_image *image)
126 {
127         if (image->mt) {
128                 assert(image->base.Data);
129
130                 image->base.Data = 0;
131                 radeon_bo_unmap(image->mt->bo);
132         }
133 }
134
135 static void map_override(GLcontext *ctx, radeonTexObj *t)
136 {
137         radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]);
138
139         radeon_bo_map(t->bo, GL_FALSE);
140
141         img->base.Data = t->bo->ptr;
142         _mesa_set_fetch_functions(&img->base, 2);
143 }
144
145 static void unmap_override(GLcontext *ctx, radeonTexObj *t)
146 {
147         radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]);
148
149         radeon_bo_unmap(t->bo);
150
151         img->base.Data = NULL;
152 }
153
154 /**
155  * Map a validated texture for reading during software rendering.
156  */
157 void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
158 {
159         radeonTexObj* t = radeon_tex_obj(texObj);
160         int face, level;
161
162         if (!radeon_validate_texture_miptree(ctx, texObj))
163           return;
164
165         /* for r100 3D sw fallbacks don't have mt */
166         if (t->image_override && t->bo)
167                 map_override(ctx, t);
168
169         if (!t->mt)
170                 return;
171
172         radeon_bo_map(t->mt->bo, GL_FALSE);
173         for(face = 0; face < t->mt->faces; ++face) {
174                 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level)
175                         teximage_set_map_data(get_radeon_texture_image(texObj->Image[face][level]));
176         }
177 }
178
179 void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
180 {
181         radeonTexObj* t = radeon_tex_obj(texObj);
182         int face, level;
183
184         if (t->image_override && t->bo)
185                 unmap_override(ctx, t);
186         /* for r100 3D sw fallbacks don't have mt */
187         if (!t->mt)
188           return;
189
190         for(face = 0; face < t->mt->faces; ++face) {
191                 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level)
192                         texObj->Image[face][level]->Data = 0;
193         }
194         radeon_bo_unmap(t->mt->bo);
195 }
196
197 GLuint radeon_face_for_target(GLenum target)
198 {
199         switch (target) {
200         case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
201         case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
202         case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
203         case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
204         case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
205         case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
206                 return (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
207         default:
208                 return 0;
209         }
210 }
211
212 /**
213  * Wraps Mesa's implementation to ensure that the base level image is mapped.
214  *
215  * This relies on internal details of _mesa_generate_mipmap, in particular
216  * the fact that the memory for recreated texture images is always freed.
217  */
218 static void radeon_generate_mipmap(GLcontext *ctx, GLenum target,
219                                    struct gl_texture_object *texObj)
220 {
221         radeonTexObj* t = radeon_tex_obj(texObj);
222         GLuint nr_faces = (t->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
223         int i, face;
224
225
226         _mesa_generate_mipmap(ctx, target, texObj);
227
228         for (face = 0; face < nr_faces; face++) {
229                 for (i = texObj->BaseLevel + 1; i < texObj->MaxLevel; i++) {
230                         radeon_texture_image *image;
231
232                         image = get_radeon_texture_image(texObj->Image[face][i]);
233
234                         if (image == NULL)
235                                 break;
236
237                         image->mtlevel = i;
238                         image->mtface = face;
239
240                         radeon_miptree_unreference(image->mt);
241                         image->mt = NULL;
242                 }
243         }
244         
245 }
246
247 void radeonGenerateMipmap(GLcontext* ctx, GLenum target, struct gl_texture_object *texObj)
248 {
249         GLuint face = radeon_face_for_target(target);
250         radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[face][texObj->BaseLevel]);
251
252         radeon_teximage_map(baseimage, GL_FALSE);
253         radeon_generate_mipmap(ctx, target, texObj);
254         radeon_teximage_unmap(baseimage);
255 }
256
257
258 /* try to find a format which will only need a memcopy */
259 static const struct gl_texture_format *radeonChoose8888TexFormat(radeonContextPtr rmesa,
260                                                                  GLenum srcFormat,
261                                                                  GLenum srcType, GLboolean fbo)
262 {
263         const GLuint ui = 1;
264         const GLubyte littleEndian = *((const GLubyte *)&ui);
265
266         /* r100 can only do this */
267         if (IS_R100_CLASS(rmesa->radeonScreen) || fbo)
268           return _dri_texformat_argb8888;
269
270         if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8) ||
271             (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && !littleEndian) ||
272             (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) ||
273             (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && littleEndian)) {
274                 return &_mesa_texformat_rgba8888;
275         } else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) ||
276                    (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && littleEndian) ||
277                    (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8) ||
278                    (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && !littleEndian)) {
279                 return &_mesa_texformat_rgba8888_rev;
280         } else if (IS_R200_CLASS(rmesa->radeonScreen)) {
281                 return _dri_texformat_argb8888;
282         } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && !littleEndian) ||
283                                             srcType == GL_UNSIGNED_INT_8_8_8_8)) {
284                 return &_mesa_texformat_argb8888_rev;
285         } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && littleEndian) ||
286                                             srcType == GL_UNSIGNED_INT_8_8_8_8_REV)) {
287                 return &_mesa_texformat_argb8888;
288         } else
289                 return _dri_texformat_argb8888;
290 }
291
292 const struct gl_texture_format *radeonChooseTextureFormat_mesa(GLcontext * ctx,
293                                                           GLint internalFormat,
294                                                           GLenum format,
295                                                           GLenum type)
296 {
297         return radeonChooseTextureFormat(ctx, internalFormat, format,
298                                          type, 0);
299 }
300
301 const struct gl_texture_format *radeonChooseTextureFormat(GLcontext * ctx,
302                                                           GLint internalFormat,
303                                                           GLenum format,
304                                                           GLenum type, GLboolean fbo)
305 {
306         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
307         const GLboolean do32bpt =
308             (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_32);
309         const GLboolean force16bpt =
310             (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FORCE_16);
311         (void)format;
312
313 #if 0
314         fprintf(stderr, "InternalFormat=%s(%d) type=%s format=%s\n",
315                 _mesa_lookup_enum_by_nr(internalFormat), internalFormat,
316                 _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format));
317         fprintf(stderr, "do32bpt=%d force16bpt=%d\n", do32bpt, force16bpt);
318 #endif
319
320         switch (internalFormat) {
321         case 4:
322         case GL_RGBA:
323         case GL_COMPRESSED_RGBA:
324                 switch (type) {
325                 case GL_UNSIGNED_INT_10_10_10_2:
326                 case GL_UNSIGNED_INT_2_10_10_10_REV:
327                         return do32bpt ? _dri_texformat_argb8888 :
328                             _dri_texformat_argb1555;
329                 case GL_UNSIGNED_SHORT_4_4_4_4:
330                 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
331                         return _dri_texformat_argb4444;
332                 case GL_UNSIGNED_SHORT_5_5_5_1:
333                 case GL_UNSIGNED_SHORT_1_5_5_5_REV:
334                         return _dri_texformat_argb1555;
335                 default:
336                         return do32bpt ? radeonChoose8888TexFormat(rmesa, format, type, fbo) :
337                             _dri_texformat_argb4444;
338                 }
339
340         case 3:
341         case GL_RGB:
342         case GL_COMPRESSED_RGB:
343                 switch (type) {
344                 case GL_UNSIGNED_SHORT_4_4_4_4:
345                 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
346                         return _dri_texformat_argb4444;
347                 case GL_UNSIGNED_SHORT_5_5_5_1:
348                 case GL_UNSIGNED_SHORT_1_5_5_5_REV:
349                         return _dri_texformat_argb1555;
350                 case GL_UNSIGNED_SHORT_5_6_5:
351                 case GL_UNSIGNED_SHORT_5_6_5_REV:
352                         return _dri_texformat_rgb565;
353                 default:
354                         return do32bpt ? _dri_texformat_argb8888 :
355                             _dri_texformat_rgb565;
356                 }
357
358         case GL_RGBA8:
359         case GL_RGB10_A2:
360         case GL_RGBA12:
361         case GL_RGBA16:
362                 return !force16bpt ?
363                         radeonChoose8888TexFormat(rmesa, format, type, fbo) :
364                         _dri_texformat_argb4444;
365
366         case GL_RGBA4:
367         case GL_RGBA2:
368                 return _dri_texformat_argb4444;
369
370         case GL_RGB5_A1:
371                 return _dri_texformat_argb1555;
372
373         case GL_RGB8:
374         case GL_RGB10:
375         case GL_RGB12:
376         case GL_RGB16:
377                 return !force16bpt ? _dri_texformat_argb8888 :
378                     _dri_texformat_rgb565;
379
380         case GL_RGB5:
381         case GL_RGB4:
382         case GL_R3_G3_B2:
383                 return _dri_texformat_rgb565;
384
385         case GL_ALPHA:
386         case GL_ALPHA4:
387         case GL_ALPHA8:
388         case GL_ALPHA12:
389         case GL_ALPHA16:
390         case GL_COMPRESSED_ALPHA:
391                 /* r200: can't use a8 format since interpreting hw I8 as a8 would result
392                    in wrong rgb values (same as alpha value instead of 0). */
393                 if (IS_R200_CLASS(rmesa->radeonScreen))
394                         return _dri_texformat_al88;
395                 else
396                         return _dri_texformat_a8;
397         case 1:
398         case GL_LUMINANCE:
399         case GL_LUMINANCE4:
400         case GL_LUMINANCE8:
401         case GL_LUMINANCE12:
402         case GL_LUMINANCE16:
403         case GL_COMPRESSED_LUMINANCE:
404                 return _dri_texformat_l8;
405
406         case 2:
407         case GL_LUMINANCE_ALPHA:
408         case GL_LUMINANCE4_ALPHA4:
409         case GL_LUMINANCE6_ALPHA2:
410         case GL_LUMINANCE8_ALPHA8:
411         case GL_LUMINANCE12_ALPHA4:
412         case GL_LUMINANCE12_ALPHA12:
413         case GL_LUMINANCE16_ALPHA16:
414         case GL_COMPRESSED_LUMINANCE_ALPHA:
415                 return _dri_texformat_al88;
416
417         case GL_INTENSITY:
418         case GL_INTENSITY4:
419         case GL_INTENSITY8:
420         case GL_INTENSITY12:
421         case GL_INTENSITY16:
422         case GL_COMPRESSED_INTENSITY:
423                 return _dri_texformat_i8;
424
425         case GL_YCBCR_MESA:
426                 if (type == GL_UNSIGNED_SHORT_8_8_APPLE ||
427                     type == GL_UNSIGNED_BYTE)
428                         return &_mesa_texformat_ycbcr;
429                 else
430                         return &_mesa_texformat_ycbcr_rev;
431
432         case GL_RGB_S3TC:
433         case GL_RGB4_S3TC:
434         case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
435                 return &_mesa_texformat_rgb_dxt1;
436
437         case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
438                 return &_mesa_texformat_rgba_dxt1;
439
440         case GL_RGBA_S3TC:
441         case GL_RGBA4_S3TC:
442         case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
443                 return &_mesa_texformat_rgba_dxt3;
444
445         case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
446                 return &_mesa_texformat_rgba_dxt5;
447
448         case GL_ALPHA16F_ARB:
449                 return &_mesa_texformat_alpha_float16;
450         case GL_ALPHA32F_ARB:
451                 return &_mesa_texformat_alpha_float32;
452         case GL_LUMINANCE16F_ARB:
453                 return &_mesa_texformat_luminance_float16;
454         case GL_LUMINANCE32F_ARB:
455                 return &_mesa_texformat_luminance_float32;
456         case GL_LUMINANCE_ALPHA16F_ARB:
457                 return &_mesa_texformat_luminance_alpha_float16;
458         case GL_LUMINANCE_ALPHA32F_ARB:
459                 return &_mesa_texformat_luminance_alpha_float32;
460         case GL_INTENSITY16F_ARB:
461                 return &_mesa_texformat_intensity_float16;
462         case GL_INTENSITY32F_ARB:
463                 return &_mesa_texformat_intensity_float32;
464         case GL_RGB16F_ARB:
465                 return &_mesa_texformat_rgba_float16;
466         case GL_RGB32F_ARB:
467                 return &_mesa_texformat_rgba_float32;
468         case GL_RGBA16F_ARB:
469                 return &_mesa_texformat_rgba_float16;
470         case GL_RGBA32F_ARB:
471                 return &_mesa_texformat_rgba_float32;
472
473         case GL_DEPTH_COMPONENT:
474         case GL_DEPTH_COMPONENT16:
475         case GL_DEPTH_COMPONENT24:
476         case GL_DEPTH_COMPONENT32:
477         case GL_DEPTH_STENCIL_EXT:
478         case GL_DEPTH24_STENCIL8_EXT:
479                 return &_mesa_texformat_s8_z24;
480         default:
481                 _mesa_problem(ctx,
482                               "unexpected internalFormat 0x%x in %s",
483                               (int)internalFormat, __func__);
484                 return NULL;
485         }
486
487         return NULL;            /* never get here */
488 }
489
490 /**
491  * All glTexImage calls go through this function.
492  */
493 static void radeon_teximage(
494         GLcontext *ctx, int dims,
495         GLint face, GLint level,
496         GLint internalFormat,
497         GLint width, GLint height, GLint depth,
498         GLsizei imageSize,
499         GLenum format, GLenum type, const GLvoid * pixels,
500         const struct gl_pixelstore_attrib *packing,
501         struct gl_texture_object *texObj,
502         struct gl_texture_image *texImage,
503         int compressed)
504 {
505         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
506         radeonTexObj* t = radeon_tex_obj(texObj);
507         radeon_texture_image* image = get_radeon_texture_image(texImage);
508         GLuint dstRowStride;
509         GLint postConvWidth = width;
510         GLint postConvHeight = height;
511         GLuint texelBytes;
512
513         radeon_firevertices(rmesa);
514
515         t->validated = GL_FALSE;
516
517         if (ctx->_ImageTransferState & IMAGE_CONVOLUTION_BIT) {
518                _mesa_adjust_image_for_convolution(ctx, dims, &postConvWidth,
519                                                   &postConvHeight);
520         }
521
522         /* Choose and fill in the texture format for this image */
523         texImage->TexFormat = radeonChooseTextureFormat(ctx, internalFormat, format, type, 0);
524         _mesa_set_fetch_functions(texImage, dims);
525
526         if (texImage->TexFormat->TexelBytes == 0) {
527                 texelBytes = 0;
528                 texImage->IsCompressed = GL_TRUE;
529                 texImage->CompressedSize =
530                         ctx->Driver.CompressedTextureSize(ctx, texImage->Width,
531                                            texImage->Height, texImage->Depth,
532                                            texImage->TexFormat->MesaFormat);
533         } else {
534                 texImage->IsCompressed = GL_FALSE;
535                 texImage->CompressedSize = 0;
536
537                 texelBytes = texImage->TexFormat->TexelBytes;
538                 /* Minimum pitch of 32 bytes */
539                 if (postConvWidth * texelBytes < 32) {
540                   postConvWidth = 32 / texelBytes;
541                   texImage->RowStride = postConvWidth;
542                 }
543                 if (!image->mt) {      
544                         assert(texImage->RowStride == postConvWidth);
545                 }
546         }
547
548         /* Allocate memory for image */
549         radeonFreeTexImageData(ctx, texImage); /* Mesa core only clears texImage->Data but not image->mt */
550
551         if (t->mt &&
552             t->mt->firstLevel == level &&
553             t->mt->lastLevel == level &&
554             t->mt->target != GL_TEXTURE_CUBE_MAP_ARB &&
555             !radeon_miptree_matches_image(t->mt, texImage, face, level)) {
556           radeon_miptree_unreference(t->mt);
557           t->mt = NULL;
558         }
559
560         if (!t->mt)
561                 radeon_try_alloc_miptree(rmesa, t, texImage, face, level);
562         if (t->mt && radeon_miptree_matches_image(t->mt, texImage, face, level)) {
563                 radeon_mipmap_level *lvl;
564                 image->mt = t->mt;
565                 image->mtlevel = level - t->mt->firstLevel;
566                 image->mtface = face;
567                 radeon_miptree_reference(t->mt);
568                 lvl = &image->mt->levels[image->mtlevel];
569                 dstRowStride = lvl->rowstride;
570         } else {
571                 int size;
572                 if (texImage->IsCompressed) {
573                         size = texImage->CompressedSize;
574                 } else {
575                         size = texImage->Width * texImage->Height * texImage->Depth * texImage->TexFormat->TexelBytes;
576                 }
577                 texImage->Data = _mesa_alloc_texmemory(size);
578         }
579
580         /* Upload texture image; note that the spec allows pixels to be NULL */
581         if (compressed) {
582                 pixels = _mesa_validate_pbo_compressed_teximage(
583                         ctx, imageSize, pixels, packing, "glCompressedTexImage");
584         } else {
585                 pixels = _mesa_validate_pbo_teximage(
586                         ctx, dims, width, height, depth,
587                         format, type, pixels, packing, "glTexImage");
588         }
589
590         if (pixels) {
591                 radeon_teximage_map(image, GL_TRUE);
592
593                 if (compressed) {
594                         memcpy(texImage->Data, pixels, imageSize);
595                 } else {
596                         GLuint dstRowStride;
597                         if (image->mt) {
598                                 radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
599                                 dstRowStride = lvl->rowstride;
600                         } else {
601                                 dstRowStride = texImage->Width * texImage->TexFormat->TexelBytes;
602                         }
603
604                         if (!texImage->TexFormat->StoreImage(ctx, dims,
605                                                 texImage->_BaseFormat,
606                                                 texImage->TexFormat,
607                                                 texImage->Data, 0, 0, 0, /* dstX/Y/Zoffset */
608                                                 dstRowStride,
609                                                 texImage->ImageOffsets,
610                                                 width, height, depth,
611                                                 format, type, pixels, packing))
612                                 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage");
613                 }
614
615         }
616
617         /* SGIS_generate_mipmap */
618         if (level == texObj->BaseLevel && texObj->GenerateMipmap) {
619                 radeon_generate_mipmap(ctx, texObj->Target, texObj);
620         }
621
622         _mesa_unmap_teximage_pbo(ctx, packing);
623
624         if (pixels)
625           radeon_teximage_unmap(image);
626
627
628 }
629
630 void radeonTexImage1D(GLcontext * ctx, GLenum target, GLint level,
631                       GLint internalFormat,
632                       GLint width, GLint border,
633                       GLenum format, GLenum type, const GLvoid * pixels,
634                       const struct gl_pixelstore_attrib *packing,
635                       struct gl_texture_object *texObj,
636                       struct gl_texture_image *texImage)
637 {
638         radeon_teximage(ctx, 1, 0, level, internalFormat, width, 1, 1,
639                 0, format, type, pixels, packing, texObj, texImage, 0);
640 }
641
642 void radeonTexImage2D(GLcontext * ctx, GLenum target, GLint level,
643                            GLint internalFormat,
644                            GLint width, GLint height, GLint border,
645                            GLenum format, GLenum type, const GLvoid * pixels,
646                            const struct gl_pixelstore_attrib *packing,
647                            struct gl_texture_object *texObj,
648                            struct gl_texture_image *texImage)
649
650 {
651         GLuint face = radeon_face_for_target(target);
652
653         radeon_teximage(ctx, 2, face, level, internalFormat, width, height, 1,
654                 0, format, type, pixels, packing, texObj, texImage, 0);
655 }
656
657 void radeonCompressedTexImage2D(GLcontext * ctx, GLenum target,
658                                      GLint level, GLint internalFormat,
659                                      GLint width, GLint height, GLint border,
660                                      GLsizei imageSize, const GLvoid * data,
661                                      struct gl_texture_object *texObj,
662                                      struct gl_texture_image *texImage)
663 {
664         GLuint face = radeon_face_for_target(target);
665
666         radeon_teximage(ctx, 2, face, level, internalFormat, width, height, 1,
667                 imageSize, 0, 0, data, &ctx->Unpack, texObj, texImage, 1);
668 }
669
670 void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level,
671                       GLint internalFormat,
672                       GLint width, GLint height, GLint depth,
673                       GLint border,
674                       GLenum format, GLenum type, const GLvoid * pixels,
675                       const struct gl_pixelstore_attrib *packing,
676                       struct gl_texture_object *texObj,
677                       struct gl_texture_image *texImage)
678 {
679         radeon_teximage(ctx, 3, 0, level, internalFormat, width, height, depth,
680                 0, format, type, pixels, packing, texObj, texImage, 0);
681 }
682
683 /**
684  * Update a subregion of the given texture image.
685  */
686 static void radeon_texsubimage(GLcontext* ctx, int dims, int level,
687                 GLint xoffset, GLint yoffset, GLint zoffset,
688                 GLsizei width, GLsizei height, GLsizei depth,
689                 GLsizei imageSize,
690                 GLenum format, GLenum type,
691                 const GLvoid * pixels,
692                 const struct gl_pixelstore_attrib *packing,
693                 struct gl_texture_object *texObj,
694                 struct gl_texture_image *texImage,
695                 int compressed)
696 {
697         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
698         radeonTexObj* t = radeon_tex_obj(texObj);
699         radeon_texture_image* image = get_radeon_texture_image(texImage);
700
701         radeon_firevertices(rmesa);
702
703         t->validated = GL_FALSE;
704         if (compressed) {
705                 pixels = _mesa_validate_pbo_compressed_teximage(
706                         ctx, imageSize, pixels, packing, "glCompressedTexImage");
707         } else {
708                 pixels = _mesa_validate_pbo_teximage(ctx, dims,
709                         width, height, depth, format, type, pixels, packing, "glTexSubImage1D");
710         }
711
712         if (pixels) {
713                 GLint dstRowStride;
714                 radeon_teximage_map(image, GL_TRUE);
715
716                 if (image->mt) {
717                         radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
718                         dstRowStride = lvl->rowstride;
719                 } else {
720                         dstRowStride = texImage->RowStride * texImage->TexFormat->TexelBytes;
721                 }
722
723                 if (compressed) {
724                         uint32_t srcRowStride, bytesPerRow, rows; 
725                         dstRowStride = _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, texImage->Width);
726                         srcRowStride = _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, width);
727                         bytesPerRow = srcRowStride;
728                         rows = height / 4;
729
730                         copy_rows(texImage->Data, dstRowStride,  image->base.Data, srcRowStride, rows,
731                                   bytesPerRow);
732                         
733                 } else {
734                         if (!texImage->TexFormat->StoreImage(ctx, dims, texImage->_BaseFormat,
735                                                              texImage->TexFormat, texImage->Data,
736                                                              xoffset, yoffset, zoffset,
737                                                              dstRowStride,
738                                                              texImage->ImageOffsets,
739                                                              width, height, depth,
740                                                              format, type, pixels, packing))
741                                 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage");
742                 }
743
744         }
745
746         /* GL_SGIS_generate_mipmap */
747         if (level == texObj->BaseLevel && texObj->GenerateMipmap) {
748                 radeon_generate_mipmap(ctx, texObj->Target, texObj);
749         }
750         radeon_teximage_unmap(image);
751
752         _mesa_unmap_teximage_pbo(ctx, packing);
753
754
755 }
756
757 void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
758                          GLint xoffset,
759                          GLsizei width,
760                          GLenum format, GLenum type,
761                          const GLvoid * pixels,
762                          const struct gl_pixelstore_attrib *packing,
763                          struct gl_texture_object *texObj,
764                          struct gl_texture_image *texImage)
765 {
766         radeon_texsubimage(ctx, 1, level, xoffset, 0, 0, width, 1, 1, 0,
767                 format, type, pixels, packing, texObj, texImage, 0);
768 }
769
770 void radeonTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
771                          GLint xoffset, GLint yoffset,
772                          GLsizei width, GLsizei height,
773                          GLenum format, GLenum type,
774                          const GLvoid * pixels,
775                          const struct gl_pixelstore_attrib *packing,
776                          struct gl_texture_object *texObj,
777                          struct gl_texture_image *texImage)
778 {
779         radeon_texsubimage(ctx, 2, level, xoffset, yoffset, 0, width, height, 1,
780                            0, format, type, pixels, packing, texObj, texImage,
781                            0);
782 }
783
784 void radeonCompressedTexSubImage2D(GLcontext * ctx, GLenum target,
785                                    GLint level, GLint xoffset,
786                                    GLint yoffset, GLsizei width,
787                                    GLsizei height, GLenum format,
788                                    GLsizei imageSize, const GLvoid * data,
789                                    struct gl_texture_object *texObj,
790                                    struct gl_texture_image *texImage)
791 {
792         radeon_texsubimage(ctx, 2, level, xoffset, yoffset, 0, width, height, 1,
793                 imageSize, format, 0, data, &ctx->Unpack, texObj, texImage, 1);
794 }
795
796
797 void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
798                          GLint xoffset, GLint yoffset, GLint zoffset,
799                          GLsizei width, GLsizei height, GLsizei depth,
800                          GLenum format, GLenum type,
801                          const GLvoid * pixels,
802                          const struct gl_pixelstore_attrib *packing,
803                          struct gl_texture_object *texObj,
804                          struct gl_texture_image *texImage)
805 {
806         radeon_texsubimage(ctx, 3, level, xoffset, yoffset, zoffset, width, height, depth, 0,
807                 format, type, pixels, packing, texObj, texImage, 0);
808 }
809
810
811
812 /**
813  * Ensure that the given image is stored in the given miptree from now on.
814  */
815 static void migrate_image_to_miptree(radeon_mipmap_tree *mt, radeon_texture_image *image, int face, int level)
816 {
817         radeon_mipmap_level *dstlvl = &mt->levels[level - mt->firstLevel];
818         unsigned char *dest;
819
820         assert(image->mt != mt);
821         assert(dstlvl->width == image->base.Width);
822         assert(dstlvl->height == image->base.Height);
823         assert(dstlvl->depth == image->base.Depth);
824
825
826         radeon_bo_map(mt->bo, GL_TRUE);
827         dest = mt->bo->ptr + dstlvl->faces[face].offset;
828
829         if (image->mt) {
830                 /* Format etc. should match, so we really just need a memcpy().
831                  * In fact, that memcpy() could be done by the hardware in many
832                  * cases, provided that we have a proper memory manager.
833                  */
834                 radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel];
835
836                 assert(srclvl->size == dstlvl->size);
837                 assert(srclvl->rowstride == dstlvl->rowstride);
838
839                 radeon_bo_map(image->mt->bo, GL_FALSE);
840
841                 memcpy(dest,
842                         image->mt->bo->ptr + srclvl->faces[face].offset,
843                         dstlvl->size);
844                 radeon_bo_unmap(image->mt->bo);
845
846                 radeon_miptree_unreference(image->mt);
847         } else {
848                 uint32_t srcrowstride;
849                 uint32_t height;
850                 /* need to confirm this value is correct */
851                 if (mt->compressed) {
852                         height = image->base.Height / 4;
853                         srcrowstride = image->base.RowStride * mt->bpp;
854                 } else {
855                         height = image->base.Height * image->base.Depth;
856                         srcrowstride = image->base.Width * image->base.TexFormat->TexelBytes;
857                 }
858
859 //              if (mt->tilebits)
860 //                      WARN_ONCE("%s: tiling not supported yet", __FUNCTION__);
861
862                 copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
863                           height, srcrowstride);
864
865                 _mesa_free_texmemory(image->base.Data);
866                 image->base.Data = 0;
867         }
868
869         radeon_bo_unmap(mt->bo);
870
871         image->mt = mt;
872         image->mtface = face;
873         image->mtlevel = level;
874         radeon_miptree_reference(image->mt);
875 }
876
877 int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj)
878 {
879         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
880         radeonTexObj *t = radeon_tex_obj(texObj);
881         radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[0][texObj->BaseLevel]);
882         int face, level;
883
884         if (t->validated || t->image_override)
885                 return GL_TRUE;
886
887         if (RADEON_DEBUG & DEBUG_TEXTURE)
888                 fprintf(stderr, "%s: Validating texture %p now\n", __FUNCTION__, texObj);
889
890         if (baseimage->base.Border > 0)
891                 return GL_FALSE;
892
893         /* Ensure a matching miptree exists.
894          *
895          * Differing mipmap trees can result when the app uses TexImage to
896          * change texture dimensions.
897          *
898          * Prefer to use base image's miptree if it
899          * exists, since that most likely contains more valid data (remember
900          * that the base level is usually significantly larger than the rest
901          * of the miptree, so cubemaps are the only possible exception).
902          */
903         if (baseimage->mt &&
904             baseimage->mt != t->mt &&
905             radeon_miptree_matches_texture(baseimage->mt, &t->base)) {
906                 radeon_miptree_unreference(t->mt);
907                 t->mt = baseimage->mt;
908                 radeon_miptree_reference(t->mt);
909         } else if (t->mt && !radeon_miptree_matches_texture(t->mt, &t->base)) {
910                 radeon_miptree_unreference(t->mt);
911                 t->mt = 0;
912         }
913
914         if (!t->mt) {
915                 if (RADEON_DEBUG & DEBUG_TEXTURE)
916                         fprintf(stderr, " Allocate new miptree\n");
917                 radeon_try_alloc_miptree(rmesa, t, &baseimage->base, 0, texObj->BaseLevel);
918                 if (!t->mt) {
919                         _mesa_problem(ctx, "r300_validate_texture failed to alloc miptree");
920                         return GL_FALSE;
921                 }
922         }
923
924         /* Ensure all images are stored in the single main miptree */
925         for(face = 0; face < t->mt->faces; ++face) {
926                 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level) {
927                         radeon_texture_image *image = get_radeon_texture_image(texObj->Image[face][level]);
928                         if (RADEON_DEBUG & DEBUG_TEXTURE)
929                                 fprintf(stderr, " face %i, level %i... %p vs %p ", face, level, t->mt, image->mt);
930                         if (t->mt == image->mt) {
931                                 if (RADEON_DEBUG & DEBUG_TEXTURE)
932                                         fprintf(stderr, "OK\n");
933                                 continue;
934                         }
935
936                         if (RADEON_DEBUG & DEBUG_TEXTURE)
937                                 fprintf(stderr, "migrating\n");
938                         migrate_image_to_miptree(t->mt, image, face, level);
939                 }
940         }
941
942         return GL_TRUE;
943 }
944
945
946 /**
947  * Need to map texture image into memory before copying image data,
948  * then unmap it.
949  */
950 static void
951 radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level,
952                      GLenum format, GLenum type, GLvoid * pixels,
953                      struct gl_texture_object *texObj,
954                      struct gl_texture_image *texImage, int compressed)
955 {
956         radeon_texture_image *image = get_radeon_texture_image(texImage);
957
958         if (image->mt) {
959                 /* Map the texture image read-only */
960                 radeon_teximage_map(image, GL_FALSE);
961         } else {
962                 /* Image hasn't been uploaded to a miptree yet */
963                 assert(image->base.Data);
964         }
965
966         if (compressed) {
967                 _mesa_get_compressed_teximage(ctx, target, level, pixels,
968                                               texObj, texImage);
969         } else {
970                 _mesa_get_teximage(ctx, target, level, format, type, pixels,
971                                    texObj, texImage);
972         }
973      
974         if (image->mt) {
975                 radeon_teximage_unmap(image);
976         }
977 }
978
979 void
980 radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level,
981                   GLenum format, GLenum type, GLvoid * pixels,
982                   struct gl_texture_object *texObj,
983                   struct gl_texture_image *texImage)
984 {
985         radeon_get_tex_image(ctx, target, level, format, type, pixels,
986                              texObj, texImage, 0);
987 }
988
989 void
990 radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
991                             GLvoid *pixels,
992                             struct gl_texture_object *texObj,
993                             struct gl_texture_image *texImage)
994 {
995         radeon_get_tex_image(ctx, target, level, 0, 0, pixels,
996                              texObj, texImage, 1);
997 }