1 #ifndef RADEON_CS_WRAPPER_H
2 #define RADEON_CS_WRAPPER_H
4 /* to be used to build locally in mesa with no libdrm bits */
5 #include "../radeon/radeon_bo_drm.h"
6 #include "../radeon/radeon_cs_drm.h"
8 #ifdef HAVE_LIBDRM_RADEON
10 #include "radeon_bo.h"
11 #include "radeon_bo_gem.h"
12 #include "radeon_cs.h"
13 #include "radeon_cs_gem.h"
18 #define RADEON_GEM_DOMAIN_CPU 0x1 // Cached CPU domain
19 #define RADEON_GEM_DOMAIN_GTT 0x2 // GTT or cache flushed
20 #define RADEON_GEM_DOMAIN_VRAM 0x4 // VRAM domain
22 #define RADEON_TILING_MACRO 0x1
23 #define RADEON_TILING_MICRO 0x2
24 #define RADEON_TILING_SWAP 0x4
26 #ifndef RADEON_TILING_SURFACE
27 #define RADEON_TILING_SURFACE 0x8 /* this object requires a surface
28 * when mapped - i.e. front buffer */
31 #ifndef DRM_RADEON_GEM_INFO
32 #define DRM_RADEON_GEM_INFO 0x1c
34 struct drm_radeon_gem_info {
37 uint64_t vram_visible;
40 struct drm_radeon_info {
47 #ifndef RADEON_PARAM_DEVICE_ID
48 #define RADEON_PARAM_DEVICE_ID 16
51 #ifndef RADEON_PARAM_NUM_Z_PIPES
52 #define RADEON_PARAM_NUM_Z_PIPES 17
55 #ifndef RADEON_INFO_DEVICE_ID
56 #define RADEON_INFO_DEVICE_ID 0
58 #ifndef RADEON_INFO_NUM_GB_PIPES
59 #define RADEON_INFO_NUM_GB_PIPES 0
62 #ifndef RADEON_INFO_NUM_Z_PIPES
63 #define RADEON_INFO_NUM_Z_PIPES 0
66 #ifndef DRM_RADEON_INFO
67 #define DRM_RADEON_INFO 0x1
70 static inline void radeon_gem_get_kernel_name(struct radeon_bo *dummy, uint32_t *value)
74 static inline uint32_t radeon_gem_name_bo(struct radeon_bo *dummy)
79 static inline void *radeon_bo_manager_gem_ctor(int fd)
84 static inline void radeon_bo_manager_gem_dtor(void *dummy)
88 static inline void *radeon_cs_manager_gem_ctor(int fd)
93 static inline void radeon_cs_manager_gem_dtor(void *dummy)
97 static inline void radeon_tracker_print(void *ptr, int io)
102 #include "radeon_bo_legacy.h"
103 #include "radeon_cs_legacy.h"