2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
28 #ifndef _R700_SHADERINST_H_
29 #define _R700_SHADERINST_H_
31 #include "main/glheader.h"
33 #include "defaultendian.h"
34 #include "sq_micro_reg.h"
36 #define SQ_ALU_CONSTANT_PS_OFFSET 0x00000000
37 #define SQ_ALU_CONSTANT_PS_COUNT 0x00000100
38 #define SQ_ALU_CONSTANT_VS_OFFSET 0x00000100
39 #define SQ_ALU_CONSTANT_VS_COUNT 0x00000100
40 #define SQ_FETCH_RESOURCE_PS_OFFSET 0x00000000
41 #define SQ_FETCH_RESOURCE_PS_COUNT 0x000000a0
42 #define SQ_FETCH_RESOURCE_VS_OFFSET 0x000000a0
43 #define SQ_FETCH_RESOURCE_VS_COUNT 0x000000b0
46 #define SQ_TEX_SAMPLER_PS_OFFSET 0x00000000
47 #define SQ_TEX_SAMPLER_PS_COUNT 0x00000012
48 #define SQ_TEX_SAMPLER_VS_OFFSET 0x00000012
49 #define SQ_TEX_SAMPLER_VS_COUNT 0x00000012
52 #define SHADERINST_TYPEMASK_CF 0x10
53 #define SHADERINST_TYPEMASK_ALU 0x20
54 #define SHADERINST_TYPEMASK_TEX 0x40
55 #define SHADERINST_TYPEMASK_VTX 0x80
57 typedef enum ShaderInstType
59 SIT_CF = 0x10, /*SIZE = 0x2*/
60 SIT_CF_ALL_EXP = 0x14, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x10;*/
61 SIT_CF_ALL_EXP_SX = 0x15, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x10;*/
62 SIT_CF_ALL_EXP_SMX= 0x16, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x10;*/
63 SIT_CF_GENERIC = 0x18, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x8; //For tex and vtx*/
64 SIT_CF_ALU = 0x19, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x80;*/
65 SIT_ALU = 0x20, /*SIZE = 0x2,*/
66 SIT_ALU_HALF_LIT = 0x21, /*SIZE = 0x4,*/
67 SIT_ALU_FALL_LIT = 0x22, /*SIZE = 0x6,*/
68 SIT_TEX = 0x40, /*SIZE = 0x4,*/
69 SIT_VTX = 0x80, /*SIZE = 0x4, MEGA_FETCH_BYTES = 0x20*/
70 SIT_VTX_GENERIC = 0x81, /*SIZE = 0x4, MEGA_FETCH_BYTES = 0x20*/
71 SIT_VTX_SEM = 0x82 /*SIZE = 0x4, MEGA_FETCH_BYTES = 0x20*/
74 typedef struct R700ShaderInstruction
76 ShaderInstType m_ShaderInstType;
77 struct R700ShaderInstruction *pNextInst;
80 } R700ShaderInstruction;
82 // ------------------ CF insts ---------------------------
84 typedef R700ShaderInstruction R700ControlFlowInstruction;
86 typedef struct R700ControlFlowAllocExportClause
88 ShaderInstType m_ShaderInstType;
89 R700ShaderInstruction * pNextInst;
93 sq_cf_alloc_export_word0_u m_Word0;
94 sq_cf_alloc_export_word1_u m_Word1;
95 } R700ControlFlowAllocExportClause;
97 typedef struct R700ControlFlowSXClause
99 ShaderInstType m_ShaderInstType;
100 R700ShaderInstruction * pNextInst;
101 //R700ControlFlowAllocExportClause
102 //R700ControlFlowInstruction
103 //R700ShaderInstruction
106 //---------------------
107 //---------------------------
108 sq_cf_alloc_export_word0_u m_Word0;
109 sq_cf_alloc_export_word1_u m_Word1;
110 //-------------------------------------
112 sq_cf_alloc_export_word1_swiz_u m_Word1_SWIZ;
113 } R700ControlFlowSXClause;
115 typedef struct R700ControlFlowSMXClause
117 ShaderInstType m_ShaderInstType;
118 R700ShaderInstruction * pNextInst;
119 //R700ControlFlowAllocExportClause
120 //R700ControlFlowInstruction
121 //R700ShaderInstruction
124 //---------------------
125 //---------------------------
126 sq_cf_alloc_export_word0_u m_Word0;
127 sq_cf_alloc_export_word1_u m_Word1;
128 //-------------------------------
130 sq_cf_alloc_export_word1_buf_u m_Word1_BUF;
131 } R700ControlFlowSMXClause;
133 typedef struct R700ControlFlowGenericClause
135 ShaderInstType m_ShaderInstType;
136 R700ShaderInstruction * pNextInst;
137 //R700ControlFlowInstruction
138 //R700ShaderInstruction
141 //---------------------
142 //---------------------
144 sq_cf_word0_u m_Word0;
145 sq_cf_word1_u m_Word1;
147 struct R700VertexInstruction *m_pLinkedVTXInstruction;
148 struct R700TextureInstruction *m_pLinkedTEXInstruction;
149 } R700ControlFlowGenericClause;
151 typedef struct R700ControlFlowALUClause
153 ShaderInstType m_ShaderInstType;
154 R700ShaderInstruction * pNextInst;
155 //R700ControlFlowInstruction
156 //R700ShaderInstruction
159 //---------------------
160 //---------------------
162 sq_cf_alu_word0_u m_Word0;
163 sq_cf_alu_word1_u m_Word1;
165 struct R700ALUInstruction *m_pLinkedALUInstruction;
166 } R700ControlFlowALUClause;
168 // ------------------- End of CF Inst ------------------------
170 // ------------------- ALU Inst ------------------------------
171 typedef struct R700ALUInstruction
173 ShaderInstType m_ShaderInstType;
174 R700ShaderInstruction * pNextInst;
175 //R700ShaderInstruction
178 //---------------------
180 sq_alu_word0_u m_Word0;
181 sq_alu_word1_u m_Word1;
182 sq_alu_word1_op2_v2_u m_Word1_OP2;
183 sq_alu_word1_op3_u m_Word1_OP3;
185 struct R700ControlFlowALUClause *m_pLinkedALUClause;
186 } R700ALUInstruction;
188 typedef struct R700ALUInstructionHalfLiteral
190 ShaderInstType m_ShaderInstType;
191 R700ShaderInstruction * pNextInst;
193 //R700ShaderInstruction
196 //---------------------
198 sq_alu_word0_u m_Word0;
199 sq_alu_word1_u m_Word1;
200 sq_alu_word1_op2_v2_u m_Word1_OP2;
201 sq_alu_word1_op3_u m_Word1_OP3;
203 struct R700ControlFlowALUClause *m_pLinkedALUClause;
204 //-------------------
208 } R700ALUInstructionHalfLiteral;
210 typedef struct R700ALUInstructionFullLiteral
212 ShaderInstType m_ShaderInstType;
213 R700ShaderInstruction * pNextInst;
215 //R700ShaderInstruction
218 //---------------------
220 sq_alu_word0_u m_Word0;
221 sq_alu_word1_u m_Word1;
222 sq_alu_word1_op2_v2_u m_Word1_OP2;
223 sq_alu_word1_op3_u m_Word1_OP3;
225 struct R700ControlFlowALUClause *m_pLinkedALUClause;
226 //-------------------
232 } R700ALUInstructionFullLiteral;
233 // ------------------- End of ALU Inst -----------------------
235 // ------------------- Textuer/Vertex Instruction --------------------
237 typedef struct R700TextureInstruction
239 ShaderInstType m_ShaderInstType;
240 R700ShaderInstruction * pNextInst;
241 //R700ShaderInstruction
244 //---------------------
246 sq_tex_word0_u m_Word0;
247 sq_tex_word1_u m_Word1;
248 sq_tex_word2_u m_Word2;
250 struct R700ControlFlowGenericClause *m_pLinkedGenericClause;
251 } R700TextureInstruction;
253 typedef struct R700VertexInstruction
255 ShaderInstType m_ShaderInstType;
256 R700ShaderInstruction * pNextInst;
257 //R700ShaderInstruction
260 //---------------------
262 sq_vtx_word0_u m_Word0;
263 sq_vtx_word1_u m_Word1;
264 sq_vtx_word2_u m_Word2;
266 struct R700ControlFlowGenericClause *m_pLinkedGenericClause;
267 } R700VertexInstruction;
269 typedef struct R700VertexSemanticFetch
271 ShaderInstType m_ShaderInstType;
272 R700ShaderInstruction * pNextInst;
273 //R700VertexInstruction
274 //R700ShaderInstruction
277 //---------------------
279 sq_vtx_word0_u m_Word0;
280 sq_vtx_word1_u m_Word1;
281 sq_vtx_word2_u m_Word2;
283 struct R700ControlFlowGenericClause *m_pLinkedGenericClause;
284 //---------------------------
286 sq_vtx_word1_sem_u m_Word1_SEM;
287 } R700VertexSemanticFetch;
289 typedef struct R700VertexGenericFetch
291 ShaderInstType m_ShaderInstType;
292 R700ShaderInstruction * pNextInst;
293 //R700VertexInstruction
294 //R700ShaderInstruction
297 //---------------------
299 sq_vtx_word0_u m_Word0;
300 sq_vtx_word1_u m_Word1;
301 sq_vtx_word2_u m_Word2;
303 struct R700ControlFlowGenericClause *m_pLinkedGenericClause;
304 //---------------------------
306 sq_vtx_word1_gpr_u m_Word1_GPR;
307 } R700VertexGenericFetch;
309 // ------------------- End of Texture Vertex Instruction --------------------
311 void Init_R700ControlFlowGenericClause(R700ControlFlowGenericClause* pInst);
312 void Init_R700ControlFlowALUClause(R700ControlFlowALUClause* pInst);
313 void Init_R700ControlFlowSXClause(R700ControlFlowSXClause* pInst);
314 void Init_R700ControlFlowSMXClause(R700ControlFlowSMXClause* pInst);
315 void Init_R700ALUInstruction(R700ALUInstruction* pInst);
316 void Init_R700ALUInstructionHalfLiteral(R700ALUInstructionHalfLiteral* pInst, GLfloat x, GLfloat y);
317 void Init_R700ALUInstructionFullLiteral(R700ALUInstructionFullLiteral* pInst, GLfloat x, GLfloat y, GLfloat z, GLfloat w);
318 void Init_R700TextureInstruction(R700TextureInstruction* pInst);
319 void Init_R700VertexSemanticFetch(R700VertexSemanticFetch* pInst);
320 void Init_R700VertexGenericFetch(R700VertexGenericFetch* pInst);
322 unsigned int GetInstructionSize(ShaderInstType instType);
323 unsigned int GetCFMaxInstructions(ShaderInstType instType);
325 GLboolean LinkVertexInstruction(R700ControlFlowGenericClause *pCFGeneric,
326 R700VertexInstruction *pVTXInstruction);
328 #endif //_R700_SHADERINST_H_