2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
28 #include "main/mtypes.h"
30 #include "radeon_debug.h"
31 #include "r700_shaderinst.h"
33 void Init_R700ControlFlowGenericClause(R700ControlFlowGenericClause* pInst)
35 pInst->m_Word0.val = 0x00000000;
36 pInst->m_Word1.val = 0x00000000;
38 pInst->m_pLinkedVTXInstruction = 0;
39 pInst->m_pLinkedTEXInstruction = 0;
43 pInst->m_ShaderInstType = SIT_CF_GENERIC;
46 void Init_R700ControlFlowALUClause(R700ControlFlowALUClause* pInst)
48 pInst->m_Word0.val = 0x00000000;
49 pInst->m_Word1.val = 0x00000000;
51 pInst->m_pLinkedALUInstruction = 0;
55 pInst->m_ShaderInstType = SIT_CF_ALU;
58 void Init_R700ControlFlowSXClause(R700ControlFlowSXClause* pInst)
60 pInst->m_Word0.val = 0x00000000;
61 pInst->m_Word1.val = 0x00000000;
62 pInst->m_Word1_SWIZ.val = 0x00000000;
66 pInst->m_ShaderInstType = SIT_CF_ALL_EXP_SX;
69 void Init_R700ControlFlowSMXClause(R700ControlFlowSMXClause* pInst)
71 pInst->m_Word0.val = 0x00000000;
72 pInst->m_Word1.val = 0x00000000;
73 pInst->m_Word1_BUF.val = 0x00000000;
77 pInst->m_ShaderInstType = SIT_CF_ALL_EXP_SMX;
80 void Init_R700ALUInstruction(R700ALUInstruction* pInst)
82 pInst->m_Word0.val = 0x00000000;
83 pInst->m_Word1.val = 0x00000000;
84 pInst->m_Word1_OP2.val = 0x00000000;
85 pInst->m_Word1_OP3.val = 0x00000000;
87 pInst->m_pLinkedALUClause = 0;
91 pInst->m_ShaderInstType = SIT_ALU;
94 void Init_R700ALUInstructionHalfLiteral(R700ALUInstructionHalfLiteral* pInst, GLfloat x, GLfloat y)
96 pInst->m_Word0.val = 0x00000000;
97 pInst->m_Word1.val = 0x00000000;
98 pInst->m_Word1_OP2.val = 0x00000000;
99 pInst->m_Word1_OP3.val = 0x00000000;
101 pInst->m_pLinkedALUClause = 0;
103 pInst->m_fLiteralX = x;
104 pInst->m_fLiteralY = y;
108 pInst->m_ShaderInstType = SIT_ALU_HALF_LIT;
111 void Init_R700ALUInstructionFullLiteral(R700ALUInstructionFullLiteral* pInst, GLfloat x, GLfloat y, GLfloat z, GLfloat w)
113 pInst->m_Word0.val = 0x00000000;
114 pInst->m_Word1.val = 0x00000000;
115 pInst->m_Word1_OP2.val = 0x00000000;
116 pInst->m_Word1_OP3.val = 0x00000000;
118 pInst->m_pLinkedALUClause = 0;
120 pInst->m_fLiteralX = x;
121 pInst->m_fLiteralY = y;
122 pInst->m_fLiteralZ = z;
123 pInst->m_fLiteralW = w;
127 pInst->m_ShaderInstType = SIT_ALU_FALL_LIT;
130 void Init_R700TextureInstruction(R700TextureInstruction* pInst)
132 pInst->m_Word0.val = 0x00000000;
133 pInst->m_Word1.val = 0x00000000;
134 pInst->m_Word2.val = 0x00000000;
136 pInst->m_pLinkedGenericClause = 0;
140 pInst->m_ShaderInstType = SIT_TEX;
143 void Init_R700VertexSemanticFetch(R700VertexSemanticFetch* pInst)
145 pInst->m_Word0.val = 0x00000000;
146 pInst->m_Word1.val = 0x00000000;
147 pInst->m_Word1_SEM.val = 0x00000000;
148 pInst->m_Word2.val = 0x00000000;
150 pInst->m_pLinkedGenericClause = 0;
154 pInst->m_ShaderInstType = SIT_VTX_SEM;
157 void Init_R700VertexGenericFetch(R700VertexGenericFetch* pInst)
159 pInst->m_Word0.val = 0x00000000;
160 pInst->m_Word1.val = 0x00000000;
161 pInst->m_Word1_GPR.val = 0x00000000;
162 pInst->m_Word2.val = 0x00000000;
164 pInst->m_pLinkedGenericClause = 0;
168 pInst->m_ShaderInstType = SIT_VTX_GENERIC;
171 unsigned int GetInstructionSize(ShaderInstType instType)
175 case SIT_ALU_HALF_LIT:
178 case SIT_VTX_GENERIC:
181 case SIT_ALU_FALL_LIT:
190 unsigned int GetCFMaxInstructions(ShaderInstType instType)
195 case SIT_CF_ALL_EXP_SX:
196 case SIT_CF_ALL_EXP_SMX:
199 return 0x8; //For tex and vtx
208 GLboolean LinkVertexInstruction(R700ControlFlowGenericClause *pCFGeneric,
209 R700VertexInstruction *pVTXInstruction)
211 if (pCFGeneric->m_pLinkedTEXInstruction != 0)
213 radeon_error("This instruction is already linked to a texture instruction.\n");
217 pCFGeneric->m_pLinkedVTXInstruction = pVTXInstruction;
218 pVTXInstruction->m_pLinkedGenericClause = pCFGeneric;