Tizen 2.0 Release
[profile/ivi/osmesa.git] / src / mesa / drivers / dri / r600 / r600_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31  * \file
32  *
33  * \author Keith Whitwell <keith@tungstengraphics.com>
34  *
35  * \author Nicolai Haehnle <prefect_@gmx.net>
36  */
37
38 #include "main/glheader.h"
39 #include "main/api_arrayelt.h"
40 #include "main/context.h"
41 #include "main/simple_list.h"
42 #include "main/imports.h"
43 #include "main/extensions.h"
44 #include "main/bufferobj.h"
45 #include "main/texobj.h"
46 #include "main/points.h"
47 #include "main/mfeatures.h"
48
49 #include "swrast/swrast.h"
50 #include "swrast_setup/swrast_setup.h"
51 #include "vbo/vbo.h"
52
53 #include "tnl/tnl.h"
54 #include "tnl/t_pipeline.h"
55
56 #include "drivers/common/driverfuncs.h"
57
58 #include "radeon_debug.h"
59 #include "r600_context.h"
60 #include "radeon_common_context.h"
61 #include "radeon_buffer_objects.h"
62 #include "radeon_span.h"
63 #include "r600_cmdbuf.h"
64 #include "radeon_bocs_wrapper.h"
65 #include "radeon_queryobj.h"
66 #include "r600_blit.h"
67
68 #include "r700_state.h"
69 #include "r700_ioctl.h"
70
71 #include "evergreen_context.h"
72 #include "evergreen_state.h"
73 #include "evergreen_tex.h"
74 #include "evergreen_ioctl.h"
75 #include "evergreen_oglprog.h"
76
77 #include "utils.h"
78
79 #define R600_ENABLE_GLSL_TEST 1
80
81 #define need_GL_VERSION_2_0
82 #define need_GL_VERSION_2_1
83 #define need_GL_ARB_draw_elements_base_vertex
84 #define need_GL_ARB_occlusion_query
85 #define need_GL_ARB_point_parameters
86 #define need_GL_ARB_vertex_program
87 #define need_GL_EXT_blend_equation_separate
88 #define need_GL_EXT_blend_func_separate
89 #define need_GL_EXT_blend_minmax
90 #define need_GL_EXT_framebuffer_object
91 #define need_GL_EXT_fog_coord
92 #define need_GL_EXT_gpu_program_parameters
93 #define need_GL_EXT_provoking_vertex
94 #define need_GL_EXT_secondary_color
95 #define need_GL_EXT_stencil_two_side
96 #define need_GL_ATI_separate_stencil
97 #define need_GL_NV_vertex_program
98 #define need_GL_OES_EGL_image
99
100 #include "main/remap_helper.h"
101
102 static const struct dri_extension card_extensions[] = {
103   /* *INDENT-OFF* */
104   {"GL_ARB_depth_clamp",                NULL},
105   {"GL_ARB_depth_texture",              NULL},
106   {"GL_ARB_fragment_program",           NULL},
107   {"GL_ARB_fragment_program_shadow",    NULL},
108   {"GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions},
109   {"GL_ARB_multitexture",               NULL},
110   {"GL_ARB_point_parameters",           GL_ARB_point_parameters_functions},
111   {"GL_ARB_shadow",                     NULL},
112   {"GL_ARB_shadow_ambient",             NULL},
113   {"GL_ARB_texture_border_clamp",       NULL},
114   {"GL_ARB_texture_cube_map",           NULL},
115   {"GL_ARB_texture_env_add",            NULL},
116   {"GL_ARB_texture_env_combine",        NULL},
117   {"GL_ARB_texture_env_crossbar",       NULL},
118   {"GL_ARB_texture_env_dot3",           NULL},
119   {"GL_ARB_texture_mirrored_repeat",    NULL},
120   {"GL_ARB_texture_non_power_of_two",   NULL},
121   {"GL_ARB_vertex_program",             GL_ARB_vertex_program_functions},
122   {"GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions},
123   {"GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions},
124   {"GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions},
125   {"GL_EXT_blend_subtract",             NULL},
126   {"GL_EXT_packed_depth_stencil",       NULL},
127   {"GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
128   {"GL_EXT_gpu_program_parameters",     GL_EXT_gpu_program_parameters_functions},
129   {"GL_EXT_provoking_vertex",           GL_EXT_provoking_vertex_functions },
130   {"GL_EXT_secondary_color",            GL_EXT_secondary_color_functions},
131   {"GL_EXT_shadow_funcs",               NULL},
132   {"GL_EXT_stencil_two_side",           GL_EXT_stencil_two_side_functions},
133   {"GL_EXT_stencil_wrap",               NULL},
134   {"GL_EXT_texture_edge_clamp",         NULL},
135   {"GL_EXT_texture_env_combine",        NULL},
136   {"GL_EXT_texture_env_dot3",           NULL},
137   {"GL_EXT_texture_filter_anisotropic", NULL},
138   {"GL_EXT_texture_lod_bias",           NULL},
139   {"GL_EXT_texture_mirror_clamp",       NULL},
140   {"GL_EXT_texture_rectangle",          NULL},
141   {"GL_EXT_vertex_array_bgra",          NULL},
142   {"GL_EXT_texture_sRGB",               NULL},
143   {"GL_ATI_separate_stencil",           GL_ATI_separate_stencil_functions},
144   {"GL_ATI_texture_env_combine3",       NULL},
145   {"GL_ATI_texture_mirror_once",        NULL},
146   {"GL_MESA_pack_invert",               NULL},
147   {"GL_MESA_ycbcr_texture",             NULL},
148   {"GL_NV_blend_square",                NULL},
149   {"GL_NV_vertex_program",              GL_NV_vertex_program_functions},
150   {"GL_ARB_pixel_buffer_object",        NULL},
151   {"GL_ARB_draw_elements_base_vertex",  GL_ARB_draw_elements_base_vertex_functions },
152 #if FEATURE_OES_EGL_image
153   {"GL_OES_EGL_image",                  GL_OES_EGL_image_functions},
154 #endif
155   {NULL,                                NULL}
156   /* *INDENT-ON* */
157 };
158
159
160 static const struct dri_extension mm_extensions[] = {
161   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
162   { NULL, NULL }
163 };
164
165 /**
166  * The GL 2.0 functions are needed to make display lists work with
167  * functions added by GL_ATI_separate_stencil.
168  */
169 static const struct dri_extension gl_20_extension[] = {
170 #ifdef R600_ENABLE_GLSL_TEST
171     {"GL_ARB_shading_language_100",                     GL_VERSION_2_0_functions },
172 #else
173   {"GL_VERSION_2_0",                    GL_VERSION_2_0_functions },
174 #endif /* R600_ENABLE_GLSL_TEST */
175   {NULL, NULL}
176 };
177
178 static const struct tnl_pipeline_stage *r600_pipeline[] = {
179         /* Catch any t&l fallbacks
180          */
181         &_tnl_vertex_transform_stage,
182         &_tnl_normal_transform_stage,
183         &_tnl_lighting_stage,
184         &_tnl_fog_coordinate_stage,
185         &_tnl_texgen_stage,
186         &_tnl_texture_transform_stage,
187         &_tnl_point_attenuation_stage,
188         &_tnl_vertex_program_stage,
189         &_tnl_render_stage,
190         0,
191 };
192
193 static void r600_get_lock(radeonContextPtr rmesa)
194 {
195         drm_radeon_sarea_t *sarea = rmesa->sarea;
196
197         if (sarea->ctx_owner != rmesa->dri.hwContext) {
198                 sarea->ctx_owner = rmesa->dri.hwContext;
199                 if (!rmesa->radeonScreen->kernel_mm)
200                         radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
201         }
202 }
203
204 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
205 {
206     /* please flush pipe do all pending work */
207     /* to be enabled */
208 }
209
210 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
211 {
212         r700Start3D((context_t *)radeon);
213 }
214
215 static void r600_fallback(struct gl_context *ctx, GLuint bit, GLboolean mode)
216 {
217         context_t *context = R700_CONTEXT(ctx);
218         if (mode)
219                 context->radeon.Fallback |= bit;
220         else
221                 context->radeon.Fallback &= ~bit;
222 }
223
224 static void r600_emit_query_finish(radeonContextPtr radeon)
225 {
226         context_t *context = (context_t*) radeon;
227         BATCH_LOCALS(&context->radeon);
228
229         struct radeon_query_object *query = radeon->query.current;
230
231         BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
232         R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
233         R600_OUT_BATCH(R600_EVENT_TYPE(ZPASS_DONE) | R600_EVENT_INDEX(1));
234         R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
235         R600_OUT_BATCH(0x00000000);
236         R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
237         END_BATCH();
238         assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
239         query->emitted_begin = GL_FALSE;
240 }
241
242 static void r600_init_vtbl(radeonContextPtr radeon)
243 {
244         radeon->vtbl.get_lock = r600_get_lock;
245         radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
246         radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
247         radeon->vtbl.swtcl_flush = NULL;
248         radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
249         radeon->vtbl.fallback = r600_fallback;
250         radeon->vtbl.emit_query_finish = r600_emit_query_finish;
251         radeon->vtbl.check_blit = r600_check_blit;
252         radeon->vtbl.blit = r600_blit;
253         radeon->vtbl.is_format_renderable = r600IsFormatRenderable;
254 }
255
256 static void r600InitConstValues(struct gl_context *ctx, radeonScreenPtr screen)
257 {
258     context_t         *context = R700_CONTEXT(ctx);
259     R700_CHIP_CONTEXT *r700    = (R700_CHIP_CONTEXT*)(&context->hw);
260
261     if(  (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
262        &&(context->radeon.radeonScreen->chip_family <= CHIP_FAMILY_CAICOS) )
263     {
264         r700->bShaderUseMemConstant = GL_TRUE;
265     }
266     else
267     {
268         r700->bShaderUseMemConstant = GL_FALSE;
269     }
270
271         ctx->Const.GLSLVersion = 120;
272
273         ctx->Const.MaxTextureImageUnits = 16;
274         /* 8 per clause on r6xx, 16 on r7xx
275          * but I think mesa only supports 8 at the moment
276          */
277         ctx->Const.MaxTextureCoordUnits = 8;
278         ctx->Const.MaxTextureUnits =
279             MIN2(ctx->Const.MaxTextureImageUnits,
280                  ctx->Const.MaxTextureCoordUnits);
281         ctx->Const.MaxCombinedTextureImageUnits =
282                 ctx->Const.MaxVertexTextureImageUnits +
283                 ctx->Const.MaxTextureImageUnits;
284
285         ctx->Const.MaxTextureMaxAnisotropy = 16.0;
286         ctx->Const.MaxTextureLodBias = 16.0;
287
288         if (screen->chip_family >= CHIP_FAMILY_CEDAR) {
289                 ctx->Const.MaxTextureLevels = 15;
290                 ctx->Const.MaxTextureRectSize = 16384;
291         } else {
292                 ctx->Const.MaxTextureLevels = 14;
293                 ctx->Const.MaxTextureRectSize = 8192;
294         }
295
296         ctx->Const.MinPointSize   = 0x0001 / 8.0;
297         ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
298         ctx->Const.MaxPointSize   = 0xffff / 8.0;
299         ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
300
301         ctx->Const.MinLineWidth   = 0x0001 / 8.0;
302         ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
303         ctx->Const.MaxLineWidth   = 0xffff / 8.0;
304         ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
305
306         ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
307         ctx->Const.MaxColorAttachments = 1;
308         ctx->Const.MaxRenderbufferSize = 4096;
309
310         /* 256 for reg-based consts, inline consts also supported */
311         ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
312         ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
313         ctx->Const.VertexProgram.MaxNativeAttribs = 160;
314         ctx->Const.VertexProgram.MaxTemps = 128;
315         ctx->Const.VertexProgram.MaxNativeTemps = 128;
316         ctx->Const.VertexProgram.MaxNativeParameters = 256;
317         ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
318
319         ctx->Const.FragmentProgram.MaxNativeTemps = 128;
320         ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
321         ctx->Const.FragmentProgram.MaxNativeParameters = 256;
322         ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
323         /* 8 per clause on r6xx, 16 on r7xx */
324         if (screen->chip_family >= CHIP_FAMILY_RV770)
325                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
326         else
327                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
328         ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
329         ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
330         ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;    /* and these are?? */
331 }
332
333 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
334 {
335         /* Parse configuration files.
336          * Do this here so that initialMaxAnisotropy is set before we create
337          * the default textures.
338          */
339         driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
340                             screen->driScreen->myNum, "r600");
341
342         r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
343                                                             "def_max_anisotropy");
344
345 }
346
347 static void r600InitGLExtensions(struct gl_context *ctx)
348 {
349         context_t *r600 = R700_CONTEXT(ctx);
350 #ifdef R600_ENABLE_GLSL_TEST
351         unsigned i;
352 #endif
353
354         driInitExtensions(ctx, card_extensions, GL_TRUE);
355         if (r600->radeon.radeonScreen->kernel_mm)
356           driInitExtensions(ctx, mm_extensions, GL_FALSE);
357
358 #ifdef R600_ENABLE_GLSL_TEST
359     driInitExtensions(ctx, gl_20_extension, GL_TRUE);
360     _mesa_enable_2_0_extensions(ctx);
361     
362         /* glsl compiler has problem if this is not GL_TRUE */
363         for (i = 0; i <= MESA_SHADER_FRAGMENT; i++)
364                 ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
365 #endif /* R600_ENABLE_GLSL_TEST */
366
367         if (driQueryOptionb
368             (&r600->radeon.optionCache, "disable_stencil_two_side"))
369                 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
370
371         if (r600->radeon.glCtx->Mesa_DXTn
372             && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
373                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
374                 _mesa_enable_extension(ctx, "GL_S3_s3tc");
375         } else
376             if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
377         {
378                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
379         }
380
381         /* RV740 had a broken pipe config prior to drm 1.32 */
382         if (!r600->radeon.radeonScreen->kernel_mm) {
383                 if ((r600->radeon.dri.drmMinor < 32) &&
384                     (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740))
385                         _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
386         }
387 }
388
389 /* Create the device specific rendering context.
390  */
391 GLboolean r600CreateContext(gl_api api,
392                             const struct gl_config * glVisual,
393                             __DRIcontext * driContextPriv,
394                             void *sharedContextPrivate)
395 {
396         __DRIscreen *sPriv = driContextPriv->driScreenPriv;
397         radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
398         struct dd_function_table functions;
399         context_t *r600;
400         struct gl_context *ctx;
401
402         assert(glVisual);
403         assert(driContextPriv);
404         assert(screen);
405
406         /* Allocate the R600 context */
407         r600 = (context_t*) CALLOC(sizeof(*r600));
408         if (!r600) {
409                 radeon_error("Failed to allocate memory for context.\n");
410                 return GL_FALSE;
411         }
412
413         r600ParseOptions(r600, screen);
414
415         r600->radeon.radeonScreen = screen;
416
417     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
418     {
419             evergreen_init_vtbl(&r600->radeon);
420     }
421     else
422     {
423         r600_init_vtbl(&r600->radeon);
424     }
425     
426         /* Init default driver functions then plug in our R600-specific functions
427          * (the texture functions are especially important)
428          */
429         _mesa_init_driver_functions(&functions);
430
431     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
432     {
433         evergreenCreateChip(r600);
434         evergreenInitStateFuncs(&r600->radeon, &functions);
435             evergreenInitTextureFuncs(&r600->radeon, &functions);
436             evergreenInitShaderFuncs(&functions);
437     }
438     else
439     {
440             r700InitStateFuncs(&r600->radeon, &functions);
441             r600InitTextureFuncs(&r600->radeon, &functions);
442             r700InitShaderFuncs(&functions);
443     }
444     
445         radeonInitQueryObjFunctions(&functions);
446
447     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
448     {
449         evergreenInitIoctlFuncs(&functions);
450     }
451     else
452     {
453             r700InitIoctlFuncs(&functions);
454     }
455         radeonInitBufferObjectFuncs(&functions);
456
457         if (!radeonInitContext(&r600->radeon, &functions,
458                                glVisual, driContextPriv,
459                                sharedContextPrivate)) {
460                 radeon_error("Initializing context failed.\n");
461                 FREE(r600);
462                 return GL_FALSE;
463         }
464
465         ctx = r600->radeon.glCtx;
466
467         ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
468         ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
469
470         r600InitConstValues(ctx, screen);
471
472         /* reinit, it depends on consts above */
473         _mesa_init_point(ctx);
474
475         _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
476
477         /* Initialize the software rasterizer and helper modules.
478          */
479         _swrast_CreateContext(ctx);
480         _vbo_CreateContext(ctx);
481         _tnl_CreateContext(ctx);
482         _swsetup_CreateContext(ctx);
483         _swsetup_Wakeup(ctx);
484
485         /* Install the customized pipeline:
486          */
487         _tnl_destroy_pipeline(ctx);
488         _tnl_install_pipeline(ctx, r600_pipeline);
489         TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
490
491         /* Configure swrast and TNL to match hardware characteristics:
492          */
493         _swrast_allow_pixel_fog(ctx, GL_FALSE);
494         _swrast_allow_vertex_fog(ctx, GL_TRUE);
495         _tnl_allow_pixel_fog(ctx, GL_FALSE);
496         _tnl_allow_vertex_fog(ctx, GL_TRUE);
497
498         radeon_init_debug();
499
500     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
501     {
502         evergreenInitDraw(ctx);
503     }
504     else
505     {
506             r700InitDraw(ctx);
507     }
508
509         radeon_fbo_init(&r600->radeon);
510         radeonInitSpanFuncs( ctx );
511         r600InitCmdBuf(r600);
512
513     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
514     {
515         evergreenInitState(r600->radeon.glCtx);
516     }
517     else
518     {
519             r700InitState(r600->radeon.glCtx);
520     }
521
522         r600InitGLExtensions(ctx);
523
524         return GL_TRUE;
525 }
526
527 void r600DestroyContext(__DRIcontext *driContextPriv )
528 {
529     void      *pChip;
530     context_t *context = (context_t *) driContextPriv->driverPrivate;
531
532     assert(context);
533
534     pChip = context->pChip;
535
536     /* destroy context first, free pChip, in case there are things flush to asic. */
537     radeonDestroyContext(driContextPriv);
538
539     FREE(pChip);
540 }
541
542