src/mesa/drivers/dri/r600/evergreen_state.c

   1 /*
   2  * Copyright (C) 2008-2009  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  */
  26
  27 #include "main/glheader.h"
  28 #include "main/mtypes.h"
  29 #include "main/imports.h"
  30 #include "main/enums.h"
  31 #include "main/macros.h"
  32 #include "main/context.h"
  33 #include "main/dd.h"
  34 #include "main/simple_list.h"
  35 #include "main/state.h"
  36
  37 #include "tnl/tnl.h"
  38 #include "tnl/t_pipeline.h"
  39 #include "swrast/swrast.h"
  40 #include "swrast_setup/swrast_setup.h"
  41 #include "main/api_arrayelt.h"
  42 #include "main/framebuffer.h"
  43 #include "drivers/common/meta.h"
  44 #include "program/prog_parameter.h"
  45 #include "program/prog_statevars.h"
  46
  47 #include "vbo/vbo.h"
  48
  49 #include "r600_context.h"
  50
  51 #include "evergreen_state.h"
  52 #include "evergreen_diff.h"
  53 #include "evergreen_vertprog.h"
  54 #include "evergreen_fragprog.h"
  55 #include "evergreen_tex.h"
  56
  57 void evergreenUpdateStateParameters(struct gl_context * ctx, GLuint new_state); //same
  58
  59 void evergreenUpdateShaders(struct gl_context * ctx)
  60 {
  61     context_t *context = EVERGREEN_CONTEXT(ctx);
  62
  63     /* should only happenen once, just after context is created */
  64     /* TODO: shouldn't we fallback to sw here? */
  65     if (!ctx->FragmentProgram._Current) {
  66             fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
  67             return;
  68     }
  69
  70     evergreenSelectFragmentShader(ctx);
  71
  72     evergreenSelectVertexShader(ctx);
  73     evergreenUpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
  74     context->radeon.NewGLState = 0;
  75 }
  76
  77 void evergreeUpdateShaders(struct gl_context * ctx)
  78 {
  79     context_t *context = R700_CONTEXT(ctx);
  80
  81     /* should only happenen once, just after context is created */
  82     /* TODO: shouldn't we fallback to sw here? */
  83     if (!ctx->FragmentProgram._Current) {
  84             fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
  85             return;
  86     }
  87
  88     evergreenSelectFragmentShader(ctx);
  89
  90     evergreenSelectVertexShader(ctx);
  91     evergreenUpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
  92     context->radeon.NewGLState = 0;
  93 }
  94
  95 /*
  96  * To correctly position primitives:
  97  */
  98 void evergreenUpdateViewportOffset(struct gl_context * ctx) //------------------
  99 {
 100         context_t *context = R700_CONTEXT(ctx);
 101         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 102         __DRIdrawable *dPriv = radeon_get_drawable(&context->radeon);
 103         GLfloat xoffset = (GLfloat) dPriv->x;
 104         GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
 105         const GLfloat *v = ctx->Viewport._WindowMap.m;
 106         int id = 0;
 107
 108         GLfloat tx = v[MAT_TX] + xoffset;
 109         GLfloat ty = (-v[MAT_TY]) + yoffset;
 110
 111         if (evergreen->viewport[id].PA_CL_VPORT_XOFFSET.f32All != tx ||
 112             evergreen->viewport[id].PA_CL_VPORT_YOFFSET.f32All != ty) {
 113                 /* Note: this should also modify whatever data the context reset
 114                  * code uses...
 115                  */
 116                 EVERGREEN_STATECHANGE(context, pa);
 117                 evergreen->viewport[id].PA_CL_VPORT_XOFFSET.f32All = tx;
 118                 evergreen->viewport[id].PA_CL_VPORT_YOFFSET.f32All = ty;
 119         }
 120
 121         radeonUpdateScissor(ctx);
 122 }
 123
 124 void evergreenUpdateStateParameters(struct gl_context * ctx, GLuint new_state) //same
 125 {
 126         struct evergreen_fragment_program *fp =
 127                 (struct evergreen_fragment_program *)ctx->FragmentProgram._Current;
 128         struct gl_program_parameter_list *paramList;
 129
 130         if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS)))
 131                 return;
 132
 133         if (!ctx->FragmentProgram._Current || !fp)
 134                 return;
 135
 136         paramList = ctx->FragmentProgram._Current->Base.Parameters;
 137
 138         if (!paramList)
 139                 return;
 140
 141         _mesa_load_state_parameters(ctx, paramList);
 142
 143 }
 144
 145 /**
 146  * Called by Mesa after an internal state update.
 147  */
 148 static void evergreenInvalidateState(struct gl_context * ctx, GLuint new_state) //same
 149 {
 150     context_t *context = EVERGREEN_CONTEXT(ctx);
 151
 152     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 153
 154     _swrast_InvalidateState(ctx, new_state);
 155     _swsetup_InvalidateState(ctx, new_state);
 156     _vbo_InvalidateState(ctx, new_state);
 157     _tnl_InvalidateState(ctx, new_state);
 158     _ae_invalidate_state(ctx, new_state);
 159
 160     if (new_state & _NEW_BUFFERS) {
 161             _mesa_update_framebuffer(ctx);
 162             /* this updates the DrawBuffer's Width/Height if it's a FBO */
 163             _mesa_update_draw_buffer_bounds(ctx);
 164
 165             EVERGREEN_STATECHANGE(context, cb);
 166             EVERGREEN_STATECHANGE(context, db);
 167     }
 168
 169     if (new_state & (_NEW_LIGHT)) {
 170             EVERGREEN_STATECHANGE(context, pa);
 171             if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION)
 172                     SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, PROVOKING_VTX_LAST_bit);
 173             else
 174                     CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, PROVOKING_VTX_LAST_bit);
 175     }
 176
 177     evergreenUpdateStateParameters(ctx, new_state);
 178
 179     EVERGREEN_STATECHANGE(context, pa);
 180     EVERGREEN_STATECHANGE(context, spi);
 181
 182     if(GL_TRUE == evergreen->bEnablePerspective)
 183     {
 184         /* Do scale XY and Z by 1/W0 for perspective correction on pos. For orthogonal case, set both to one. */
 185         CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_XY_FMT_bit);
 186         CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_Z_FMT_bit);
 187
 188         SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_W0_FMT_bit);
 189
 190         SETbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, PERSP_GRADIENT_ENA_bit);
 191         CLEARbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
 192
 193         SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
 194                          EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift,
 195                  EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask);
 196     }
 197     else
 198     {
 199         /* For orthogonal case. */
 200         SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_XY_FMT_bit);
 201         SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_Z_FMT_bit);
 202
 203         SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_W0_FMT_bit);
 204
 205         CLEARbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, PERSP_GRADIENT_ENA_bit);
 206         SETbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
 207
 208         SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
 209                          EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift,
 210                  EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask);
 211     }
 212
 213     context->radeon.NewGLState |= new_state;
 214 }
 215
 216 static void evergreenSetAlphaState(struct gl_context * ctx)  //same
 217 {
 218         context_t *context = EVERGREEN_CONTEXT(ctx);
 219         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 220         uint32_t alpha_func = REF_ALWAYS;
 221         GLboolean really_enabled = ctx->Color.AlphaEnabled;
 222
 223         EVERGREEN_STATECHANGE(context, sx);
 224
 225         switch (ctx->Color.AlphaFunc) {
 226         case GL_NEVER:
 227                 alpha_func = REF_NEVER;
 228                 break;
 229         case GL_LESS:
 230                 alpha_func = REF_LESS;
 231                 break;
 232         case GL_EQUAL:
 233                 alpha_func = REF_EQUAL;
 234                 break;
 235         case GL_LEQUAL:
 236                 alpha_func = REF_LEQUAL;
 237                 break;
 238         case GL_GREATER:
 239                 alpha_func = REF_GREATER;
 240                 break;
 241         case GL_NOTEQUAL:
 242                 alpha_func = REF_NOTEQUAL;
 243                 break;
 244         case GL_GEQUAL:
 245                 alpha_func = REF_GEQUAL;
 246                 break;
 247         case GL_ALWAYS:
 248                 /*alpha_func = REF_ALWAYS; */
 249                 really_enabled = GL_FALSE;
 250                 break;
 251         }
 252
 253         if (really_enabled) {
 254                 SETfield(evergreen->SX_ALPHA_TEST_CONTROL.u32All, alpha_func,
 255                          ALPHA_FUNC_shift, ALPHA_FUNC_mask);
 256                 SETbit(evergreen->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit);
 257                 evergreen->SX_ALPHA_REF.f32All = ctx->Color.AlphaRef;
 258         } else {
 259                 CLEARbit(evergreen->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit);
 260         }
 261 }
 262
 263 static void evergreenAlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref) //same
 264 {
 265         (void)func;
 266         (void)ref;
 267         evergreenSetAlphaState(ctx);
 268 }
 269
 270 static void evergreenBlendColor(struct gl_context * ctx, const GLfloat cf[4]) //same
 271 {
 272         context_t *context = EVERGREEN_CONTEXT(ctx);
 273         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 274
 275         EVERGREEN_STATECHANGE(context, cb);
 276
 277         evergreen->CB_BLEND_RED.f32All = cf[0];
 278         evergreen->CB_BLEND_GREEN.f32All = cf[1];
 279         evergreen->CB_BLEND_BLUE.f32All = cf[2];
 280         evergreen->CB_BLEND_ALPHA.f32All = cf[3];
 281 }
 282
 283 static int evergreenblend_factor(GLenum factor, GLboolean is_src) //same
 284 {
 285         switch (factor) {
 286         case GL_ZERO:
 287                 return BLEND_ZERO;
 288                 break;
 289         case GL_ONE:
 290                 return BLEND_ONE;
 291                 break;
 292         case GL_DST_COLOR:
 293                 return BLEND_DST_COLOR;
 294                 break;
 295         case GL_ONE_MINUS_DST_COLOR:
 296                 return BLEND_ONE_MINUS_DST_COLOR;
 297                 break;
 298         case GL_SRC_COLOR:
 299                 return BLEND_SRC_COLOR;
 300                 break;
 301         case GL_ONE_MINUS_SRC_COLOR:
 302                 return BLEND_ONE_MINUS_SRC_COLOR;
 303                 break;
 304         case GL_SRC_ALPHA:
 305                 return BLEND_SRC_ALPHA;
 306                 break;
 307         case GL_ONE_MINUS_SRC_ALPHA:
 308                 return BLEND_ONE_MINUS_SRC_ALPHA;
 309                 break;
 310         case GL_DST_ALPHA:
 311                 return BLEND_DST_ALPHA;
 312                 break;
 313         case GL_ONE_MINUS_DST_ALPHA:
 314                 return BLEND_ONE_MINUS_DST_ALPHA;
 315                 break;
 316         case GL_SRC_ALPHA_SATURATE:
 317                 return (is_src) ? BLEND_SRC_ALPHA_SATURATE : BLEND_ZERO;
 318                 break;
 319         case GL_CONSTANT_COLOR:
 320                 return BLEND_CONSTANT_COLOR;
 321                 break;
 322         case GL_ONE_MINUS_CONSTANT_COLOR:
 323                 return BLEND_ONE_MINUS_CONSTANT_COLOR;
 324                 break;
 325         case GL_CONSTANT_ALPHA:
 326                 return BLEND_CONSTANT_ALPHA;
 327                 break;
 328         case GL_ONE_MINUS_CONSTANT_ALPHA:
 329                 return BLEND_ONE_MINUS_CONSTANT_ALPHA;
 330                 break;
 331         default:
 332                 fprintf(stderr, "unknown blend factor %x\n", factor);
 333                 return (is_src) ? BLEND_ONE : BLEND_ZERO;
 334                 break;
 335         }
 336 }
 337
 338 static void evergreenSetBlendState(struct gl_context * ctx) //diff : CB_COLOR_CONTROL, CB_BLEND0_CONTROL bits
 339 {
 340         context_t *context = EVERGREEN_CONTEXT(ctx);
 341         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 342         uint32_t blend_reg = 0, eqn, eqnA;
 343
 344         EVERGREEN_STATECHANGE(context, cb);
 345
 346         if (_mesa_rgba_logicop_enabled(ctx) || !ctx->Color.BlendEnabled) {
 347                 SETfield(blend_reg,
 348                          BLEND_ONE, COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
 349                 SETfield(blend_reg,
 350                          BLEND_ZERO, COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
 351                 SETfield(blend_reg,
 352                          COMB_DST_PLUS_SRC, COLOR_COMB_FCN_shift, COLOR_COMB_FCN_mask);
 353                 SETfield(blend_reg,
 354                          BLEND_ONE, ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
 355                 SETfield(blend_reg,
 356                          BLEND_ZERO, ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
 357                 SETfield(blend_reg,
 358                          COMB_DST_PLUS_SRC, ALPHA_COMB_FCN_shift, ALPHA_COMB_FCN_mask);
 359                 //if (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_R600)
 360                 //      evergreen->CB_BLEND_CONTROL.u32All = blend_reg;
 361                 //else
 362                         evergreen->CB_BLEND0_CONTROL.u32All = blend_reg;
 363                 return;
 364         }
 365
 366         SETfield(blend_reg,
 367                  evergreenblend_factor(ctx->Color.Blend[0].SrcRGB, GL_TRUE),
 368                  COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
 369         SETfield(blend_reg,
 370                  evergreenblend_factor(ctx->Color.Blend[0].DstRGB, GL_FALSE),
 371                  COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
 372
 373         switch (ctx->Color.Blend[0].EquationRGB) {
 374         case GL_FUNC_ADD:
 375                 eqn = COMB_DST_PLUS_SRC;
 376                 break;
 377         case GL_FUNC_SUBTRACT:
 378                 eqn = COMB_SRC_MINUS_DST;
 379                 break;
 380         case GL_FUNC_REVERSE_SUBTRACT:
 381                 eqn = COMB_DST_MINUS_SRC;
 382                 break;
 383         case GL_MIN:
 384                 eqn = COMB_MIN_DST_SRC;
 385                 SETfield(blend_reg,
 386                          BLEND_ONE,
 387                          COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
 388                 SETfield(blend_reg,
 389                          BLEND_ONE,
 390                          COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
 391                 break;
 392         case GL_MAX:
 393                 eqn = COMB_MAX_DST_SRC;
 394                 SETfield(blend_reg,
 395                          BLEND_ONE,
 396                          COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
 397                 SETfield(blend_reg,
 398                          BLEND_ONE,
 399                          COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
 400                 break;
 401
 402         default:
 403                 fprintf(stderr,
 404                         "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
 405                         __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationRGB);
 406                 return;
 407         }
 408         SETfield(blend_reg,
 409                  eqn, COLOR_COMB_FCN_shift, COLOR_COMB_FCN_mask);
 410
 411         SETfield(blend_reg,
 412                  evergreenblend_factor(ctx->Color.Blend[0].SrcA, GL_TRUE),
 413                  ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
 414         SETfield(blend_reg,
 415                  evergreenblend_factor(ctx->Color.Blend[0].DstA, GL_FALSE),
 416                  ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
 417
 418         switch (ctx->Color.Blend[0].EquationA) {
 419         case GL_FUNC_ADD:
 420                 eqnA = COMB_DST_PLUS_SRC;
 421                 break;
 422         case GL_FUNC_SUBTRACT:
 423                 eqnA = COMB_SRC_MINUS_DST;
 424                 break;
 425         case GL_FUNC_REVERSE_SUBTRACT:
 426                 eqnA = COMB_DST_MINUS_SRC;
 427                 break;
 428         case GL_MIN:
 429                 eqnA = COMB_MIN_DST_SRC;
 430                 SETfield(blend_reg,
 431                          BLEND_ONE,
 432                          ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
 433                 SETfield(blend_reg,
 434                          BLEND_ONE,
 435                          ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
 436                 break;
 437         case GL_MAX:
 438                 eqnA = COMB_MAX_DST_SRC;
 439                 SETfield(blend_reg,
 440                          BLEND_ONE,
 441                          ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
 442                 SETfield(blend_reg,
 443                          BLEND_ONE,
 444                          ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
 445                 break;
 446         default:
 447                 fprintf(stderr,
 448                         "[%s:%u] Invalid A blend equation (0x%04x).\n",
 449                         __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationA);
 450                 return;
 451         }
 452
 453         SETfield(blend_reg,
 454                  eqnA, ALPHA_COMB_FCN_shift, ALPHA_COMB_FCN_mask);
 455
 456         SETbit(blend_reg, SEPARATE_ALPHA_BLEND_bit);
 457
 458     SETbit(blend_reg, EG_CB_BLENDX_CONTROL_ENABLE_bit);
 459
 460     evergreen->CB_BLEND0_CONTROL.u32All = blend_reg;
 461 }
 462
 463 static void evergreenBlendEquationSeparate(struct gl_context * ctx,
 464                                                       GLenum modeRGB, GLenum modeA) //same
 465 {
 466         evergreenSetBlendState(ctx);
 467 }
 468
 469 static void evergreenBlendFuncSeparate(struct gl_context * ctx,
 470                                   GLenum sfactorRGB, GLenum dfactorRGB,
 471                                   GLenum sfactorA, GLenum dfactorA) //same
 472 {
 473         evergreenSetBlendState(ctx);
 474 }
 475
 476 static GLuint evergreen_translate_logicop(GLenum logicop) //same
 477 {
 478         switch (logicop) {
 479         case GL_CLEAR:
 480                 return 0x00;
 481         case GL_SET:
 482                 return 0xff;
 483         case GL_COPY:
 484                 return 0xcc;
 485         case GL_COPY_INVERTED:
 486                 return 0x33;
 487         case GL_NOOP:
 488                 return 0xaa;
 489         case GL_INVERT:
 490                 return 0x55;
 491         case GL_AND:
 492                 return 0x88;
 493         case GL_NAND:
 494                 return 0x77;
 495         case GL_OR:
 496                 return 0xee;
 497         case GL_NOR:
 498                 return 0x11;
 499         case GL_XOR:
 500                 return 0x66;
 501         case GL_EQUIV:
 502                 return 0x99;
 503         case GL_AND_REVERSE:
 504                 return 0x44;
 505         case GL_AND_INVERTED:
 506                 return 0x22;
 507         case GL_OR_REVERSE:
 508                 return 0xdd;
 509         case GL_OR_INVERTED:
 510                 return 0xbb;
 511         default:
 512                 fprintf(stderr, "unknown blend logic operation %x\n", logicop);
 513                 return 0xcc;
 514         }
 515 }
 516
 517 static void evergreenSetLogicOpState(struct gl_context *ctx) //diff : CB_COLOR_CONTROL.ROP3 is actually same bits.
 518 {
 519         context_t *context = EVERGREEN_CONTEXT(ctx);
 520         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 521
 522         EVERGREEN_STATECHANGE(context, cb);
 523
 524         if (_mesa_rgba_logicop_enabled(ctx))
 525                 SETfield(evergreen->CB_COLOR_CONTROL.u32All,
 526                          evergreen_translate_logicop(ctx->Color.LogicOp),
 527              EG_CB_COLOR_CONTROL__ROP3_shift,
 528              EG_CB_COLOR_CONTROL__ROP3_mask);
 529         else
 530                 SETfield(evergreen->CB_COLOR_CONTROL.u32All, 0xCC,
 531              EG_CB_COLOR_CONTROL__ROP3_shift,
 532              EG_CB_COLOR_CONTROL__ROP3_mask);
 533 }
 534
 535 static void evergreenClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat *eq ) //same , but PA_CL_UCP_0_ offset diff
 536 {
 537         context_t *context = EVERGREEN_CONTEXT(ctx);
 538         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 539         GLint p;
 540         GLint *ip;
 541
 542         p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
 543         ip = (GLint *)ctx->Transform._ClipUserPlane[p];
 544
 545         EVERGREEN_STATECHANGE(context, pa);
 546
 547         evergreen->ucp[p].PA_CL_UCP_0_X.u32All = ip[0];
 548         evergreen->ucp[p].PA_CL_UCP_0_Y.u32All = ip[1];
 549         evergreen->ucp[p].PA_CL_UCP_0_Z.u32All = ip[2];
 550         evergreen->ucp[p].PA_CL_UCP_0_W.u32All = ip[3];
 551 }
 552
 553 static void evergreenSetClipPlaneState(struct gl_context * ctx, GLenum cap, GLboolean state) //diff in func calls
 554 {
 555         context_t *context = EVERGREEN_CONTEXT(ctx);
 556         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 557         GLuint p;
 558
 559         p = cap - GL_CLIP_PLANE0;
 560
 561         EVERGREEN_STATECHANGE(context, pa);
 562
 563         if (state) {
 564                 evergreen->PA_CL_CLIP_CNTL.u32All |= (UCP_ENA_0_bit << p);
 565                 evergreen->ucp[p].enabled = GL_TRUE;
 566                 evergreenClipPlane(ctx, cap, NULL);
 567         } else {
 568                 evergreen->PA_CL_CLIP_CNTL.u32All &= ~(UCP_ENA_0_bit << p);
 569                 evergreen->ucp[p].enabled = GL_FALSE;
 570         }
 571 }
 572
 573 static void evergreenSetDBRenderState(struct gl_context * ctx)
 574 {
 575     context_t *context = EVERGREEN_CONTEXT(ctx);
 576     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 577     struct evergreen_fragment_program *fp =
 578             (struct evergreen_fragment_program *)(ctx->FragmentProgram._Current);
 579
 580     EVERGREEN_STATECHANGE(context, db);
 581
 582     SETbit(evergreen->DB_SHADER_CONTROL.u32All,
 583            DUAL_EXPORT_ENABLE_bit);
 584     SETfield(evergreen->DB_SHADER_CONTROL.u32All, EARLY_Z_THEN_LATE_Z,
 585              Z_ORDER_shift,
 586              Z_ORDER_mask);
 587         /* XXX need to enable htile for hiz/s */
 588     SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE,
 589              FORCE_HIZ_ENABLE_shift,
 590              FORCE_HIZ_ENABLE_mask);
 591     SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE,
 592              FORCE_HIS_ENABLE0_shift,
 593              FORCE_HIS_ENABLE0_mask);
 594     SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE,
 595              FORCE_HIS_ENABLE1_shift,
 596              FORCE_HIS_ENABLE1_mask);
 597
 598     if (context->radeon.query.current)
 599     {
 600         SETbit(evergreen->DB_RENDER_OVERRIDE.u32All, NOOP_CULL_DISABLE_bit);
 601         SETbit(evergreen->DB_COUNT_CONTROL.u32All,
 602                EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit);
 603     }
 604     else
 605     {
 606         CLEARbit(evergreen->DB_RENDER_OVERRIDE.u32All, NOOP_CULL_DISABLE_bit);
 607         CLEARbit(evergreen->DB_COUNT_CONTROL.u32All,
 608                  EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit);
 609     }
 610
 611     if (fp)
 612     {
 613         if (fp->r700Shader.killIsUsed)
 614         {
 615             SETbit(evergreen->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
 616         }
 617         else
 618         {
 619             CLEARbit(evergreen->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
 620         }
 621
 622         if (fp->r700Shader.depthIsExported)
 623         {
 624             SETbit(evergreen->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
 625         }
 626         else
 627         {
 628             CLEARbit(evergreen->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
 629         }
 630     }
 631 }
 632
 633 void evergreenUpdateShaderStates(struct gl_context * ctx)
 634 {
 635         evergreenSetDBRenderState(ctx);
 636         evergreenUpdateTextureState(ctx);
 637 }
 638
 639 static void evergreenSetDepthState(struct gl_context * ctx) //same
 640 {
 641         context_t *context = EVERGREEN_CONTEXT(ctx);
 642         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 643
 644         EVERGREEN_STATECHANGE(context, db);
 645
 646     if (ctx->Depth.Test)
 647     {
 648         SETbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_ENABLE_bit);
 649         if (ctx->Depth.Mask)
 650         {
 651             SETbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
 652         }
 653         else
 654         {
 655             CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
 656         }
 657
 658         switch (ctx->Depth.Func)
 659         {
 660         case GL_NEVER:
 661             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_NEVER,
 662                      ZFUNC_shift, ZFUNC_mask);
 663             break;
 664         case GL_LESS:
 665             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_LESS,
 666                      ZFUNC_shift, ZFUNC_mask);
 667             break;
 668         case GL_EQUAL:
 669             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_EQUAL,
 670                      ZFUNC_shift, ZFUNC_mask);
 671             break;
 672         case GL_LEQUAL:
 673             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_LEQUAL,
 674                      ZFUNC_shift, ZFUNC_mask);
 675             break;
 676         case GL_GREATER:
 677             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_GREATER,
 678                      ZFUNC_shift, ZFUNC_mask);
 679             break;
 680         case GL_NOTEQUAL:
 681             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_NOTEQUAL,
 682                      ZFUNC_shift, ZFUNC_mask);
 683             break;
 684         case GL_GEQUAL:
 685             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_GEQUAL,
 686                      ZFUNC_shift, ZFUNC_mask);
 687             break;
 688         case GL_ALWAYS:
 689             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_ALWAYS,
 690                      ZFUNC_shift, ZFUNC_mask);
 691             break;
 692         default:
 693             SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_ALWAYS,
 694                      ZFUNC_shift, ZFUNC_mask);
 695             break;
 696         }
 697     }
 698     else
 699     {
 700         CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_ENABLE_bit);
 701         CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
 702     }
 703 }
 704
 705 static void evergreenSetStencilState(struct gl_context * ctx, GLboolean state)  //same
 706 {
 707     context_t *context = EVERGREEN_CONTEXT(ctx);
 708     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 709     GLboolean hw_stencil = GL_FALSE;
 710
 711     if (ctx->DrawBuffer) {
 712         struct radeon_renderbuffer *rrbStencil
 713             = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 714         hw_stencil = (rrbStencil && rrbStencil->bo);
 715     }
 716
 717     if (hw_stencil) {
 718         EVERGREEN_STATECHANGE(context, db);
 719         if (state) {
 720             SETbit(evergreen->DB_DEPTH_CONTROL.u32All, STENCIL_ENABLE_bit);
 721             SETbit(evergreen->DB_DEPTH_CONTROL.u32All, BACKFACE_ENABLE_bit);
 722             SETbit(evergreen->DB_STENCIL_INFO.u32All,  EG_DB_STENCIL_INFO__FORMAT_bit);
 723         } else
 724             CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, STENCIL_ENABLE_bit);
 725     }
 726 }
 727
 728 static void evergreenUpdateCulling(struct gl_context * ctx) //same
 729 {
 730         context_t *context = EVERGREEN_CONTEXT(ctx);
 731         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 732
 733     EVERGREEN_STATECHANGE(context, pa);
 734
 735     CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit);
 736     CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
 737     CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
 738
 739     if (ctx->Polygon.CullFlag)
 740     {
 741         switch (ctx->Polygon.CullFaceMode)
 742         {
 743         case GL_FRONT:
 744             SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
 745             CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
 746             break;
 747         case GL_BACK:
 748             CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
 749             SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
 750             break;
 751         case GL_FRONT_AND_BACK:
 752             SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
 753             SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
 754             break;
 755         default:
 756             CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
 757             CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
 758             break;
 759         }
 760     }
 761
 762     switch (ctx->Polygon.FrontFace)
 763     {
 764         case GL_CW:
 765             SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit);
 766             break;
 767         case GL_CCW:
 768             CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit);
 769             break;
 770         default:
 771             CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit); /* default: ccw */
 772             break;
 773     }
 774
 775     /* Winding is inverted when rendering to FBO */
 776     if (ctx->DrawBuffer && ctx->DrawBuffer->Name)
 777             evergreen->PA_SU_SC_MODE_CNTL.u32All ^= FACE_bit;
 778 }
 779
 780 static void evergreenSetPolygonOffsetState(struct gl_context * ctx, GLboolean state) //same
 781 {
 782         context_t *context = EVERGREEN_CONTEXT(ctx);
 783         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 784
 785         EVERGREEN_STATECHANGE(context, pa);
 786
 787         if (state) {
 788                 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_FRONT_ENABLE_bit);
 789                 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_BACK_ENABLE_bit);
 790                 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_PARA_ENABLE_bit);
 791         } else {
 792                 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_FRONT_ENABLE_bit);
 793                 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_BACK_ENABLE_bit);
 794                 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_PARA_ENABLE_bit);
 795         }
 796 }
 797
 798 static void evergreenUpdateLineStipple(struct gl_context * ctx) //diff
 799 {
 800         /* TODO */
 801 }
 802
 803 void evergreenSetScissor(context_t *context) //diff
 804 {
 805         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 806         unsigned x1, y1, x2, y2;
 807         int id = 0;
 808         struct radeon_renderbuffer *rrb;
 809
 810         rrb = radeon_get_colorbuffer(&context->radeon);
 811         if (!rrb || !rrb->bo) {
 812                 return;
 813         }
 814         if (context->radeon.state.scissor.enabled) {
 815                 x1 = context->radeon.state.scissor.rect.x1;
 816                 y1 = context->radeon.state.scissor.rect.y1;
 817                 x2 = context->radeon.state.scissor.rect.x2;
 818                 y2 = context->radeon.state.scissor.rect.y2;
 819                 /* r600 has exclusive BR scissors */
 820                 if (context->radeon.radeonScreen->kernel_mm) {
 821                         x2++;
 822                         y2++;
 823                 }
 824         } else {
 825                 if (context->radeon.radeonScreen->driScreen->dri2.enabled) {
 826                         x1 = 0;
 827                         y1 = 0;
 828                         x2 = rrb->base.Width;
 829                         y2 = rrb->base.Height;
 830                 } else {
 831                         x1 = rrb->dPriv->x;
 832                         y1 = rrb->dPriv->y;
 833                         x2 = rrb->dPriv->x + rrb->dPriv->w;
 834                         y2 = rrb->dPriv->y + rrb->dPriv->h;
 835                 }
 836         }
 837
 838         EVERGREEN_STATECHANGE(context, pa);
 839
 840         /* screen */
 841     /* TODO : check WINDOW_OFFSET_DISABLE */
 842         //SETbit(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
 843         SETfield(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, x1,
 844                  PA_SC_SCREEN_SCISSOR_TL__TL_X_shift, EG_PA_SC_SCREEN_SCISSOR_TL__TL_X_mask);
 845         SETfield(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, y1,
 846                  PA_SC_SCREEN_SCISSOR_TL__TL_Y_shift, EG_PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask);
 847
 848         SETfield(evergreen->PA_SC_SCREEN_SCISSOR_BR.u32All, x2,
 849                  PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, EG_PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
 850         SETfield(evergreen->PA_SC_SCREEN_SCISSOR_BR.u32All, y2,
 851                  PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, EG_PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
 852
 853         /* window */
 854         SETbit(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
 855         SETfield(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, x1,
 856                  PA_SC_WINDOW_SCISSOR_TL__TL_X_shift, EG_PA_SC_WINDOW_SCISSOR_TL__TL_X_mask);
 857         SETfield(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, y1,
 858                  PA_SC_WINDOW_SCISSOR_TL__TL_Y_shift, EG_PA_SC_WINDOW_SCISSOR_TL__TL_Y_mask);
 859
 860         SETfield(evergreen->PA_SC_WINDOW_SCISSOR_BR.u32All, x2,
 861                  PA_SC_WINDOW_SCISSOR_BR__BR_X_shift, EG_PA_SC_WINDOW_SCISSOR_BR__BR_X_mask);
 862         SETfield(evergreen->PA_SC_WINDOW_SCISSOR_BR.u32All, y2,
 863                  PA_SC_WINDOW_SCISSOR_BR__BR_Y_shift, EG_PA_SC_WINDOW_SCISSOR_BR__BR_Y_mask);
 864
 865
 866         SETfield(evergreen->PA_SC_CLIPRECT_0_TL.u32All, x1,
 867                  PA_SC_CLIPRECT_0_TL__TL_X_shift, EG_PA_SC_CLIPRECT_0_TL__TL_X_mask);
 868         SETfield(evergreen->PA_SC_CLIPRECT_0_TL.u32All, y1,
 869                  PA_SC_CLIPRECT_0_TL__TL_Y_shift, EG_PA_SC_CLIPRECT_0_TL__TL_Y_mask);
 870         SETfield(evergreen->PA_SC_CLIPRECT_0_BR.u32All, x2,
 871                  PA_SC_CLIPRECT_0_BR__BR_X_shift, EG_PA_SC_CLIPRECT_0_BR__BR_X_mask);
 872         SETfield(evergreen->PA_SC_CLIPRECT_0_BR.u32All, y2,
 873                  PA_SC_CLIPRECT_0_BR__BR_Y_shift, EG_PA_SC_CLIPRECT_0_BR__BR_Y_mask);
 874
 875         evergreen->PA_SC_CLIPRECT_1_TL.u32All = evergreen->PA_SC_CLIPRECT_0_TL.u32All;
 876         evergreen->PA_SC_CLIPRECT_1_BR.u32All = evergreen->PA_SC_CLIPRECT_0_BR.u32All;
 877         evergreen->PA_SC_CLIPRECT_2_TL.u32All = evergreen->PA_SC_CLIPRECT_0_TL.u32All;
 878         evergreen->PA_SC_CLIPRECT_2_BR.u32All = evergreen->PA_SC_CLIPRECT_0_BR.u32All;
 879         evergreen->PA_SC_CLIPRECT_3_TL.u32All = evergreen->PA_SC_CLIPRECT_0_TL.u32All;
 880         evergreen->PA_SC_CLIPRECT_3_BR.u32All = evergreen->PA_SC_CLIPRECT_0_BR.u32All;
 881
 882         /* more....2d clip */
 883         SETbit(evergreen->PA_SC_GENERIC_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
 884         SETfield(evergreen->PA_SC_GENERIC_SCISSOR_TL.u32All, x1,
 885                  PA_SC_GENERIC_SCISSOR_TL__TL_X_shift, EG_PA_SC_GENERIC_SCISSOR_TL__TL_X_mask);
 886         SETfield(evergreen->PA_SC_GENERIC_SCISSOR_TL.u32All, y1,
 887                  PA_SC_GENERIC_SCISSOR_TL__TL_Y_shift, EG_PA_SC_GENERIC_SCISSOR_TL__TL_Y_mask);
 888         SETfield(evergreen->PA_SC_GENERIC_SCISSOR_BR.u32All, x2,
 889                  PA_SC_GENERIC_SCISSOR_BR__BR_X_shift, EG_PA_SC_GENERIC_SCISSOR_BR__BR_X_mask);
 890         SETfield(evergreen->PA_SC_GENERIC_SCISSOR_BR.u32All, y2,
 891                  PA_SC_GENERIC_SCISSOR_BR__BR_Y_shift, EG_PA_SC_GENERIC_SCISSOR_BR__BR_Y_mask);
 892
 893         SETbit(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
 894         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, x1,
 895                  PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask);
 896         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, y1,
 897                  PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask);
 898         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, x2,
 899                  PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask);
 900         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, y2,
 901                  PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask);
 902
 903     id = 1;
 904     SETbit(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
 905         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, x1,
 906                  PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask);
 907         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, y1,
 908                  PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask);
 909         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, x2,
 910                  PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask);
 911         SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, y2,
 912                  PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask);
 913
 914         evergreen->viewport[id].enabled = GL_TRUE;
 915 }
 916
 917 static void evergreenUpdateWindow(struct gl_context * ctx, int id) //diff in calling evergreenSetScissor
 918 {
 919         context_t *context = EVERGREEN_CONTEXT(ctx);
 920         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
 921         __DRIdrawable *dPriv = radeon_get_drawable(&context->radeon);
 922         GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
 923         GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
 924         const GLfloat *v = ctx->Viewport._WindowMap.m;
 925         const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
 926         const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
 927         GLfloat y_scale, y_bias;
 928
 929         if (render_to_fbo) {
 930                 y_scale = 1.0;
 931                 y_bias = 0;
 932         } else {
 933                 y_scale = -1.0;
 934                 y_bias = yoffset;
 935         }
 936
 937         GLfloat sx = v[MAT_SX];
 938         GLfloat tx = v[MAT_TX] + xoffset;
 939         GLfloat sy = v[MAT_SY] * y_scale;
 940         GLfloat ty = (v[MAT_TY] * y_scale) + y_bias;
 941         GLfloat sz = v[MAT_SZ] * depthScale;
 942         GLfloat tz = v[MAT_TZ] * depthScale;
 943
 944         EVERGREEN_STATECHANGE(context, pa);
 945
 946
 947         evergreen->viewport[id].PA_CL_VPORT_XSCALE.f32All  = sx;
 948         evergreen->viewport[id].PA_CL_VPORT_XOFFSET.f32All = tx;
 949
 950         evergreen->viewport[id].PA_CL_VPORT_YSCALE.f32All  = sy;
 951         evergreen->viewport[id].PA_CL_VPORT_YOFFSET.f32All = ty;
 952
 953         evergreen->viewport[id].PA_CL_VPORT_ZSCALE.f32All  = sz;
 954         evergreen->viewport[id].PA_CL_VPORT_ZOFFSET.f32All = tz;
 955
 956         if (ctx->Transform.DepthClamp) {
 957                 evergreen->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = MIN2(ctx->Viewport.Near, ctx->Viewport.Far);
 958                 evergreen->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = MAX2(ctx->Viewport.Near, ctx->Viewport.Far);
 959                 SETbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_NEAR_DISABLE_bit);
 960                 SETbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_FAR_DISABLE_bit);
 961         } else {
 962                 evergreen->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = 0.0;
 963                 evergreen->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = 1.0;
 964                 CLEARbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_NEAR_DISABLE_bit);
 965                 CLEARbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_FAR_DISABLE_bit);
 966         }
 967
 968         evergreen->viewport[id].enabled = GL_TRUE;
 969
 970         evergreenSetScissor(context);
 971 }
 972
 973 static void evergreenEnable(struct gl_context * ctx, GLenum cap, GLboolean state) //diff in func calls
 974 {
 975         context_t *context = EVERGREEN_CONTEXT(ctx);
 976
 977         switch (cap) {
 978         case GL_TEXTURE_1D:
 979         case GL_TEXTURE_2D:
 980         case GL_TEXTURE_3D:
 981                 /* empty */
 982                 break;
 983         case GL_FOG:
 984                 /* empty */
 985                 break;
 986         case GL_ALPHA_TEST:
 987                 evergreenSetAlphaState(ctx);
 988                 break;
 989         case GL_COLOR_LOGIC_OP:
 990                 evergreenSetLogicOpState(ctx);
 991                 /* fall-through, because logic op overrides blending */
 992         case GL_BLEND:
 993                 evergreenSetBlendState(ctx);
 994                 break;
 995         case GL_CLIP_PLANE0:
 996         case GL_CLIP_PLANE1:
 997         case GL_CLIP_PLANE2:
 998         case GL_CLIP_PLANE3:
 999         case GL_CLIP_PLANE4:
1000         case GL_CLIP_PLANE5:
1001                 evergreenSetClipPlaneState(ctx, cap, state);
1002                 break;
1003         case GL_DEPTH_TEST:
1004                 evergreenSetDepthState(ctx);
1005                 break;
1006         case GL_STENCIL_TEST:
1007                 evergreenSetStencilState(ctx, state);
1008                 break;
1009         case GL_CULL_FACE:
1010                 evergreenUpdateCulling(ctx);
1011                 break;
1012         case GL_POLYGON_OFFSET_POINT:
1013         case GL_POLYGON_OFFSET_LINE:
1014         case GL_POLYGON_OFFSET_FILL:
1015                 evergreenSetPolygonOffsetState(ctx, state);
1016                 break;
1017         case GL_SCISSOR_TEST:
1018                 radeon_firevertices(&context->radeon);
1019                 context->radeon.state.scissor.enabled = state;
1020                 radeonUpdateScissor(ctx);
1021                 break;
1022         case GL_LINE_STIPPLE:
1023                 evergreenUpdateLineStipple(ctx);
1024                 break;
1025         case GL_DEPTH_CLAMP:
1026                 evergreenUpdateWindow(ctx, 0);
1027                 break;
1028         default:
1029                 break;
1030         }
1031
1032 }
1033
1034 static void evergreenColorMask(struct gl_context * ctx,
1035                           GLboolean r, GLboolean g, GLboolean b, GLboolean a) //same
1036 {
1037         context_t *context = EVERGREEN_CONTEXT(ctx);
1038         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1039         unsigned int mask = ((r ? 1 : 0) |
1040                              (g ? 2 : 0) |
1041                              (b ? 4 : 0) |
1042                              (a ? 8 : 0));
1043
1044         if (mask != evergreen->CB_TARGET_MASK.u32All) {
1045                 EVERGREEN_STATECHANGE(context, cb);
1046                 SETfield(evergreen->CB_TARGET_MASK.u32All, mask, TARGET0_ENABLE_shift, TARGET0_ENABLE_mask);
1047         }
1048 }
1049
1050 static void evergreenDepthFunc(struct gl_context * ctx, GLenum func) //same
1051 {
1052     evergreenSetDepthState(ctx);
1053 }
1054
1055 static void evergreenDepthMask(struct gl_context * ctx, GLboolean mask) //same
1056 {
1057     evergreenSetDepthState(ctx);
1058 }
1059
1060 static void evergreenCullFace(struct gl_context * ctx, GLenum mode) //same
1061 {
1062     evergreenUpdateCulling(ctx);
1063 }
1064
1065 static void evergreenFogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param) //same
1066 {
1067 }
1068
1069 static void evergreenUpdatePolygonMode(struct gl_context * ctx) //same
1070 {
1071         context_t *context = EVERGREEN_CONTEXT(ctx);
1072         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1073
1074         EVERGREEN_STATECHANGE(context, pa);
1075
1076         SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DISABLE_POLY_MODE, POLY_MODE_shift, POLY_MODE_mask);
1077
1078         /* Only do something if a polygon mode is wanted, default is GL_FILL */
1079         if (ctx->Polygon.FrontMode != GL_FILL ||
1080             ctx->Polygon.BackMode != GL_FILL) {
1081                 GLenum f, b;
1082
1083                 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
1084                  * correctly by selecting the correct front and back face
1085                  */
1086                 f = ctx->Polygon.FrontMode;
1087                 b = ctx->Polygon.BackMode;
1088
1089                 /* Enable polygon mode */
1090                 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DUAL_MODE, POLY_MODE_shift, POLY_MODE_mask);
1091
1092                 switch (f) {
1093                 case GL_LINE:
1094                         SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_LINES,
1095                                  POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask);
1096                         break;
1097                 case GL_POINT:
1098                         SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_POINTS,
1099                                  POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask);
1100                         break;
1101                 case GL_FILL:
1102                         SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_TRIANGLES,
1103                                  POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask);
1104                         break;
1105                 }
1106
1107                 switch (b) {
1108                 case GL_LINE:
1109                         SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_LINES,
1110                                  POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask);
1111                         break;
1112                 case GL_POINT:
1113                         SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_POINTS,
1114                                  POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask);
1115                         break;
1116                 case GL_FILL:
1117                         SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_TRIANGLES,
1118                                  POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask);
1119                         break;
1120                 }
1121         }
1122 }
1123
1124 static void evergreenFrontFace(struct gl_context * ctx, GLenum mode) //same
1125 {
1126     evergreenUpdateCulling(ctx);
1127     evergreenUpdatePolygonMode(ctx);
1128 }
1129
1130 static void evergreenShadeModel(struct gl_context * ctx, GLenum mode) //same
1131 {
1132         context_t *context = EVERGREEN_CONTEXT(ctx);
1133         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1134
1135         EVERGREEN_STATECHANGE(context, spi);
1136
1137         /* also need to set/clear FLAT_SHADE bit per param in SPI_PS_INPUT_CNTL_[0-31] */
1138         switch (mode) {
1139         case GL_FLAT:
1140                 SETbit(evergreen->SPI_INTERP_CONTROL_0.u32All, FLAT_SHADE_ENA_bit);
1141                 break;
1142         case GL_SMOOTH:
1143                 CLEARbit(evergreen->SPI_INTERP_CONTROL_0.u32All, FLAT_SHADE_ENA_bit);
1144                 break;
1145         default:
1146                 return;
1147         }
1148 }
1149
1150 static void evergreenLogicOpcode(struct gl_context *ctx, GLenum logicop) //diff
1151 {
1152         if (_mesa_rgba_logicop_enabled(ctx))
1153                 evergreenSetLogicOpState(ctx);
1154 }
1155
1156 static void evergreenPointSize(struct gl_context * ctx, GLfloat size) //same
1157 {
1158         context_t *context = EVERGREEN_CONTEXT(ctx);
1159         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1160
1161         EVERGREEN_STATECHANGE(context, pa);
1162
1163         /* We need to clamp to user defined range here, because
1164          * the HW clamping happens only for per vertex point size. */
1165         size = CLAMP(size, ctx->Point.MinSize, ctx->Point.MaxSize);
1166
1167         /* same size limits for AA, non-AA points */
1168         size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
1169
1170         /* format is 12.4 fixed point */
1171         SETfield(evergreen->PA_SU_POINT_SIZE.u32All, (int)(size * 8.0),
1172                  PA_SU_POINT_SIZE__HEIGHT_shift, PA_SU_POINT_SIZE__HEIGHT_mask);
1173         SETfield(evergreen->PA_SU_POINT_SIZE.u32All, (int)(size * 8.0),
1174                  PA_SU_POINT_SIZE__WIDTH_shift, PA_SU_POINT_SIZE__WIDTH_mask);
1175
1176 }
1177
1178 static void evergreenPointParameter(struct gl_context * ctx, GLenum pname, const GLfloat * param) //same
1179 {
1180         context_t *context = EVERGREEN_CONTEXT(ctx);
1181         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1182
1183         EVERGREEN_STATECHANGE(context, pa);
1184
1185         /* format is 12.4 fixed point */
1186         switch (pname) {
1187         case GL_POINT_SIZE_MIN:
1188                 SETfield(evergreen->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MinSize * 8.0),
1189                          MIN_SIZE_shift, MIN_SIZE_mask);
1190                 evergreenPointSize(ctx, ctx->Point.Size);
1191                 break;
1192         case GL_POINT_SIZE_MAX:
1193                 SETfield(evergreen->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MaxSize * 8.0),
1194                          MAX_SIZE_shift, MAX_SIZE_mask);
1195                 evergreenPointSize(ctx, ctx->Point.Size);
1196                 break;
1197         case GL_POINT_DISTANCE_ATTENUATION:
1198                 break;
1199         case GL_POINT_FADE_THRESHOLD_SIZE:
1200                 break;
1201         default:
1202                 break;
1203         }
1204 }
1205
1206 static int evergreen_translate_stencil_func(int func) //same
1207 {
1208         switch (func) {
1209         case GL_NEVER:
1210                 return REF_NEVER;
1211         case GL_LESS:
1212                 return REF_LESS;
1213         case GL_EQUAL:
1214                 return REF_EQUAL;
1215         case GL_LEQUAL:
1216                 return REF_LEQUAL;
1217         case GL_GREATER:
1218                 return REF_GREATER;
1219         case GL_NOTEQUAL:
1220                 return REF_NOTEQUAL;
1221         case GL_GEQUAL:
1222                 return REF_GEQUAL;
1223         case GL_ALWAYS:
1224                 return REF_ALWAYS;
1225         }
1226         return 0;
1227 }
1228
1229 static void evergreenStencilFuncSeparate(struct gl_context * ctx, GLenum face,
1230                                     GLenum func, GLint ref, GLuint mask) //same
1231 {
1232         context_t *context = EVERGREEN_CONTEXT(ctx);
1233         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1234         const unsigned back = ctx->Stencil._BackFace;
1235
1236
1237         EVERGREEN_STATECHANGE(context, db);
1238
1239         //front
1240         SETfield(evergreen->DB_STENCILREFMASK.u32All, ctx->Stencil.Ref[0],
1241                  STENCILREF_shift, STENCILREF_mask);
1242         SETfield(evergreen->DB_STENCILREFMASK.u32All, ctx->Stencil.ValueMask[0],
1243                  STENCILMASK_shift, STENCILMASK_mask);
1244
1245         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_func(ctx->Stencil.Function[0]),
1246                  STENCILFUNC_shift, STENCILFUNC_mask);
1247
1248         //back
1249         SETfield(evergreen->DB_STENCILREFMASK_BF.u32All, ctx->Stencil.Ref[back],
1250                  STENCILREF_BF_shift, STENCILREF_BF_mask);
1251         SETfield(evergreen->DB_STENCILREFMASK_BF.u32All, ctx->Stencil.ValueMask[back],
1252                  STENCILMASK_BF_shift, STENCILMASK_BF_mask);
1253
1254         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_func(ctx->Stencil.Function[back]),
1255                  STENCILFUNC_BF_shift, STENCILFUNC_BF_mask);
1256 }
1257
1258 static void evergreenStencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask) //same
1259 {
1260         context_t *context = EVERGREEN_CONTEXT(ctx);
1261         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1262         const unsigned back = ctx->Stencil._BackFace;
1263
1264         EVERGREEN_STATECHANGE(context, db);
1265
1266         // front
1267         SETfield(evergreen->DB_STENCILREFMASK.u32All, ctx->Stencil.WriteMask[0],
1268                  STENCILWRITEMASK_shift, STENCILWRITEMASK_mask);
1269
1270         // back
1271         SETfield(evergreen->DB_STENCILREFMASK_BF.u32All, ctx->Stencil.WriteMask[back],
1272                  STENCILWRITEMASK_BF_shift, STENCILWRITEMASK_BF_mask);
1273
1274 }
1275
1276 static int evergreen_translate_stencil_op(int op) //same
1277 {
1278         switch (op) {
1279         case GL_KEEP:
1280                 return STENCIL_KEEP;
1281         case GL_ZERO:
1282                 return STENCIL_ZERO;
1283         case GL_REPLACE:
1284                 return STENCIL_REPLACE;
1285         case GL_INCR:
1286                 return STENCIL_INCR_CLAMP;
1287         case GL_DECR:
1288                 return STENCIL_DECR_CLAMP;
1289         case GL_INCR_WRAP_EXT:
1290                 return STENCIL_INCR_WRAP;
1291         case GL_DECR_WRAP_EXT:
1292                 return STENCIL_DECR_WRAP;
1293         case GL_INVERT:
1294                 return STENCIL_INVERT;
1295         default:
1296                 WARN_ONCE("Do not know how to translate stencil op");
1297                 return STENCIL_KEEP;
1298         }
1299         return 0;
1300 }
1301
1302 static void evergreenStencilOpSeparate(struct gl_context * ctx, GLenum face,
1303                                   GLenum fail, GLenum zfail, GLenum zpass) //same
1304 {
1305         context_t *context = EVERGREEN_CONTEXT(ctx);
1306         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1307         const unsigned back = ctx->Stencil._BackFace;
1308
1309         EVERGREEN_STATECHANGE(context, db);
1310
1311         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.FailFunc[0]),
1312                  STENCILFAIL_shift, STENCILFAIL_mask);
1313         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZFailFunc[0]),
1314                  STENCILZFAIL_shift, STENCILZFAIL_mask);
1315         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZPassFunc[0]),
1316                  STENCILZPASS_shift, STENCILZPASS_mask);
1317
1318         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.FailFunc[back]),
1319                  STENCILFAIL_BF_shift, STENCILFAIL_BF_mask);
1320         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZFailFunc[back]),
1321                  STENCILZFAIL_BF_shift, STENCILZFAIL_BF_mask);
1322         SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZPassFunc[back]),
1323                  STENCILZPASS_BF_shift, STENCILZPASS_BF_mask);
1324 }
1325
1326 static void evergreenViewport(struct gl_context * ctx,
1327                          GLint x,
1328                          GLint y,
1329                          GLsizei width,
1330                          GLsizei height) //diff in evergreenUpdateWindow
1331 {
1332         evergreenUpdateWindow(ctx, 0);
1333
1334         radeon_viewport(ctx, x, y, width, height);
1335 }
1336
1337 static void evergreenDepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval) //diff in evergreenUpdateWindow
1338 {
1339         evergreenUpdateWindow(ctx, 0);
1340 }
1341
1342 static void evergreenLineWidth(struct gl_context * ctx, GLfloat widthf) //same
1343 {
1344     context_t *context = EVERGREEN_CONTEXT(ctx);
1345     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1346     uint32_t lineWidth = (uint32_t)((widthf * 0.5) * (1 << 4));
1347
1348     EVERGREEN_STATECHANGE(context, pa);
1349
1350     if (lineWidth > 0xFFFF)
1351             lineWidth = 0xFFFF;
1352     SETfield(evergreen->PA_SU_LINE_CNTL.u32All,(uint16_t)lineWidth,
1353              PA_SU_LINE_CNTL__WIDTH_shift, PA_SU_LINE_CNTL__WIDTH_mask);
1354 }
1355
1356 static void evergreenLineStipple(struct gl_context *ctx, GLint factor, GLushort pattern) //same
1357 {
1358     context_t *context = EVERGREEN_CONTEXT(ctx);
1359     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1360
1361     EVERGREEN_STATECHANGE(context, pa);
1362
1363     SETfield(evergreen->PA_SC_LINE_STIPPLE.u32All, pattern, LINE_PATTERN_shift, LINE_PATTERN_mask);
1364     SETfield(evergreen->PA_SC_LINE_STIPPLE.u32All, (factor-1), REPEAT_COUNT_shift, REPEAT_COUNT_mask);
1365     SETfield(evergreen->PA_SC_LINE_STIPPLE.u32All, 1, AUTO_RESET_CNTL_shift, AUTO_RESET_CNTL_mask);
1366 }
1367
1368 static void evergreenPolygonOffset(struct gl_context * ctx, GLfloat factor, GLfloat units) //diff :
1369                                                                     //all register here offset diff, bits same
1370 {
1371         context_t *context = EVERGREEN_CONTEXT(ctx);
1372         EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1373         GLfloat constant = units;
1374         GLchar depth = 0;
1375
1376         EVERGREEN_STATECHANGE(context, pa);
1377
1378         switch (ctx->Visual.depthBits) {
1379         case 16:
1380                 constant *= 4.0;
1381                 depth = -16;
1382                 break;
1383         case 24:
1384                 constant *= 2.0;
1385                 depth = -24;
1386                 break;
1387         }
1388
1389         factor *= 12.0;
1390         SETfield(evergreen->PA_SU_POLY_OFFSET_DB_FMT_CNTL.u32All, depth,
1391                  POLY_OFFSET_NEG_NUM_DB_BITS_shift, POLY_OFFSET_NEG_NUM_DB_BITS_mask);
1392         //evergreen->PA_SU_POLY_OFFSET_CLAMP.f32All = constant; //???
1393         evergreen->PA_SU_POLY_OFFSET_FRONT_SCALE.f32All = factor;
1394         evergreen->PA_SU_POLY_OFFSET_FRONT_OFFSET.f32All = constant;
1395         evergreen->PA_SU_POLY_OFFSET_BACK_SCALE.f32All = factor;
1396         evergreen->PA_SU_POLY_OFFSET_BACK_OFFSET.f32All = constant;
1397 }
1398
1399 static void evergreenPolygonMode(struct gl_context * ctx, GLenum face, GLenum mode) //same
1400 {
1401         (void)face;
1402         (void)mode;
1403
1404         evergreenUpdatePolygonMode(ctx);
1405 }
1406
1407 static void evergreenRenderMode(struct gl_context * ctx, GLenum mode) //same
1408 {
1409 }
1410
1411 //TODO : move to kernel.
1412 static void evergreenInitSQConfig(struct gl_context * ctx)
1413 {
1414     context_t *context = EVERGREEN_CONTEXT(ctx);
1415     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1416
1417     uint32_t  uSqNumCfInsts, uMaxGPRs, uMaxThreads, uMaxStackEntries, uPSThreadCount, uOtherThreadCount;
1418     uint32_t  NUM_PS_GPRS, NUM_VS_GPRS, NUM_GS_GPRS, NUM_ES_GPRS, NUM_HS_GPRS, NUM_LS_GPRS, NUM_CLAUSE_TEMP_GPRS;
1419     GLboolean bVC_ENABLE = GL_TRUE;
1420
1421     R600_STATECHANGE(context, sq);
1422
1423     switch (context->radeon.radeonScreen->chip_family)
1424     {
1425     case CHIP_FAMILY_CEDAR:
1426             uSqNumCfInsts       = 1;
1427         bVC_ENABLE = GL_FALSE;
1428         uMaxGPRs = 256;
1429         uPSThreadCount = 96;
1430         uMaxThreads = 192;
1431         uMaxStackEntries = 256;
1432             break;
1433     case CHIP_FAMILY_REDWOOD:
1434             uSqNumCfInsts       = 2;
1435         bVC_ENABLE = GL_TRUE;
1436         uMaxGPRs = 256;
1437         uPSThreadCount = 128;
1438         uMaxThreads = 248;
1439         uMaxStackEntries = 256;
1440             break;
1441     case CHIP_FAMILY_JUNIPER:
1442         uSqNumCfInsts       = 2;
1443         bVC_ENABLE = GL_TRUE;
1444         uMaxGPRs = 256;
1445         uPSThreadCount = 128;
1446         uMaxThreads = 248;
1447         uMaxStackEntries = 512;
1448             break;
1449     case CHIP_FAMILY_CYPRESS:
1450             uSqNumCfInsts       = 2;
1451         bVC_ENABLE = GL_TRUE;
1452         uMaxGPRs = 256;
1453         uPSThreadCount = 128;
1454         uMaxThreads = 248;
1455         uMaxStackEntries = 512;
1456             break;
1457     case CHIP_FAMILY_HEMLOCK:
1458             uSqNumCfInsts       = 2;//?
1459         bVC_ENABLE = GL_TRUE;
1460         uMaxGPRs = 256;
1461         uPSThreadCount = 128;
1462         uMaxThreads = 248;
1463         uMaxStackEntries = 512;
1464             break;
1465     case CHIP_FAMILY_PALM:
1466             uSqNumCfInsts       = 1;
1467         bVC_ENABLE = GL_FALSE;
1468         uMaxGPRs = 256;
1469         uPSThreadCount = 96;
1470         uMaxThreads = 192;
1471         uMaxStackEntries = 256;
1472             break;
1473     case CHIP_FAMILY_SUMO:
1474             uSqNumCfInsts       = 2;
1475         bVC_ENABLE = GL_FALSE;
1476         uMaxGPRs = 256;
1477         uPSThreadCount = 96;
1478         uMaxThreads = 248;
1479         uMaxStackEntries = 256;
1480             break;
1481     case CHIP_FAMILY_SUMO2:
1482             uSqNumCfInsts       = 2;
1483         bVC_ENABLE = GL_FALSE;
1484         uMaxGPRs = 256;
1485         uPSThreadCount = 96;
1486         uMaxThreads = 248;
1487         uMaxStackEntries = 512;
1488             break;
1489     case CHIP_FAMILY_BARTS:
1490             uSqNumCfInsts       = 2;
1491         bVC_ENABLE = GL_TRUE;
1492         uMaxGPRs = 256;
1493         uPSThreadCount = 128;
1494         uMaxThreads = 248;
1495         uMaxStackEntries = 512;
1496             break;
1497     case CHIP_FAMILY_TURKS:
1498             uSqNumCfInsts       = 2;
1499         bVC_ENABLE = GL_TRUE;
1500         uMaxGPRs = 256;
1501         uPSThreadCount = 128;
1502         uMaxThreads = 248;
1503         uMaxStackEntries = 256;
1504             break;
1505     case CHIP_FAMILY_CAICOS:
1506             uSqNumCfInsts       = 1;
1507         bVC_ENABLE = GL_FALSE;
1508         uMaxGPRs = 256;
1509         uPSThreadCount = 128;
1510         uMaxThreads = 192;
1511         uMaxStackEntries = 256;
1512             break;
1513     default:
1514         uSqNumCfInsts       = 2;
1515         bVC_ENABLE = GL_TRUE;
1516         uMaxGPRs = 256;
1517         uPSThreadCount = 128;
1518         uMaxThreads = 248;
1519         uMaxStackEntries = 512;
1520             break;
1521     }
1522
1523     evergreen->evergreen_config.SQ_DYN_GPR_CNTL_PS_FLUSH_REQ.u32All   = 0;
1524
1525     evergreen->evergreen_config.SPI_CONFIG_CNTL.u32All   = 0;
1526     evergreen->evergreen_config.SPI_CONFIG_CNTL_1.u32All = 0;
1527     SETfield(evergreen->evergreen_config.SPI_CONFIG_CNTL_1.u32All, 4,
1528              EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_shift,
1529              EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_mask);
1530
1531     evergreen->evergreen_config.CP_PERFMON_CNTL.u32All = 0;
1532
1533     evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All = 0;
1534     SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 16 * uSqNumCfInsts,
1535              EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_shift,
1536              EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_mask);
1537     SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 0x4,
1538              EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_shift,
1539              EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_mask);
1540     SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 0xE0,
1541              EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_shift,
1542              EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_mask);
1543     SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 0x8,
1544              EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_shift,
1545              EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_mask);
1546
1547     if(bVC_ENABLE == GL_TRUE)
1548     {
1549         SETbit(evergreen->evergreen_config.SQ_CONFIG.u32All,
1550                EG_SQ_CONFIG__VC_ENABLE_bit);
1551     }
1552     else
1553     {
1554         CLEARbit(evergreen->evergreen_config.SQ_CONFIG.u32All,
1555                  EG_SQ_CONFIG__VC_ENABLE_bit);
1556     }
1557     SETbit(evergreen->evergreen_config.SQ_CONFIG.u32All,
1558            EG_SQ_CONFIG__EXPORT_SRC_C_bit);
1559     SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 0,
1560              EG_SQ_CONFIG__PS_PRIO_shift,
1561              EG_SQ_CONFIG__PS_PRIO_mask);
1562     SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 1,
1563              EG_SQ_CONFIG__VS_PRIO_shift,
1564              EG_SQ_CONFIG__VS_PRIO_mask);
1565     SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 2,
1566              EG_SQ_CONFIG__GS_PRIO_shift,
1567              EG_SQ_CONFIG__GS_PRIO_mask);
1568     SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 3,
1569              EG_SQ_CONFIG__ES_PRIO_shift,
1570              EG_SQ_CONFIG__ES_PRIO_mask);
1571
1572     NUM_CLAUSE_TEMP_GPRS = 4;
1573     NUM_PS_GPRS = ((uMaxGPRs-(4*2))*12/32); // 93
1574     NUM_VS_GPRS = ((uMaxGPRs-(4*2))*6/32);  // 46
1575     NUM_GS_GPRS = ((uMaxGPRs-(4*2))*4/32);  // 31
1576     NUM_ES_GPRS = ((uMaxGPRs-(4*2))*4/32);  // 31
1577     NUM_HS_GPRS = ((uMaxGPRs-(4*2))*3/32);  // 23
1578     NUM_LS_GPRS = ((uMaxGPRs-(4*2))*3/32);  // 23
1579
1580     evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All = 0;
1581     evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_2.u32All = 0;
1582     evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_3.u32All = 0;
1583
1584     SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All, NUM_PS_GPRS,
1585              NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
1586     SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All, NUM_VS_GPRS,
1587              NUM_VS_GPRS_shift, NUM_VS_GPRS_mask);
1588     SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All, NUM_CLAUSE_TEMP_GPRS,
1589                  NUM_CLAUSE_TEMP_GPRS_shift, NUM_CLAUSE_TEMP_GPRS_mask);
1590     SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_2.u32All, NUM_GS_GPRS,
1591              NUM_GS_GPRS_shift, NUM_GS_GPRS_mask);
1592     SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_2.u32All, NUM_ES_GPRS,
1593              NUM_ES_GPRS_shift, NUM_ES_GPRS_mask);
1594     SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_3.u32All, NUM_HS_GPRS,
1595              NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
1596     SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_3.u32All, NUM_LS_GPRS,
1597              NUM_VS_GPRS_shift, NUM_VS_GPRS_mask);
1598
1599     uOtherThreadCount = (((uMaxThreads-uPSThreadCount)/6)/8)*8;
1600     evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All = 0;
1601     evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT_2.u32All = 0;
1602     SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uPSThreadCount,
1603              NUM_PS_THREADS_shift, NUM_PS_THREADS_mask);
1604     SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uOtherThreadCount,
1605              NUM_VS_THREADS_shift, NUM_VS_THREADS_mask);
1606     SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uOtherThreadCount,
1607              NUM_GS_THREADS_shift, NUM_GS_THREADS_mask);
1608     SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uOtherThreadCount,
1609              NUM_ES_THREADS_shift, NUM_ES_THREADS_mask);
1610     SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT_2.u32All, uOtherThreadCount,
1611              NUM_PS_THREADS_shift, NUM_PS_THREADS_mask);
1612     SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT_2.u32All, uOtherThreadCount,
1613              NUM_VS_THREADS_shift, NUM_VS_THREADS_mask);
1614
1615     uMaxStackEntries = ((uMaxStackEntries*1)/6);
1616     evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_1.u32All = 0;
1617     evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_2.u32All = 0;
1618     evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_3.u32All = 0;
1619     SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_1.u32All, uMaxStackEntries,
1620                  NUM_PS_STACK_ENTRIES_shift, NUM_PS_STACK_ENTRIES_mask);
1621     SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_1.u32All, uMaxStackEntries,
1622                  NUM_VS_STACK_ENTRIES_shift, NUM_VS_STACK_ENTRIES_mask);
1623     SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_2.u32All, uMaxStackEntries,
1624                  NUM_GS_STACK_ENTRIES_shift, NUM_GS_STACK_ENTRIES_mask);
1625     SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_2.u32All, uMaxStackEntries,
1626                  NUM_ES_STACK_ENTRIES_shift, NUM_ES_STACK_ENTRIES_mask);
1627     SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_3.u32All, uMaxStackEntries,
1628                  NUM_PS_STACK_ENTRIES_shift, NUM_PS_STACK_ENTRIES_mask);
1629     SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_3.u32All, uMaxStackEntries,
1630                  NUM_VS_STACK_ENTRIES_shift, NUM_VS_STACK_ENTRIES_mask);
1631
1632     evergreen->evergreen_config.PA_SC_FORCE_EOV_MAX_CNTS.u32All = 0;
1633     SETfield(evergreen->evergreen_config.PA_SC_FORCE_EOV_MAX_CNTS.u32All, 4095,
1634                  EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_shift,
1635              EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_mask);
1636     SETfield(evergreen->evergreen_config.PA_SC_FORCE_EOV_MAX_CNTS.u32All, 255,
1637                  EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_shift,
1638              EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_mask);
1639
1640     evergreen->evergreen_config.VGT_CACHE_INVALIDATION.u32All = 0;
1641     SETfield(evergreen->evergreen_config.VGT_CACHE_INVALIDATION.u32All, 2,
1642                  EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_shift,
1643              EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_mask);
1644
1645     evergreen->evergreen_config.VGT_GS_VERTEX_REUSE.u32All = 0;
1646     SETfield(evergreen->evergreen_config.VGT_GS_VERTEX_REUSE.u32All, 16,
1647                  VERT_REUSE_shift,
1648              VERT_REUSE_mask);
1649
1650     evergreen->evergreen_config.PA_SC_LINE_STIPPLE_STATE.u32All = 0;
1651
1652     evergreen->evergreen_config.PA_CL_ENHANCE.u32All = 0;
1653     SETbit(evergreen->evergreen_config.PA_CL_ENHANCE.u32All,
1654            CLIP_VTX_REORDER_ENA_bit);
1655     SETfield(evergreen->evergreen_config.PA_CL_ENHANCE.u32All, 3,
1656                  NUM_CLIP_SEQ_shift,
1657              NUM_CLIP_SEQ_mask);
1658 }
1659
1660 void evergreenInitState(struct gl_context * ctx) //diff
1661 {
1662     context_t *context = R700_CONTEXT(ctx);
1663     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1664
1665     int id = 0;
1666
1667     //calloc should have done this
1668     memset(evergreen, 0, sizeof(EVERGREEN_CHIP_CONTEXT));
1669
1670     // Disable window clipping and offset:
1671     SETfield(evergreen->PA_SC_WINDOW_OFFSET.u32All, 0,
1672                  EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_shift, EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_mask);
1673     SETfield(evergreen->PA_SC_WINDOW_OFFSET.u32All, 0,
1674                  EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_shift, EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_mask);
1675
1676     SETbit(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
1677
1678     evergreen->PA_SC_CLIPRECT_RULE.u32All = 0x0000FFFF;
1679
1680     evergreen->PA_SC_EDGERULE.u32All = 0xAAAAAAAA;
1681
1682     // Set up Z min/max:
1683     evergreen->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = 0.0;
1684     evergreen->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = 1.0;
1685
1686     SETfield(evergreen->CB_TARGET_MASK.u32All, 0xF, TARGET0_ENABLE_shift, TARGET0_ENABLE_mask);
1687     SETfield(evergreen->CB_SHADER_MASK.u32All, 0xF, OUTPUT0_ENABLE_shift, OUTPUT0_ENABLE_mask);
1688
1689     SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
1690                  EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift,
1691          EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask);
1692     SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
1693                  EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift,
1694          EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask);
1695
1696     // Turn off vgt reuse:
1697     evergreen->VGT_REUSE_OFF.u32All = 0;
1698     SETbit(evergreen->VGT_REUSE_OFF.u32All, REUSE_OFF_bit);
1699
1700     // Specify offsetting and clamp values for vertices:
1701     evergreen->VGT_MAX_VTX_INDX.u32All      = 0xFFFFFF;
1702     evergreen->VGT_MIN_VTX_INDX.u32All      = 0;
1703     evergreen->VGT_INDX_OFFSET.u32All       = 0;
1704
1705     evergreen->VGT_DMA_NUM_INSTANCES.u32All = 1;
1706
1707     // Do not alpha blend:
1708     SETfield(evergreen->SX_ALPHA_TEST_CONTROL.u32All, REF_NEVER,
1709                          ALPHA_FUNC_shift, ALPHA_FUNC_mask);
1710     CLEARbit(evergreen->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit);
1711
1712     evergreen->SPI_VS_OUT_ID_0.u32All  = 0x03020100;
1713     evergreen->SPI_VS_OUT_ID_1.u32All  = 0x07060504;
1714
1715     evergreen->SPI_PS_INPUT_CNTL[0].u32All  = 0x00000800;
1716     evergreen->SPI_PS_INPUT_CNTL[1].u32All  = 0x00000801;
1717     evergreen->SPI_PS_INPUT_CNTL[2].u32All  = 0x00000802;
1718
1719
1720     // Depth buffer currently disabled:
1721     evergreen->DB_DEPTH_CONTROL.u32All = 0;
1722     SETbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
1723     SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_ALWAYS,
1724                      ZFUNC_shift, ZFUNC_mask);
1725
1726     evergreen->DB_Z_READ_BASE.u32All = 0;
1727     evergreen->DB_Z_WRITE_BASE.u32All = 0;
1728
1729     evergreen->DB_DEPTH_CLEAR.f32All = 1.0;
1730
1731     evergreen->DB_DEPTH_VIEW.u32All = 0;
1732
1733     evergreen->DB_SHADER_CONTROL.u32All = 0;
1734     SETbit(evergreen->DB_SHADER_CONTROL.u32All, EG_DB_SHADER_CONTROL__DUAL_EXPORT_ENABLE_bit);
1735
1736     evergreen->DB_Z_INFO.u32All = 0;
1737     SETfield(evergreen->DB_Z_INFO.u32All   , ARRAY_1D_TILED_THIN1,
1738         EG_DB_Z_INFO__ARRAY_MODE_shift, EG_DB_Z_INFO__ARRAY_MODE_mask);
1739     SETfield(evergreen->DB_Z_INFO.u32All       , EG_Z_24,
1740         EG_DB_Z_INFO__FORMAT_shift, EG_DB_Z_INFO__FORMAT_mask);
1741     SETfield(evergreen->DB_Z_INFO.u32All   , EG_ADDR_SURF_TILE_SPLIT_256B,
1742         EG_DB_Z_INFO__TILE_SPLIT_shift, EG_DB_Z_INFO__TILE_SPLIT_mask);
1743     SETfield(evergreen->DB_Z_INFO.u32All    , EG_ADDR_SURF_8_BANK,
1744         EG_DB_Z_INFO__NUM_BANKS_shift, EG_DB_Z_INFO__NUM_BANKS_mask);
1745     SETfield(evergreen->DB_Z_INFO.u32All   , EG_ADDR_SURF_BANK_WIDTH_1,
1746         EG_DB_Z_INFO__BANK_WIDTH_shift, EG_DB_Z_INFO__BANK_WIDTH_mask);
1747     SETfield(evergreen->DB_Z_INFO.u32All  , EG_ADDR_SURF_BANK_HEIGHT_1,
1748         EG_DB_Z_INFO__BANK_HEIGHT_shift, EG_DB_Z_INFO__BANK_HEIGHT_mask);
1749
1750     evergreen->DB_STENCIL_INFO.u32All = 0;
1751     CLEARbit(evergreen->DB_STENCIL_INFO.u32All, EG_DB_STENCIL_INFO__FORMAT_bit);
1752     SETfield(evergreen->DB_STENCIL_INFO.u32All, 0,
1753         EG_DB_STENCIL_INFO__TILE_SPLIT_shift, EG_DB_STENCIL_INFO__TILE_SPLIT_mask);
1754
1755     evergreen->DB_RENDER_CONTROL.u32All = 0;
1756
1757     evergreen->DB_RENDER_OVERRIDE.u32All = 0;
1758     SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIZ_ENABLE_shift, FORCE_HIZ_ENABLE_mask);
1759         SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE0_shift, FORCE_HIS_ENABLE0_mask);
1760         SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE1_shift, FORCE_HIS_ENABLE1_mask);
1761
1762     /* stencil */
1763     evergreenEnable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled);
1764     evergreenStencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]);
1765     evergreenStencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0],
1766                                              ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]);
1767     evergreenStencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0],
1768                                            ctx->Stencil.ZFailFunc[0],
1769                                            ctx->Stencil.ZPassFunc[0]);
1770
1771     // Disable ROP3 modes by setting src to dst copy:
1772     SETfield(evergreen->CB_COLOR_CONTROL.u32All, 0xCC,
1773              EG_CB_COLOR_CONTROL__ROP3_shift,
1774              EG_CB_COLOR_CONTROL__ROP3_mask);
1775     SETfield(evergreen->CB_COLOR_CONTROL.u32All, EG_CB_NORMAL,
1776              EG_CB_COLOR_CONTROL__MODE_shift,
1777              EG_CB_COLOR_CONTROL__MODE_mask);
1778
1779     SETfield(evergreen->CB_BLEND0_CONTROL.u32All,
1780                          BLEND_ONE, COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
1781
1782         SETfield(evergreen->CB_BLEND0_CONTROL.u32All,
1783                      BLEND_ONE, ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
1784
1785     //evergreen->PA_CL_CLIP_CNTL.CLIP_DISABLE = 1;
1786
1787     SETbit(evergreen->PA_CL_CLIP_CNTL.u32All, DX_LINEAR_ATTR_CLIP_ENA_bit);
1788
1789     // Set up the culling control register:
1790     SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, 2,
1791              POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask); // draw using triangles
1792     SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, 2,
1793                                  POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask); // draw using triangles
1794
1795     // Do scale XY or X by 1/W0. eg:
1796     evergreen->bEnablePerspective = GL_TRUE;
1797
1798     CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_XY_FMT_bit);
1799     CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_Z_FMT_bit);
1800     SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_W0_FMT_bit);
1801
1802     // Enable viewport scaling for all three axis:
1803     SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_X_SCALE_ENA_bit);
1804     SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_X_OFFSET_ENA_bit);
1805     SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Y_SCALE_ENA_bit);
1806     SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Y_OFFSET_ENA_bit);
1807     SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Z_SCALE_ENA_bit);
1808     SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Z_OFFSET_ENA_bit);
1809
1810     // Set up point sizes and min/max values:
1811     SETfield(evergreen->PA_SU_POINT_SIZE.u32All, 0x8,
1812                  PA_SU_POINT_SIZE__HEIGHT_shift, PA_SU_POINT_SIZE__HEIGHT_mask);
1813         SETfield(evergreen->PA_SU_POINT_SIZE.u32All, 0x8,
1814                  PA_SU_POINT_SIZE__WIDTH_shift, PA_SU_POINT_SIZE__WIDTH_mask);
1815     CLEARfield(evergreen->PA_SU_POINT_MINMAX.u32All, MIN_SIZE_mask);
1816     SETfield(evergreen->PA_SU_POINT_MINMAX.u32All, 0x8000, MAX_SIZE_shift, MAX_SIZE_mask);
1817     SETfield(evergreen->PA_SU_LINE_CNTL.u32All,0x8,
1818              PA_SU_LINE_CNTL__WIDTH_shift, PA_SU_LINE_CNTL__WIDTH_mask);
1819
1820     // Set up line control:
1821     evergreen->PA_SC_LINE_CNTL.u32All = 0;
1822     CLEARbit(evergreen->PA_SC_LINE_CNTL.u32All, EXPAND_LINE_WIDTH_bit);
1823     SETbit(evergreen->PA_SC_LINE_CNTL.u32All, LAST_PIXEL_bit);
1824
1825     // Set up vertex control:
1826     evergreen->PA_SU_VTX_CNTL.u32All               = 0;
1827     CLEARfield(evergreen->PA_SU_VTX_CNTL.u32All, QUANT_MODE_mask);
1828     SETbit(evergreen->PA_SU_VTX_CNTL.u32All, PIX_CENTER_bit);
1829     SETfield(evergreen->PA_SU_VTX_CNTL.u32All, X_ROUND_TO_EVEN,
1830              PA_SU_VTX_CNTL__ROUND_MODE_shift, PA_SU_VTX_CNTL__ROUND_MODE_mask);
1831
1832     // to 1.0 = no guard band:
1833     evergreen->PA_CL_GB_VERT_CLIP_ADJ.u32All  = 0x3F800000;  // 1.0
1834     evergreen->PA_CL_GB_VERT_DISC_ADJ.u32All  = 0x3F800000;  // 1.0
1835     evergreen->PA_CL_GB_HORZ_CLIP_ADJ.u32All  = 0x3F800000;  // 1.0
1836     evergreen->PA_CL_GB_HORZ_DISC_ADJ.u32All  = 0x3F800000;  // 1.0
1837
1838     // Diable color compares:
1839     SETfield(evergreen->CB_CLRCMP_CONTROL.u32All, CLRCMP_DRAW_ALWAYS,
1840              CLRCMP_FCN_SRC_shift, CLRCMP_FCN_SRC_mask);
1841     SETfield(evergreen->CB_CLRCMP_CONTROL.u32All, CLRCMP_DRAW_ALWAYS,
1842              CLRCMP_FCN_DST_shift, CLRCMP_FCN_DST_mask);
1843     SETfield(evergreen->CB_CLRCMP_CONTROL.u32All, CLRCMP_SEL_SRC,
1844              CLRCMP_FCN_SEL_shift, CLRCMP_FCN_SEL_mask);
1845
1846     // Zero out source:
1847     evergreen->CB_CLRCMP_SRC.u32All = 0x00000000;
1848
1849     // Put a compare color in for error checking:
1850     evergreen->CB_CLRCMP_DST.u32All = 0x000000FF;
1851
1852     // Set up color compare mask:
1853     evergreen->CB_CLRCMP_MSK.u32All = 0xFFFFFFFF;
1854
1855     // Enable all samples for multi-sample anti-aliasing:
1856     evergreen->PA_SC_AA_MASK.u32All = 0xFFFFFFFF;
1857     // Turn off AA:
1858     evergreen->PA_SC_AA_CONFIG.u32All = 0;
1859
1860     SETfield(evergreen->VGT_OUT_DEALLOC_CNTL.u32All, 16,
1861              DEALLOC_DIST_shift, DEALLOC_DIST_mask);
1862     SETfield(evergreen->VGT_VERTEX_REUSE_BLOCK_CNTL.u32All, 14,
1863              VTX_REUSE_DEPTH_shift, VTX_REUSE_DEPTH_mask);
1864
1865     evergreen->SX_MISC.u32All = 0;
1866
1867     SETfield(evergreen->render_target[id].CB_COLOR0_INFO.u32All, 1,
1868              EG_CB_COLOR0_INFO__SOURCE_FORMAT_shift, EG_CB_COLOR0_INFO__SOURCE_FORMAT_mask);
1869     SETbit(evergreen->render_target[id].CB_COLOR0_INFO.u32All, EG_CB_COLOR0_INFO__BLEND_CLAMP_bit);
1870     SETfield(evergreen->render_target[id].CB_COLOR0_INFO.u32All, 0,
1871              EG_CB_COLOR0_INFO__NUMBER_TYPE_shift, EG_CB_COLOR0_INFO__NUMBER_TYPE_mask);
1872
1873     SETfield(evergreen->render_target[id].CB_COLOR0_INFO.u32All, SWAP_STD,
1874              EG_CB_COLOR0_INFO__COMP_SWAP_shift, EG_CB_COLOR0_INFO__COMP_SWAP_mask);
1875
1876     evergreen->render_target[id].CB_COLOR0_VIEW.u32All   = 0;
1877     evergreen->render_target[id].CB_COLOR0_CMASK.u32All   = 0;
1878     evergreen->render_target[id].CB_COLOR0_FMASK.u32All  = 0;
1879     evergreen->render_target[id].CB_COLOR0_FMASK_SLICE.u32All   = 0;
1880
1881     evergreenInitSQConfig(ctx);
1882
1883     context->radeon.hw.all_dirty = GL_TRUE;
1884 }
1885
1886 void evergreenInitStateFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
1887 {
1888         functions->UpdateState = evergreenInvalidateState;
1889         functions->AlphaFunc = evergreenAlphaFunc;
1890         functions->BlendColor = evergreenBlendColor;
1891         functions->BlendEquationSeparate = evergreenBlendEquationSeparate;
1892         functions->BlendFuncSeparate = evergreenBlendFuncSeparate;
1893         functions->Enable = evergreenEnable;
1894         functions->ColorMask = evergreenColorMask;
1895         functions->DepthFunc = evergreenDepthFunc;
1896         functions->DepthMask = evergreenDepthMask;
1897         functions->CullFace = evergreenCullFace;
1898         functions->Fogfv = evergreenFogfv;
1899         functions->FrontFace = evergreenFrontFace;
1900         functions->ShadeModel = evergreenShadeModel;
1901         functions->LogicOpcode = evergreenLogicOpcode;
1902
1903         /* ARB_point_parameters */
1904         functions->PointParameterfv = evergreenPointParameter;
1905
1906         /* Stencil related */
1907         functions->StencilFuncSeparate = evergreenStencilFuncSeparate;
1908         functions->StencilMaskSeparate = evergreenStencilMaskSeparate;
1909         functions->StencilOpSeparate = evergreenStencilOpSeparate;
1910
1911         /* Viewport related */
1912         functions->Viewport = evergreenViewport;
1913         functions->DepthRange = evergreenDepthRange;
1914         functions->PointSize = evergreenPointSize;
1915         functions->LineWidth = evergreenLineWidth;
1916         functions->LineStipple = evergreenLineStipple;
1917
1918         functions->PolygonOffset = evergreenPolygonOffset;
1919         functions->PolygonMode = evergreenPolygonMode;
1920
1921         functions->RenderMode = evergreenRenderMode;
1922
1923         functions->ClipPlane = evergreenClipPlane;
1924
1925         functions->Scissor = radeonScissor;
1926
1927         functions->DrawBuffer = radeonDrawBuffer;
1928         functions->ReadBuffer = radeonReadBuffer;
1929
1930         if (radeon->radeonScreen->kernel_mm) {
1931                 functions->CopyPixels = _mesa_meta_CopyPixels;
1932                 functions->DrawPixels = _mesa_meta_DrawPixels;
1933                 functions->ReadPixels = radeonReadPixels;
1934         }
1935 }
1936
1937