Tizen 2.0 Release
[profile/ivi/osmesa.git] / src / mesa / drivers / dri / r600 / evergreen_diff.h
1 /*
2  * Copyright (C) 2008-2010  Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included
12  * in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20  */
21
22 /*
23  * Authors:
24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
25  */
26
27 #ifndef _EVERGREEN_DIFF_H_
28 #define _EVERGREEN_DIFF_H_
29
30 enum {
31     /* CB_BLEND_CONTROL */
32         EG_CB_BLENDX_CONTROL_ENABLE_bit = 1 << 30,
33     /* PA_SC_SCREEN_SCISSOR_TL */
34         EG_PA_SC_SCREEN_SCISSOR_TL__TL_X_mask                = 0xffff << 0,     
35             EG_PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask                = 0xffff << 16,
36     /* PA_SC_SCREEN_SCISSOR_BR */
37             EG_PA_SC_SCREEN_SCISSOR_BR__BR_X_mask                = 0xffff << 0, 
38             EG_PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask                = 0xffff << 16,
39     /* PA_SC_WINDOW_SCISSOR_TL */ 
40             EG_PA_SC_WINDOW_SCISSOR_TL__TL_X_mask                = 0x7fff << 0, 
41             EG_PA_SC_WINDOW_SCISSOR_TL__TL_Y_mask                = 0x7fff << 16,        
42     /* PA_SC_WINDOW_SCISSOR_BR */
43             EG_PA_SC_WINDOW_SCISSOR_BR__BR_X_mask                = 0x7fff << 0, 
44             EG_PA_SC_WINDOW_SCISSOR_BR__BR_Y_mask                = 0x7fff << 16,
45     /* PA_SC_CLIPRECT_0_TL */
46         EG_PA_SC_CLIPRECT_0_TL__TL_X_mask                    = 0x7fff << 0,     
47             EG_PA_SC_CLIPRECT_0_TL__TL_Y_mask                    = 0x7fff << 16,        
48     /* PA_SC_CLIPRECT_0_BR */   
49             EG_PA_SC_CLIPRECT_0_BR__BR_X_mask                    = 0x7fff << 0, 
50             EG_PA_SC_CLIPRECT_0_BR__BR_Y_mask                    = 0x7fff << 16,
51     /* PA_SC_GENERIC_SCISSOR_TL */
52             EG_PA_SC_GENERIC_SCISSOR_TL__TL_X_mask               = 0x7fff << 0, 
53             EG_PA_SC_GENERIC_SCISSOR_TL__TL_Y_mask               = 0x7fff << 16,        
54     /* PA_SC_GENERIC_SCISSOR_BR */
55             EG_PA_SC_GENERIC_SCISSOR_BR__BR_X_mask               = 0x7fff << 0, 
56             EG_PA_SC_GENERIC_SCISSOR_BR__BR_Y_mask               = 0x7fff << 16,
57     /* PA_SC_VPORT_SCISSOR_0_TL */      
58             EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask               = 0x7fff << 0, 
59             EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask               = 0x7fff << 16,        
60     /* PA_SC_VPORT_SCISSOR_0_BR */              
61             EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask               = 0x7fff << 0, 
62             EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask               = 0x7fff << 16,
63     /* PA_SC_WINDOW_OFFSET */
64         EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_shift        = 0,
65         EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_mask         = 0xffff << 0,
66         EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_shift        = 16,
67         EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_mask         = 0xffff << 16,
68     /* SPI_BARYC_CNTL */
69         EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift          = 4,
70         EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask           = 0x3    << 4,
71         EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift         = 20,
72         EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask          = 0x3    << 20,
73     /* DB_SHADER_CONTROL */
74         EG_DB_SHADER_CONTROL__DUAL_EXPORT_ENABLE_bit         = 1 << 9,
75
76     /* DB_Z_INFO */
77         EG_DB_Z_INFO__FORMAT_shift                           = 0,        //2;
78         EG_DB_Z_INFO__FORMAT_mask                            = 0x3,
79                                                                                  //2;
80                 EG_DB_Z_INFO__ARRAY_MODE_shift                       = 4,        //4;
81         EG_DB_Z_INFO__ARRAY_MODE_mask                        = 0xf << 4,
82                 EG_DB_Z_INFO__TILE_SPLIT_shift                       = 8,        //3;
83         EG_DB_Z_INFO__TILE_SPLIT_mask                        = 0x7 << 8,
84                                                                                  //1;
85                 EG_DB_Z_INFO__NUM_BANKS_shift                        = 12,       //2;
86         EG_DB_Z_INFO__NUM_BANKS_mask                         = 0x3 << 12,
87                                                                                  //2;
88                 EG_DB_Z_INFO__BANK_WIDTH_shift                       = 16,       //2;
89         EG_DB_Z_INFO__BANK_WIDTH_mask                        = 0x3 << 16,
90                                                                                  //2;
91                 EG_DB_Z_INFO__BANK_HEIGHT_shift                      = 20,       //2;
92         EG_DB_Z_INFO__BANK_HEIGHT_mask                       = 0x3 << 20,
93         
94         EG_Z_INVALID                                         = 0x00000000,
95         EG_Z_16                                              = 0x00000001,
96         EG_Z_24                                              = 0x00000002,
97         EG_Z_32_FLOAT                                        = 0x00000003,
98         EG_ADDR_SURF_TILE_SPLIT_256B                         = 0x00000002,
99         EG_ADDR_SURF_8_BANK                                  = 0x00000002,
100         EG_ADDR_SURF_BANK_WIDTH_1                            = 0x00000000,
101         EG_ADDR_SURF_BANK_HEIGHT_1                           = 0x00000000,
102     /* DB_STENCIL_INFO */
103         EG_DB_STENCIL_INFO__FORMAT_bit                       = 1,   //1;
104                                                                             //7;
105                 EG_DB_STENCIL_INFO__TILE_SPLIT_shift                 = 8,   //3;
106         EG_DB_STENCIL_INFO__TILE_SPLIT_mask                  = 0x7 << 8,
107     
108     /* DB_DEPTH_SIZE */
109         EG_DB_DEPTH_SIZE__PITCH_TILE_MAX_shift               = 0,  // 11;
110         EG_DB_DEPTH_SIZE__PITCH_TILE_MAX_mask                = 0x7ff,
111                 EG_DB_DEPTH_SIZE__HEIGHT_TILE_MAX_shift              = 11, // 11;
112         EG_DB_DEPTH_SIZE__HEIGHT_TILE_MAX_mask               = 0x7ff << 11,
113
114     /* DB_COUNT_CONTROL */
115         EG_DB_COUNT_CONTROL__ZPASS_INCREMENT_DISABLE_shift   = 0,  //1
116         EG_DB_COUNT_CONTROL__ZPASS_INCREMENT_DISABLE_bit     = 1,
117         EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_shift      = 1,  //1
118         EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit        = 1 << 1,    
119
120     /* CB_COLOR_CONTROL */
121                                                                       //3;
122                 EG_CB_COLOR_CONTROL__DEGAMMA_ENABLE_bit              = 1 << 3,//1;
123                 EG_CB_COLOR_CONTROL__MODE_shift                      = 4,     //3;
124         EG_CB_COLOR_CONTROL__MODE_mask                       = 0x7 << 4,
125                                                                               //9;
126                 EG_CB_COLOR_CONTROL__ROP3_shift                      = 16,    //8;
127         EG_CB_COLOR_CONTROL__ROP3_mask                       = 0xff << 16,
128         EG_CB_NORMAL                                         = 0x00000001,
129
130     /* CB_COLOR0_INFO */
131         EG_CB_COLOR0_INFO__ENDIAN_shift                      = 0,      //2;
132         EG_CB_COLOR0_INFO__ENDIAN_mask                       = 0x3,
133                 EG_CB_COLOR0_INFO__FORMAT_shift                      = 2,      //6;
134         EG_CB_COLOR0_INFO__FORMAT_mask                       = 0x3f << 2,
135                 EG_CB_COLOR0_INFO__ARRAY_MODE_shift                  = 8,      //4;
136         EG_CB_COLOR0_INFO__ARRAY_MODE_mask                   = 0xf << 8,
137                 EG_CB_COLOR0_INFO__NUMBER_TYPE_shift                 = 12,     //3;
138         EG_CB_COLOR0_INFO__NUMBER_TYPE_mask                  = 0x7 << 12,
139                 EG_CB_COLOR0_INFO__COMP_SWAP_shift                   = 15,     //2;
140         EG_CB_COLOR0_INFO__COMP_SWAP_mask                    = 0x3 << 15,
141                 EG_CB_COLOR0_INFO__FAST_CLEAR_bit                    = 1 << 17,//1;
142                 EG_CB_COLOR0_INFO__COMPRESSION_bit                   = 1 << 18,//1;
143                 EG_CB_COLOR0_INFO__BLEND_CLAMP_bit                   = 1 << 19,//1;
144                 EG_CB_COLOR0_INFO__BLEND_BYPASS_bit                  = 1 << 20,//1;
145                 EG_CB_COLOR0_INFO__SIMPLE_FLOAT_bit                  = 1 << 21,//1;
146                 EG_CB_COLOR0_INFO__ROUND_MODE_bit                    = 1 << 22,//1;
147                 EG_CB_COLOR0_INFO__TILE_COMPACT_bit                  = 1 << 23,//1;
148                 EG_CB_COLOR0_INFO__SOURCE_FORMAT_shift               = 24,     //2;
149         EG_CB_COLOR0_INFO__SOURCE_FORMAT_mask                = 0x3 << 24,
150                 EG_CB_COLOR0_INFO__RAT_bit                           = 1 << 26,//1;
151                 EG_CB_COLOR0_INFO__RESOURCE_TYPE_shift               = 27,     //3;
152         EG_CB_COLOR0_INFO__RESOURCE_TYPE_mask                = 0x7 << 27,
153
154     /* CB_COLOR0_ATTRIB */
155         EG_CB_COLOR0_ATTRIB__NON_DISP_TILING_ORDER_shift     = 4,
156         EG_CB_COLOR0_ATTRIB__NON_DISP_TILING_ORDER_bit       = 1 << 4,
157
158     /* SPI_CONFIG_CNTL_1 */
159         EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_shift           = 0,
160         EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_mask            = 0xf,
161     /* SQ_MS_FIFO_SIZES */
162         EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_shift           = 0,
163         EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_mask            = 0xff,
164         EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_shift        = 8,
165         EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_mask         = 0x1f << 8,
166         EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_shift         = 16,
167         EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_mask          = 0xff << 16,
168         EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_shift   = 24,
169         EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_mask    = 0x1f << 24,
170     /* SQ_CONFIG */
171         EG_SQ_CONFIG__VC_ENABLE_bit                          = 1,
172         EG_SQ_CONFIG__EXPORT_SRC_C_bit                       = 1 << 1,
173         EG_SQ_CONFIG__PS_PRIO_shift                          = 24,
174         EG_SQ_CONFIG__PS_PRIO_mask                           = 0x3 << 24,
175         EG_SQ_CONFIG__VS_PRIO_shift                          = 26,
176         EG_SQ_CONFIG__VS_PRIO_mask                           = 0x3 << 26,
177         EG_SQ_CONFIG__GS_PRIO_shift                          = 28,
178         EG_SQ_CONFIG__GS_PRIO_mask                           = 0x3 << 28,
179         EG_SQ_CONFIG__ES_PRIO_shift                          = 30,
180         EG_SQ_CONFIG__ES_PRIO_mask                           = 0x3 << 30,
181     /* PA_SC_FORCE_EOV_MAX_CNTS */
182         EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_shift = 0,
183         EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_mask  = 0x3fff,
184         EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_shift = 16,
185         EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_mask  = 0x3fff << 16,
186     /* VGT_CACHE_INVALIDATION */
187         EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_shift      = 0,
188         EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_mask       = 0x3, 
189     /* CB_COLOR0_PITCH */
190         EG_CB_COLOR0_PITCH__TILE_MAX_shift                       = 0,
191         EG_CB_COLOR0_PITCH__TILE_MAX_mask                        = 0x7ff,
192     /* CB_COLOR0_SLICE */
193         EG_CB_COLOR0_SLICE__TILE_MAX_shift                       = 0,
194         EG_CB_COLOR0_SLICE__TILE_MAX_mask                        = 0x3fffff,    
195     /* SQ_VTX_CONSTANT_WORD3_0 */
196         EG_SQ_VTX_CONSTANT_WORD3_0__UNCACHED_shift  = 2,
197         EG_SQ_VTX_CONSTANT_WORD3_0__UNCACHED_bit    = 1 << 2,
198
199         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_X_shift = 3, 
200         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_X_mask  = 0x7 << 3,
201      
202         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_Y_shift = 6, 
203         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_Y_mask  = 0x7 << 6,
204      
205         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_Z_shift = 9, 
206         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_Z_mask  = 0x7 << 9,
207      
208         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_W_shift = 12, 
209         EG_SQ_VTX_CONSTANT_WORD3_0__DST_SEL_W_mask  = 0x7 << 12,
210     /* SQ_VTX_CONSTANT_WORD4_0 */
211         EG_SQ_VTX_CONSTANT_WORD4_0__NUM_ELEMENTS_shift = 0,
212         EG_SQ_VTX_CONSTANT_WORD4_0__NUM_ELEMENTS_mask  = 0xFFFFFFFF,
213     /* SQ_VTX_CONSTANT_WORD7_0 */
214         EG_SQ_VTX_CONSTANT_WORD7_0__TYPE_shift         = 30,
215         EG_SQ_VTX_CONSTANT_WORD7_0__TYPE_mask          = 0x3 << 30,
216     /* SQ_TEX_SAMPLER_WORD0_0 */
217         EG_SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_shift         = 0,  // 3;
218         EG_SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_mask          = 0x7,
219                 EG_SQ_TEX_SAMPLER_WORD0_0__CLAMP_Y_shift         = 3,  // 3;
220         EG_SQ_TEX_SAMPLER_WORD0_0__CLAMP_Y_mask          = 0x7 << 3,
221                 EG_SQ_TEX_SAMPLER_WORD0_0__CLAMP_Z_shift         = 6,  // 3;
222         EG_SQ_TEX_SAMPLER_WORD0_0__CLAMP_Z_mask          = 0x7 << 6,
223                 EG_SQ_TEX_SAMPLER_WORD0_0__XY_MAG_FILTER_shift   = 9,  // 2;
224         EG_SQ_TEX_SAMPLER_WORD0_0__XY_MAG_FILTER_mask    = 0x3 << 9,
225                 EG_SQ_TEX_SAMPLER_WORD0_0__XY_MIN_FILTER_shift   = 11, // 2;
226         EG_SQ_TEX_SAMPLER_WORD0_0__XY_MIN_FILTER_mask    = 0x3 << 11,
227                 EG_SQ_TEX_SAMPLER_WORD0_0__Z_FILTER_shift        = 13, // 2;
228         EG_SQ_TEX_SAMPLER_WORD0_0__Z_FILTER_mask         = 0x3 << 13,
229                 EG_SQ_TEX_SAMPLER_WORD0_0__MIP_FILTER_shift      = 15, // 2;
230         EG_SQ_TEX_SAMPLER_WORD0_0__MIP_FILTER_mask       = 0x3 << 15,
231                 EG_SQ_TEX_SAMPLER_WORD0_0__MAX_ANISO_RATIO_shift = 17, // 3;
232         EG_SQ_TEX_SAMPLER_WORD0_0__MAX_ANISO_RATIO_mask  = 0x7 << 17,
233                 EG_SQ_TEX_SAMPLER_WORD0_0__BORDER_COLOR_TYPE_shift = 20,//2;
234         EG_SQ_TEX_SAMPLER_WORD0_0__BORDER_COLOR_TYPE_mask  = 0x3 << 20,
235                 EG_SQ_TEX_SAMPLER_WORD0_0__DCF_shift             = 22, // 3;
236         EG_SQ_TEX_SAMPLER_WORD0_0__DCF_mask              = 0x7 << 22,
237                 EG_SQ_TEX_SAMPLER_WORD0_0__CHROMA_KEY_shift      = 25, // 2;
238         EG_SQ_TEX_SAMPLER_WORD0_0__CHROMA_KEY_mask       = 0x3 << 25,
239                 EG_SQ_TEX_SAMPLER_WORD0_0__ANISO_THRESHOLD_shift = 27, // 3;
240         EG_SQ_TEX_SAMPLER_WORD0_0__ANISO_THRESHOLD_mask  = 0x7 << 27,
241                 EG_SQ_TEX_SAMPLER_WORD0_0__Reserved_shift        = 30, // 2         
242         EG_SQ_TEX_SAMPLER_WORD0_0__Reserved_mask         = 0x3 << 30,
243     /* SQ_TEX_SAMPLER_WORD1_0 */
244         EG_SQ_TEX_SAMPLER_WORD1_0__MIN_LOD_shift         = 0, // 12;
245         EG_SQ_TEX_SAMPLER_WORD1_0__MIN_LOD_mask          = 0xfff,
246                 EG_SQ_TEX_SAMPLER_WORD1_0__MAX_LOD_shift         = 12,// 12;
247         EG_SQ_TEX_SAMPLER_WORD1_0__MAX_LOD_mask          = 0xfff << 12,
248     /* SQ_TEX_SAMPLER_WORD2_0 */
249         EG_SQ_TEX_SAMPLER_WORD2_0__LOD_BIAS_shift          = 0, //14;
250         EG_SQ_TEX_SAMPLER_WORD2_0__LOD_BIAS_mask           = 0x3fff,
251                 EG_SQ_TEX_SAMPLER_WORD2_0__LOD_BIAS_SEC_shift      = 14,//6;
252         EG_SQ_TEX_SAMPLER_WORD2_0__LOD_BIAS_SEC_mask       = 0x3f << 14,
253                 EG_SQ_TEX_SAMPLER_WORD2_0__MC_COORD_TRUNCATE_shift = 20,//1;
254         EG_SQ_TEX_SAMPLER_WORD2_0__MC_COORD_TRUNCATE_bit   = 1 << 20,
255                 EG_SQ_TEX_SAMPLER_WORD2_0__FORCE_DEGAMMA_shift     = 21,//1;
256         EG_SQ_TEX_SAMPLER_WORD2_0__FORCE_DEGAMMA_bit       = 1 << 21,
257                 EG_SQ_TEX_SAMPLER_WORD2_0__ANISO_BIAS_shift        = 22,//6;
258         EG_SQ_TEX_SAMPLER_WORD2_0__ANISO_BIAS_mask         = 0x3f << 22,
259                 EG_SQ_TEX_SAMPLER_WORD2_0__TRUNCATE_COORD_shift    = 28,//1;
260         EG_SQ_TEX_SAMPLER_WORD2_0__TRUNCATE_COORD_bit      = 1 << 28,
261                 EG_SQ_TEX_SAMPLER_WORD2_0__DISABLE_CUBE_WRAP_shift = 29,//1;
262         EG_SQ_TEX_SAMPLER_WORD2_0__DISABLE_CUBE_WRAP_bit   = 1 << 29,
263                 EG_SQ_TEX_SAMPLER_WORD2_0__Reserved_shift          = 30,//1;
264         EG_SQ_TEX_SAMPLER_WORD2_0__Reserved_bit            = 1 << 30,
265                 EG_SQ_TEX_SAMPLER_WORD2_0__TYPE_shift              = 31,//1;
266         EG_SQ_TEX_SAMPLER_WORD2_0__TYPE_bit                = 1 << 31,
267     /* SQ_TEX_RESOURCE_WORD0_0 */
268         EG_SQ_TEX_RESOURCE_WORD0_0__DIM_shift              = 0, // 3;
269         EG_SQ_TEX_RESOURCE_WORD0_0__DIM_mask               = 0x7,
270                 EG_SQ_TEX_RESOURCE_WORD0_0__ISET_shift             = 3, // 1;
271         EG_SQ_TEX_RESOURCE_WORD0_0__ISET_bit               = 1 << 3,
272                 EG_SQ_TEX_RESOURCE_WORD0_0__Reserve_shift          = 4, // 1;
273         EG_SQ_TEX_RESOURCE_WORD0_0__Reserve_bit            = 1 << 4,
274                 EG_SQ_TEX_RESOURCE_WORD0_0__NDTO_shift             = 5, // 1;
275         EG_SQ_TEX_RESOURCE_WORD0_0__NDTO_bit               = 1 << 5,
276                 EG_SQ_TEX_RESOURCE_WORD0_0__PITCH_shift            = 6, // 12;
277         EG_SQ_TEX_RESOURCE_WORD0_0__PITCH_mask             = 0xfff << 6,
278                 EG_SQ_TEX_RESOURCE_WORD0_0__TEX_WIDTH_shift        = 18,// 14;
279         EG_SQ_TEX_RESOURCE_WORD0_0__TEX_WIDTH_mask         = 0x3fff << 18,
280     /* SQ_TEX_RESOURCE_WORD1_0 */
281         EG_SQ_TEX_RESOURCE_WORD1_0__TEX_HEIGHT_shift       = 0, // 14;
282         EG_SQ_TEX_RESOURCE_WORD1_0__TEX_HEIGHT_mask        = 0x3fff,
283                 EG_SQ_TEX_RESOURCE_WORD1_0__TEX_DEPTH_shift        = 14,// 13;
284         EG_SQ_TEX_RESOURCE_WORD1_0__TEX_DEPTH_mask         = 0x1fff << 14,
285                 EG_SQ_TEX_RESOURCE_WORD1_0__Reserved_shift         = 27,// 1;
286         EG_SQ_TEX_RESOURCE_WORD1_0__Reserved_bit           = 1 << 27,
287                 EG_SQ_TEX_RESOURCE_WORD1_0__ARRAY_MODE_shift       = 28,// 4;
288         EG_SQ_TEX_RESOURCE_WORD1_0__ARRAY_MODE_mask        = 0xf << 28,
289     /* SQ_TEX_RESOURCE_WORD6_0 */
290         EG_SQ_TEX_RESOURCE_WORD6_0__MAX_ANISO_RATIO_shift  = 0, //: 3;
291         EG_SQ_TEX_RESOURCE_WORD6_0__MAX_ANISO_RATIO_mask   = 0x7,               
292                 EG_SQ_TEX_RESOURCE_WORD6_0__INTERLACED_shift       = 6, //1;
293         EG_SQ_TEX_RESOURCE_WORD6_0__INTERLACED_bit         = 1 << 6,            
294                 EG_SQ_TEX_RESOURCE_WORD6_0__MIN_LOD_shift          = 8, //12;
295         EG_SQ_TEX_RESOURCE_WORD6_0__MIN_LOD_mask           = 0xfff << 8,                
296                 EG_SQ_TEX_RESOURCE_WORD6_0__TILE_SPLIT_shift       = 29,// 3;
297         EG_SQ_TEX_RESOURCE_WORD6_0__TILE_SPLIT_mask        = 0x7 << 29,
298     /* SQ_TEX_RESOURCE_WORD7_0 */
299         EG_SQ_TEX_RESOURCE_WORD7_0__DATA_FORMAT_shift            = 0, // 6;
300         EG_SQ_TEX_RESOURCE_WORD7_0__DATA_FORMAT_mask             = 0x3f,
301                 EG_SQ_TEX_RESOURCE_WORD7_0__MACRO_TILE_ASPECT_shift      = 6, // 2;
302         EG_SQ_TEX_RESOURCE_WORD7_0__MACRO_TILE_ASPECT_mask       = 0x3 << 6,
303                 EG_SQ_TEX_RESOURCE_WORD7_0__BANK_WIDTH_shift             = 8, // 2;
304         EG_SQ_TEX_RESOURCE_WORD7_0__BANK_WIDTH_mask              = 0x3 << 8,
305                 EG_SQ_TEX_RESOURCE_WORD7_0__BANK_HEIGHT_shift            = 10,// 2;
306         EG_SQ_TEX_RESOURCE_WORD7_0__BANK_HEIGHT_mask             = 0x3 << 10,           
307                 EG_SQ_TEX_RESOURCE_WORD7_0__DEPTH_SAMPLE_ORDER_shift     = 15,// 1;
308         EG_SQ_TEX_RESOURCE_WORD7_0__DEPTH_SAMPLE_ORDER_bit       = 1 << 15,
309                 EG_SQ_TEX_RESOURCE_WORD7_0__NUM_BANKS_shift              = 16,// 2;
310         EG_SQ_TEX_RESOURCE_WORD7_0__NUM_BANKS_mask               = 0x3 << 16,           
311                 EG_SQ_TEX_RESOURCE_WORD7_0__TYPE_shift                   = 30,// 2;
312         EG_SQ_TEX_RESOURCE_WORD7_0__TYPE_mask                    = 0x3 << 30,
313 };
314
315 /*  */
316
317 #define EG_SQ_FETCH_RESOURCE_COUNT        0x00000400
318 #define EG_SQ_TEX_SAMPLER_COUNT           0x0000006c
319 #define EG_SQ_LOOP_CONST_COUNT            0x000000c0
320
321 #define EG_SET_RESOURCE_OFFSET  0x30000
322 #define EG_SET_RESOURCE_END     0x30400 //r600 := offset + 0x4000
323
324 #define EG_SET_LOOP_CONST_OFFSET 0x3A200
325 #define EG_SET_LOOP_CONST_END    0x3A26C //r600 := offset + 0x180
326
327
328 #define EG_SQ_FETCH_RESOURCE_VS_OFFSET 0x000000b0
329 #define EG_FETCH_RESOURCE_STRIDE       8
330
331 #define EG_SET_BOOL_CONST_OFFSET       0x3A500
332 #define EG_SET_BOOL_CONST_END          0x3A506
333
334
335 #endif //_EVERGREEN_DIFF_H_