2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
34 * Nicolai Haehnle <prefect_@gmx.net>
44 #include "simple_list.h"
46 #include "api_arrayelt.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
51 #include "texformat.h"
53 #include "radeon_ioctl.h"
54 #include "radeon_state.h"
55 #include "r300_context.h"
56 #include "r300_ioctl.h"
57 #include "r300_state.h"
59 #include "r300_program.h"
60 #include "r300_emit.h"
61 #include "r300_fixed_pipelines.h"
63 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
65 r300ContextPtr rmesa = R300_CONTEXT(ctx);
66 int pp_misc = rmesa->hw.at.cmd[R300_AT_ALPHA_TEST];
69 CLAMPED_FLOAT_TO_UBYTE(refByte, ref);
71 R300_STATECHANGE(rmesa, at);
73 pp_misc &= ~(R300_ALPHA_TEST_OP_MASK | R300_REF_ALPHA_MASK);
74 pp_misc |= (refByte & R300_REF_ALPHA_MASK);
78 pp_misc |= R300_ALPHA_TEST_FAIL;
81 pp_misc |= R300_ALPHA_TEST_LESS;
84 pp_misc |= R300_ALPHA_TEST_EQUAL;
87 pp_misc |= R300_ALPHA_TEST_LEQUAL;
90 pp_misc |= R300_ALPHA_TEST_GREATER;
93 pp_misc |= R300_ALPHA_TEST_NEQUAL;
96 pp_misc |= R300_ALPHA_TEST_GEQUAL;
99 pp_misc |= R300_ALPHA_TEST_PASS;
103 rmesa->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
106 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
109 r300ContextPtr rmesa = R300_CONTEXT(ctx);
110 fprintf(stderr, "%s:%s is not implemented yet. Fixme !\n", __FILE__, __FUNCTION__);
112 R200_STATECHANGE(rmesa, ctx);
113 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
114 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
115 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
116 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
117 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor)
118 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] =
119 radeonPackColor(4, color[0], color[1], color[2], color[3]);
124 * Calculate the hardware blend factor setting. This same function is used
125 * for source and destination of both alpha and RGB.
128 * The hardware register value for the specified blend factor. This value
129 * will need to be shifted into the correct position for either source or
130 * destination factor.
133 * Since the two cases where source and destination are handled differently
134 * are essentially error cases, they should never happen. Determine if these
135 * cases can be removed.
137 static int blend_factor(GLenum factor, GLboolean is_src)
143 func = R200_BLEND_GL_ZERO;
146 func = R200_BLEND_GL_ONE;
149 func = R200_BLEND_GL_DST_COLOR;
151 case GL_ONE_MINUS_DST_COLOR:
152 func = R200_BLEND_GL_ONE_MINUS_DST_COLOR;
155 func = R200_BLEND_GL_SRC_COLOR;
157 case GL_ONE_MINUS_SRC_COLOR:
158 func = R200_BLEND_GL_ONE_MINUS_SRC_COLOR;
161 func = R200_BLEND_GL_SRC_ALPHA;
163 case GL_ONE_MINUS_SRC_ALPHA:
164 func = R200_BLEND_GL_ONE_MINUS_SRC_ALPHA;
167 func = R200_BLEND_GL_DST_ALPHA;
169 case GL_ONE_MINUS_DST_ALPHA:
170 func = R200_BLEND_GL_ONE_MINUS_DST_ALPHA;
172 case GL_SRC_ALPHA_SATURATE:
174 (is_src) ? R200_BLEND_GL_SRC_ALPHA_SATURATE :
177 case GL_CONSTANT_COLOR:
178 func = R200_BLEND_GL_CONST_COLOR;
180 case GL_ONE_MINUS_CONSTANT_COLOR:
181 func = R200_BLEND_GL_ONE_MINUS_CONST_COLOR;
183 case GL_CONSTANT_ALPHA:
184 func = R200_BLEND_GL_CONST_ALPHA;
186 case GL_ONE_MINUS_CONSTANT_ALPHA:
187 func = R200_BLEND_GL_ONE_MINUS_CONST_ALPHA;
190 func = (is_src) ? R200_BLEND_GL_ONE : R200_BLEND_GL_ZERO;
196 * Sets both the blend equation and the blend function.
197 * This is done in a single
198 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
199 * change the interpretation of the blend function.
200 * Also, make sure that blend function and blend equation are set to their default
201 * value if color blending is not enabled, since at least blend equations GL_MIN
202 * and GL_FUNC_REVERSE_SUBTRACT will cause wrong results otherwise for
206 /* helper function */
207 static void r300_set_blend_cntl(r300ContextPtr rmesa, int func, int eqn, int cbits, int funcA, int eqnA)
209 GLuint new_ablend, new_cblend;
211 new_ablend = eqnA | funcA;
212 new_cblend = eqn | func | cbits;
213 if(rmesa->hw.bld.cmd[R300_BLD_ABLEND] == rmesa->hw.bld.cmd[R300_BLD_CBLEND]){
214 new_cblend |= R300_BLEND_NO_SEPARATE;
216 if((new_ablend != rmesa->hw.bld.cmd[R300_BLD_ABLEND])
217 || (new_cblend != rmesa->hw.bld.cmd[R300_BLD_CBLEND])){
218 R300_STATECHANGE(rmesa, bld);
219 rmesa->hw.bld.cmd[R300_BLD_ABLEND]=new_ablend;
220 rmesa->hw.bld.cmd[R300_BLD_CBLEND]=new_cblend;
224 static void r300_set_blend_state(GLcontext * ctx)
226 r300ContextPtr rmesa = R300_CONTEXT(ctx);
228 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
229 ~(R300_ROP_ENABLE | R300_ALPHA_BLEND_ENABLE |
230 R300_SEPARATE_ALPHA_ENABLE);
233 int func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
234 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
235 int eqn = R200_COMB_FCN_ADD_CLAMP;
236 int funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
237 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
238 int eqnA = R200_COMB_FCN_ADD_CLAMP;
241 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
242 if (ctx->Color._LogicOpEnabled) {
244 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
245 cntl | R300_ROP_ENABLE;
247 r300_set_blend_cntl(rmesa,
251 } else if (ctx->Color.BlendEnabled) {
253 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
254 cntl | R300_ALPHA_BLEND_ENABLE |
255 R300_SEPARATE_ALPHA_ENABLE;
259 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
261 r300_set_blend_cntl(rmesa,
267 if (ctx->Color._LogicOpEnabled) {
269 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
270 cntl | R300_ROP_ENABLE;
271 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
274 } else if (ctx->Color.BlendEnabled) {
276 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
277 cntl | R300_ALPHA_BLEND_ENABLE;
281 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
282 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
284 r300_set_blend_cntl(rmesa,
292 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
293 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
295 R200_DST_BLEND_SHIFT);
297 switch (ctx->Color.BlendEquationRGB) {
299 eqn = R300_COMB_FCN_ADD_CLAMP;
302 case GL_FUNC_SUBTRACT:
303 eqn = R300_COMB_FCN_SUB_CLAMP;
306 case GL_FUNC_REVERSE_SUBTRACT:
307 eqn = R200_COMB_FCN_RSUB_CLAMP;
311 eqn = R200_COMB_FCN_MIN;
312 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
313 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
317 eqn = R200_COMB_FCN_MAX;
318 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
319 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
324 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
325 __func__, __LINE__, ctx->Color.BlendEquationRGB);
329 if (!rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
331 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
337 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
338 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
340 R200_DST_BLEND_SHIFT);
342 switch (ctx->Color.BlendEquationA) {
344 eqnA = R300_COMB_FCN_ADD_CLAMP;
347 case GL_FUNC_SUBTRACT:
348 eqnA = R300_COMB_FCN_SUB_CLAMP;
351 case GL_FUNC_REVERSE_SUBTRACT:
352 eqnA = R200_COMB_FCN_RSUB_CLAMP;
356 eqnA = R200_COMB_FCN_MIN;
357 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
358 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
362 eqnA = R200_COMB_FCN_MAX;
363 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
364 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
368 fprintf(stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n",
369 __func__, __LINE__, ctx->Color.BlendEquationA);
373 r300_set_blend_cntl(rmesa,
374 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
376 r300_set_blend_cntl(rmesa,
377 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
381 static void r300BlendEquationSeparate(GLcontext * ctx,
382 GLenum modeRGB, GLenum modeA)
384 r300_set_blend_state(ctx);
387 static void r300BlendFuncSeparate(GLcontext * ctx,
388 GLenum sfactorRGB, GLenum dfactorRGB,
389 GLenum sfactorA, GLenum dfactorA)
391 r300_set_blend_state(ctx);
395 * Update our tracked culling state based on Mesa's state.
397 static void r300UpdateCulling(GLcontext* ctx)
399 r300ContextPtr r300 = R300_CONTEXT(ctx);
402 R300_STATECHANGE(r300, cul);
403 if (ctx->Polygon.CullFlag) {
404 if (ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK)
405 val = R300_CULL_FRONT|R300_CULL_BACK;
406 else if (ctx->Polygon.CullFaceMode == GL_FRONT)
407 val = R300_CULL_FRONT;
409 val = R300_CULL_BACK;
411 if (ctx->Polygon.FrontFace == GL_CW)
412 val |= R300_FRONT_FACE_CW;
414 val |= R300_FRONT_FACE_CCW;
417 r300->hw.cul.cmd[R300_CUL_CULL] = val;
422 * Handle glEnable()/glDisable().
424 * \note Mesa already filters redundant calls to glEnable/glDisable.
426 static void r300Enable(GLcontext* ctx, GLenum cap, GLboolean state)
428 r300ContextPtr r300 = R300_CONTEXT(ctx);
431 if (RADEON_DEBUG & DEBUG_STATE)
432 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
433 _mesa_lookup_enum_by_nr(cap),
434 state ? "GL_TRUE" : "GL_FALSE");
437 /* Fast track this one...
445 R200_STATECHANGE(r300, at);
447 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
448 R300_ALPHA_TEST_ENABLE;
450 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
451 ~R300_ALPHA_TEST_ENABLE;
456 case GL_COLOR_LOGIC_OP:
457 r300_set_blend_state(ctx);
461 R300_STATECHANGE(r300, zs);
465 newval = R300_RB3D_Z_TEST_AND_WRITE;
467 newval = R300_RB3D_Z_TEST;
471 r300->hw.zs.cmd[R300_ZS_CNTL_0] = newval;
474 case GL_STENCIL_TEST:
477 static int stencil=1;
479 fprintf(stderr, "%s:%s - do not know how to enable stencil. Help me !\n",
480 __FILE__, __FUNCTION__);
485 if (r300->state.hw_stencil) {
486 //fprintf(stderr, "Stencil %s\n", state ? "enabled" : "disabled");
487 R300_STATECHANGE(r300, zs);
489 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
490 R300_RB3D_STENCIL_ENABLE;
492 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
493 ~R300_RB3D_STENCIL_ENABLE;
496 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
501 r300UpdateCulling(ctx);
503 case GL_VERTEX_PROGRAM_ARB:
504 //TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, state);
508 radeonEnable(ctx, cap, state);
515 * Change the culling mode.
517 * \note Mesa already filters redundant calls to this function.
519 static void r300CullFace(GLcontext* ctx, GLenum mode)
523 r300UpdateCulling(ctx);
528 * Change the polygon orientation.
530 * \note Mesa already filters redundant calls to this function.
532 static void r300FrontFace(GLcontext* ctx, GLenum mode)
536 r300UpdateCulling(ctx);
541 * Change the depth testing function.
543 * \note Mesa already filters redundant calls to this function.
545 static void r300DepthFunc(GLcontext* ctx, GLenum func)
547 r300ContextPtr r300 = R300_CONTEXT(ctx);
549 R300_STATECHANGE(r300, zs);
551 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
555 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NEVER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
558 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LESS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
561 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_EQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
564 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
567 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GREATER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
570 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NOTEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
573 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
576 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
584 * Enable/Disable depth writing.
586 * \note Mesa already filters redundant calls to this function.
588 static void r300DepthMask(GLcontext* ctx, GLboolean mask)
590 r300ContextPtr r300 = R300_CONTEXT(ctx);
592 if (!ctx->Depth.Test)
595 R300_STATECHANGE(r300, zs);
596 r300->hw.zs.cmd[R300_ZS_CNTL_0] = mask
597 ? R300_RB3D_Z_TEST_AND_WRITE : R300_RB3D_Z_TEST;
602 * Handle glColorMask()
604 static void r300ColorMask(GLcontext* ctx,
605 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
607 r300ContextPtr r300 = R300_CONTEXT(ctx);
608 int mask = (b << 0) | (g << 1) | (r << 2) | (a << 3);
610 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
611 R300_STATECHANGE(r300, cmk);
612 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
616 /* =============================================================
619 static void r300PointSize(GLcontext * ctx, GLfloat size)
621 r300ContextPtr r300 = R300_CONTEXT(ctx);
623 /* This might need fixing later */
624 R300_STATECHANGE(r300, vps);
625 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
627 /* =============================================================
631 static int translate_stencil_func(int func)
635 return R300_ZS_NEVER;
641 return R300_ZS_EQUAL;
644 return R300_ZS_LEQUAL;
647 return R300_ZS_GREATER;
650 return R300_ZS_NOTEQUAL;
653 return R300_ZS_GEQUAL;
656 return R300_ZS_ALWAYS;
662 static int translate_stencil_op(int op)
670 return R300_ZS_REPLACE;
675 case GL_INCR_WRAP_EXT:
676 return R300_ZS_INCR_WRAP;
677 case GL_DECR_WRAP_EXT:
678 return R300_ZS_DECR_WRAP;
680 return R300_ZS_INVERT;
684 static void r300StencilFunc(GLcontext * ctx, GLenum func,
685 GLint ref, GLuint mask)
687 r300ContextPtr rmesa = R300_CONTEXT(ctx);
688 GLuint refmask = ((ctx->Stencil.Ref[0] << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
690 ValueMask[0] << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
693 R200_STATECHANGE(rmesa, zs);
695 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(
696 (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
697 | (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT));
698 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~((R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
699 (R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
701 flag = translate_stencil_func(ctx->Stencil.Function[0]);
703 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
704 | (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT);
705 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
708 static void r300StencilMask(GLcontext * ctx, GLuint mask)
710 r300ContextPtr rmesa = R300_CONTEXT(ctx);
712 R200_STATECHANGE(rmesa, zs);
713 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~(R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT);
714 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= ctx->Stencil.WriteMask[0] << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
718 static void r300StencilOp(GLcontext * ctx, GLenum fail,
719 GLenum zfail, GLenum zpass)
721 r300ContextPtr rmesa = R300_CONTEXT(ctx);
723 R200_STATECHANGE(rmesa, zs);
724 /* It is easier to mask what's left.. */
725 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= (R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
727 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
728 (translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT)
729 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT)
730 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT)
731 |(translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT)
732 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT)
733 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT);
737 static void r300ClearStencil(GLcontext * ctx, GLint s)
739 r300ContextPtr rmesa = R300_CONTEXT(ctx);
741 /* Not sure whether this is correct.. */
742 R200_STATECHANGE(rmesa, zs);
743 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] =
744 ((GLuint) ctx->Stencil.Clear |
745 (0xff << R200_STENCIL_MASK_SHIFT) |
746 (ctx->Stencil.WriteMask[0] << R200_STENCIL_WRITEMASK_SHIFT));
749 /* =============================================================
750 * Window position and viewport transformation
754 * To correctly position primitives:
756 #define SUBPIXEL_X 0.125
757 #define SUBPIXEL_Y 0.125
759 void r300UpdateWindow(GLcontext * ctx)
761 r300ContextPtr rmesa = R300_CONTEXT(ctx);
762 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
763 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
764 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
765 const GLfloat *v = ctx->Viewport._WindowMap.m;
767 GLfloat sx = v[MAT_SX];
768 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
769 GLfloat sy = -v[MAT_SY];
770 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
771 GLfloat sz = v[MAT_SZ] * rmesa->state.depth.scale;
772 GLfloat tz = v[MAT_TZ] * rmesa->state.depth.scale;
774 R300_FIREVERTICES(rmesa);
775 R300_STATECHANGE(rmesa, vpt);
777 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
778 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
779 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
780 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
781 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
782 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
785 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
786 GLsizei width, GLsizei height)
788 /* Don't pipeline viewport changes, conflict with window offset
789 * setting below. Could apply deltas to rescue pipelined viewport
790 * values, or keep the originals hanging around.
792 R200_FIREVERTICES(R200_CONTEXT(ctx));
793 r300UpdateWindow(ctx);
796 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
798 r300UpdateWindow(ctx);
801 /* Routing and texture-related */
803 void r300_setup_routing(GLcontext *ctx, GLboolean immediate)
805 int i, count=0,reg=0;
807 TNLcontext *tnl = TNL_CONTEXT(ctx);
808 struct vertex_buffer *VB = &tnl->vb;
809 r300ContextPtr r300 = R300_CONTEXT(ctx);
812 /* Stage 1 - input to VAP */
814 /* Assign register number automatically, retaining it in rmesa->state.reg */
816 /* Note: immediate vertex data includes all coordinates.
817 To save bandwidth use either VBUF or state-based vertex generation */
819 #define CONFIGURE_AOS(v, o, r, f) \
821 if (RADEON_DEBUG & DEBUG_STATE)fprintf(stderr, "Enabling "#r "\n"); \
823 r300->state.aos[count].element_size=4; \
824 r300->state.aos[count].stride=4; \
825 r300->state.aos[count].ncomponents=4; \
827 r300->state.aos[count].element_size=v->size; \
828 r300->state.aos[count].stride=v->size; \
829 r300->state.aos[count].ncomponents=v->size; \
831 r300->state.aos[count].offset=o; \
832 r300->state.aos[count].reg=reg; \
833 r300->state.aos[count].format=(f); \
834 r300->state.vap_reg.r=reg; \
839 /* All offsets are 0 - for use by immediate mode.
840 Should change later to handle vertex buffers */
841 if(tnl->render_inputs & _TNL_BIT_POS)
842 CONFIGURE_AOS(VB->ObjPtr, 0, i_coords, AOS_FORMAT_FLOAT);
843 if(tnl->render_inputs & _TNL_BIT_NORMAL)
844 CONFIGURE_AOS(VB->NormalPtr, 0, i_normal, AOS_FORMAT_FLOAT);
846 if(tnl->render_inputs & _TNL_BIT_COLOR0)
847 CONFIGURE_AOS(VB->ColorPtr[0], 0, i_color[0], AOS_FORMAT_FLOAT_COLOR);
848 if(tnl->render_inputs & _TNL_BIT_COLOR1)
849 CONFIGURE_AOS(VB->ColorPtr[1], 0, i_color[1], AOS_FORMAT_FLOAT_COLOR);
851 if(tnl->render_inputs & _TNL_BIT_FOG)
852 CONFIGURE_AOS(VB->FogCoordPtr, 0, i_fog, AOS_FORMAT_FLOAT);
854 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
855 if(tnl->render_inputs & (_TNL_BIT_TEX0<<i))
856 CONFIGURE_AOS(VB->TexCoordPtr[i], 0, i_tex[i], AOS_FORMAT_FLOAT);
858 if(tnl->render_inputs & _TNL_BIT_INDEX)
859 CONFIGURE_AOS(VB->IndexPtr[0], 0, i_index, AOS_FORMAT_FLOAT);
860 if(tnl->render_inputs & _TNL_BIT_POINTSIZE)
861 CONFIGURE_AOS(VB->PointSizePtr, 0, i_pointsize, AOS_FORMAT_FLOAT);
863 r300->state.aos_count=count;
865 if (RADEON_DEBUG & DEBUG_STATE)
866 fprintf(stderr, "aos_count=%d\n", count);
868 if(count>R300_MAX_AOS_ARRAYS){
869 fprintf(stderr, "Aieee ! AOS array count exceeded !\n");
875 /* setup INPUT_ROUTE */
876 R300_STATECHANGE(r300, vir[0]);
877 for(i=0;i+1<count;i+=2){
878 dw=(r300->state.aos[i].ncomponents-1)
879 | ((r300->state.aos[i].reg)<<8)
880 | (r300->state.aos[i].format<<14)
881 | (((r300->state.aos[i+1].ncomponents-1)
882 | ((r300->state.aos[i+1].reg)<<8)
883 | (r300->state.aos[i+1].format<<14))<<16);
888 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
891 dw=(r300->state.aos[count-1].ncomponents-1)
892 | (r300->state.aos[count-1].format<<14)
893 | ((r300->state.aos[count-1].reg)<<8)
895 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
896 //fprintf(stderr, "vir0 dw=%08x\n", dw);
898 /* Set the rest of INPUT_ROUTE_0 to 0 */
899 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[0].cmd[R300_VIR_CNTL_0+i]=(0x0);
900 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = (count+1)>>1;
903 /* Mesa assumes that all missing components are from (0, 0, 0, 1) */
904 #define ALL_COMPONENTS ((R300_INPUT_ROUTE_SELECT_X<<R300_INPUT_ROUTE_X_SHIFT) \
905 | (R300_INPUT_ROUTE_SELECT_Y<<R300_INPUT_ROUTE_Y_SHIFT) \
906 | (R300_INPUT_ROUTE_SELECT_Z<<R300_INPUT_ROUTE_Z_SHIFT) \
907 | (R300_INPUT_ROUTE_SELECT_W<<R300_INPUT_ROUTE_W_SHIFT))
909 #define ALL_DEFAULT ((R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_X_SHIFT) \
910 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Y_SHIFT) \
911 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Z_SHIFT) \
912 | (R300_INPUT_ROUTE_SELECT_ONE<<R300_INPUT_ROUTE_W_SHIFT))
914 R300_STATECHANGE(r300, vir[1]);
916 for(i=0;i+1<count;i+=2){
918 mask=(1<<(r300->state.aos[i].ncomponents*3))-1;
919 dw=(ALL_COMPONENTS & mask)
920 | (ALL_DEFAULT & ~mask)
921 | R300_INPUT_ROUTE_ENABLE;
924 mask=(1<<(r300->state.aos[i+1].ncomponents*3))-1;
926 (ALL_COMPONENTS & mask)
927 | (ALL_DEFAULT & ~mask)
928 | R300_INPUT_ROUTE_ENABLE
931 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
934 mask=(1<<(r300->state.aos[count-1].ncomponents*3))-1;
935 dw=(ALL_COMPONENTS & mask)
936 | (ALL_DEFAULT & ~mask)
937 | R300_INPUT_ROUTE_ENABLE;
938 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
939 //fprintf(stderr, "vir1 dw=%08x\n", dw);
941 /* Set the rest of INPUT_ROUTE_1 to 0 */
942 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[1].cmd[R300_VIR_CNTL_0+i]=0x0;
943 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = (count+1)>>1;
945 /* Set up input_cntl */
947 R300_STATECHANGE(r300, vic);
948 r300->hw.vic.cmd[R300_VIC_CNTL_0]=0x5555; /* Hard coded value, no idea what it means */
950 r300->hw.vic.cmd[R300_VIC_CNTL_1]=R300_INPUT_CNTL_POS
951 | R300_INPUT_CNTL_COLOR;
953 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
954 if(ctx->Texture.Unit[i].Enabled)
955 r300->hw.vic.cmd[R300_VIC_CNTL_1]|=(R300_INPUT_CNTL_TC0<<i);
957 /* Stage 3: VAP output */
958 R300_STATECHANGE(r300, vof);
959 r300->hw.vof.cmd[R300_VOF_CNTL_0]=R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
960 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
962 r300->hw.vof.cmd[R300_VOF_CNTL_1]=0;
963 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
964 if(ctx->Texture.Unit[i].Enabled)
965 r300->hw.vof.cmd[R300_VOF_CNTL_1]|=(4<<(3*i));
969 static r300TexObj default_tex_obj={
970 filter:R300_TX_MAG_FILTER_LINEAR | R300_TX_MIN_FILTER_LINEAR,
972 size: (0xff << R300_TX_WIDTHMASK_SHIFT)
973 | (0xff << R300_TX_HEIGHTMASK_SHIFT)
974 | (0x8 << R300_TX_SIZE_SHIFT),
981 /* there is probably a system to these value, but, for now,
982 we just try by hand */
984 static int inline translate_src(int src)
993 case GL_PRIMARY_COLOR:
1010 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1011 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1012 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1013 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1014 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1015 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1016 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1017 * combinations where only one of them is nearest.
1019 static unsigned long gen_fixed_filter(unsigned long f)
1021 unsigned long mag, min, needs_fixing=0;
1024 /* We ignore MIRROR bit so we dont have to do everything twice */
1025 if((f & ((7-1) << R300_TX_WRAP_S_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)){
1028 if((f & ((7-1) << R300_TX_WRAP_T_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)){
1031 if((f & ((7-1) << R300_TX_WRAP_Q_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_Q_SHIFT)){
1038 mag=f & R300_TX_MAG_FILTER_MASK;
1039 min=f & R300_TX_MIN_FILTER_MASK;
1041 /* TODO: Check for anisto filters too */
1042 if((mag != R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST))
1045 /* r300 cant handle these modes hence we force nearest to linear */
1046 if((mag == R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST)){
1047 f &= ~R300_TX_MAG_FILTER_NEAREST;
1048 f |= R300_TX_MAG_FILTER_LINEAR;
1052 if((min == R300_TX_MIN_FILTER_NEAREST) && (mag != R300_TX_MAG_FILTER_NEAREST)){
1053 f &= ~R300_TX_MIN_FILTER_NEAREST;
1054 f |= R300_TX_MIN_FILTER_LINEAR;
1058 /* Both are nearest */
1059 if(needs_fixing & 1){
1060 f &= ~((7-1) << R300_TX_WRAP_S_SHIFT);
1061 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1063 if(needs_fixing & 2){
1064 f &= ~((7-1) << R300_TX_WRAP_T_SHIFT);
1065 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1067 if(needs_fixing & 4){
1068 f &= ~((7-1) << R300_TX_WRAP_Q_SHIFT);
1069 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_Q_SHIFT;
1074 void r300_setup_textures(GLcontext *ctx)
1077 struct r300_tex_obj *t;
1078 r300ContextPtr r300 = R300_CONTEXT(ctx);
1079 int max_texture_unit=-1; /* -1 translates into no setup costs for fields */
1080 struct gl_texture_unit *texUnit;
1082 R300_STATECHANGE(r300, txe);
1083 R300_STATECHANGE(r300, tex.filter);
1084 R300_STATECHANGE(r300, tex.unknown1);
1085 R300_STATECHANGE(r300, tex.size);
1086 R300_STATECHANGE(r300, tex.format);
1087 R300_STATECHANGE(r300, tex.offset);
1088 R300_STATECHANGE(r300, tex.unknown4);
1089 R300_STATECHANGE(r300, tex.unknown5);
1090 //R300_STATECHANGE(r300, tex.border_color);
1092 r300->state.texture.tc_count=0;
1094 r300->hw.txe.cmd[R300_TXE_ENABLE]=0x0;
1096 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1097 if (RADEON_DEBUG & DEBUG_STATE)
1098 fprintf(stderr, "mtu=%d\n", mtu);
1100 if(mtu>R300_MAX_TEXTURE_UNITS){
1101 fprintf(stderr, "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1102 mtu, R300_MAX_TEXTURE_UNITS);
1106 if(ctx->Texture.Unit[i].Enabled){
1107 t=r300->state.texture.unit[i].texobj;
1108 fprintf(stderr, "format=%08x\n", r300->state.texture.unit[i].format);
1109 r300->state.texture.tc_count++;
1111 fprintf(stderr, "Texture unit %d enabled, but corresponding texobj is NULL, using default object.\n", i);
1115 if (RADEON_DEBUG & DEBUG_STATE)
1116 fprintf(stderr, "Activating texture unit %d\n", i);
1118 r300->hw.txe.cmd[R300_TXE_ENABLE]|=(1<<i);
1120 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0+i]=gen_fixed_filter(t->filter);
1121 /* No idea why linear filtered textures shake when puting random data */
1122 /*r300->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+i]=(rand()%0xffffffff) & (~0x1fff);*/
1123 r300->hw.tex.size.cmd[R300_TEX_VALUE_0+i]=t->size;
1124 r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=t->format;
1125 //fprintf(stderr, "t->format=%08x\n", t->format);
1126 r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=r300->radeon.radeonScreen->fbLocation+t->offset;
1127 r300->hw.tex.unknown4.cmd[R300_TEX_VALUE_0+i]=0x0;
1128 r300->hw.tex.unknown5.cmd[R300_TEX_VALUE_0+i]=0x0;
1129 //r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
1133 ((drm_r300_cmd_header_t*)r300->hw.tex.filter.cmd)->unchecked_state.count = max_texture_unit+1;
1134 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown1.cmd)->unchecked_state.count = max_texture_unit+1;
1135 ((drm_r300_cmd_header_t*)r300->hw.tex.size.cmd)->unchecked_state.count = max_texture_unit+1;
1136 ((drm_r300_cmd_header_t*)r300->hw.tex.format.cmd)->unchecked_state.count = max_texture_unit+1;
1137 ((drm_r300_cmd_header_t*)r300->hw.tex.offset.cmd)->unchecked_state.count = max_texture_unit+1;
1138 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown4.cmd)->unchecked_state.count = max_texture_unit+1;
1139 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown5.cmd)->unchecked_state.count = max_texture_unit+1;
1140 //((drm_r300_cmd_header_t*)r300->hw.tex.border_color.cmd)->unchecked_state.count = max_texture_unit+1;
1142 if (RADEON_DEBUG & DEBUG_STATE)
1143 fprintf(stderr, "TX_ENABLE: %08x max_texture_unit=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], max_texture_unit);
1146 void r300_setup_rs_unit(GLcontext *ctx)
1148 r300ContextPtr r300 = R300_CONTEXT(ctx);
1151 /* This needs to be rewritten - it is a hack at best */
1153 R300_STATECHANGE(r300, ri);
1154 R300_STATECHANGE(r300, rc);
1155 R300_STATECHANGE(r300, rr);
1157 for(i = 1; i <= 8; ++i)
1158 r300->hw.ri.cmd[i] = 0x00d10000;
1159 r300->hw.ri.cmd[R300_RI_INTERP_1] |= R300_RS_INTERP_1_UNKNOWN;
1160 r300->hw.ri.cmd[R300_RI_INTERP_2] |= R300_RS_INTERP_2_UNKNOWN;
1161 r300->hw.ri.cmd[R300_RI_INTERP_3] |= R300_RS_INTERP_3_UNKNOWN;
1164 for(i = 2; i <= 8; ++i)
1165 r300->hw.ri.cmd[i] |= 4;
1168 for(i = 1; i <= 8; ++i)
1169 r300->hw.rr.cmd[i] = 0;
1170 /* textures enabled ? */
1171 if(r300->state.texture.tc_count>0){
1173 /* This code only really works with one set of texture coordinates */
1175 /* The second constant is needed to get glxgears display anything .. */
1176 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7
1177 | R300_RS_CNTL_0_UNKNOWN_18
1178 | (r300->state.texture.tc_count<<R300_RS_CNTL_TC_CNT_SHIFT);
1179 r300->hw.rc.cmd[2] = 0xc0;
1182 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1183 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x24008;
1187 /* The second constant is needed to get glxgears display anything .. */
1188 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7 | R300_RS_CNTL_0_UNKNOWN_18;
1189 r300->hw.rc.cmd[2] = 0;
1191 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1192 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x4000;
1197 #define vpucount(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count)
1199 #define bump_vpu_count(ptr, new_count) do{\
1200 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1201 int _nc=(new_count)/4; \
1202 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1205 void static inline setup_vertex_shader_fragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1209 if(vsf->length==0)return;
1211 if(vsf->length & 0x3){
1212 fprintf(stderr,"VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1216 switch((dest>>8) & 0xf){
1218 R300_STATECHANGE(r300, vpi);
1219 for(i=0;i<vsf->length;i++)
1220 r300->hw.vpi.cmd[R300_VPI_INSTR_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1221 bump_vpu_count(r300->hw.vpi.cmd, vsf->length+4*(dest & 0xff));
1225 R300_STATECHANGE(r300, vpp);
1226 for(i=0;i<vsf->length;i++)
1227 r300->hw.vpp.cmd[R300_VPP_PARAM_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1228 bump_vpu_count(r300->hw.vpp.cmd, vsf->length+4*(dest & 0xff));
1231 R300_STATECHANGE(r300, vps);
1232 for(i=0;i<vsf->length;i++)
1233 r300->hw.vps.cmd[1+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1234 bump_vpu_count(r300->hw.vps.cmd, vsf->length+4*(dest & 0xff));
1237 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1243 void r300SetupVertexShader(r300ContextPtr rmesa)
1245 GLcontext* ctx = rmesa->radeon.glCtx;
1247 /* Reset state, in case we don't use something */
1248 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1249 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1250 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1253 /* This needs to be replaced by vertex shader generation code */
1256 /* textures enabled ? */
1257 if(rmesa->state.texture.tc_count>0){
1258 rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER;
1260 rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER;
1264 rmesa->state.vertex_shader.matrix[0].length=16;
1265 memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
1267 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->state.vertex_shader.program));
1269 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->state.vertex_shader.matrix[0]));
1271 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX1, &(rmesa->state.vertex_shader.matrix[0]));
1272 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX2, &(rmesa->state.vertex_shader.matrix[0]));
1274 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR0, &(rmesa->state.vertex_shader.vector[0]));
1275 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR1, &(rmesa->state.vertex_shader.vector[1]));
1279 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1280 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1283 R300_STATECHANGE(rmesa, pvs);
1284 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(rmesa->state.vertex_shader.program_start << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1285 | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1286 | (rmesa->state.vertex_shader.program_end << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1287 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(rmesa->state.vertex_shader.param_offset << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1288 | (rmesa->state.vertex_shader.param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1289 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(rmesa->state.vertex_shader.unknown_ptr2 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1290 | (rmesa->state.vertex_shader.unknown_ptr3 << 0);
1292 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1293 so I leave it as a reminder */
1295 reg_start(R300_VAP_PVS_WAITIDLE,0);
1300 void r300SetupPixelShader(r300ContextPtr rmesa)
1304 /* This needs to be replaced by pixel shader generation code */
1306 /* textures enabled ? */
1307 if(rmesa->state.texture.tc_count>0){
1308 rmesa->state.pixel_shader=SINGLE_TEXTURE_PIXEL_SHADER;
1310 rmesa->state.pixel_shader=FLAT_COLOR_PIXEL_SHADER;
1313 R300_STATECHANGE(rmesa, fpt);
1314 for(i=0;i<rmesa->state.pixel_shader.program.tex.length;i++)
1315 rmesa->hw.fpt.cmd[R300_FPT_INSTR_0+i]=rmesa->state.pixel_shader.program.tex.inst[i];
1316 rmesa->hw.fpt.cmd[R300_FPT_CMD_0]=cmducs(R300_PFS_TEXI_0, rmesa->state.pixel_shader.program.tex.length);
1318 #define OUTPUT_FIELD(st, reg, field) \
1319 R300_STATECHANGE(rmesa, st); \
1320 for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \
1321 rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rmesa->state.pixel_shader.program.alu.inst[i].field;\
1322 rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmducs(reg, rmesa->state.pixel_shader.program.alu.length);
1324 OUTPUT_FIELD(fpi[0], R300_PFS_INSTR0_0, inst0);
1325 OUTPUT_FIELD(fpi[1], R300_PFS_INSTR1_0, inst1);
1326 OUTPUT_FIELD(fpi[2], R300_PFS_INSTR2_0, inst2);
1327 OUTPUT_FIELD(fpi[3], R300_PFS_INSTR3_0, inst3);
1330 R300_STATECHANGE(rmesa, fp);
1332 rmesa->hw.fp.cmd[R300_FP_NODE0+i]=
1333 (rmesa->state.pixel_shader.program.node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT)
1334 | (rmesa->state.pixel_shader.program.node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT)
1335 | (rmesa->state.pixel_shader.program.node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT)
1336 | (rmesa->state.pixel_shader.program.node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT)
1337 | ( (i==3) ? R300_PFS_NODE_LAST_NODE : 0);
1341 rmesa->hw.fp.cmd[R300_FP_CNTL0]=
1342 (rmesa->state.pixel_shader.program.active_nodes-1)
1343 | (rmesa->state.pixel_shader.program.first_node_has_tex<<3);
1345 rmesa->hw.fp.cmd[R300_FP_CNTL1]=rmesa->state.pixel_shader.program.temp_register_count;
1347 rmesa->hw.fp.cmd[R300_FP_CNTL2]=
1348 (rmesa->state.pixel_shader.program.alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT)
1349 | (rmesa->state.pixel_shader.program.alu_end << R300_PFS_CNTL_ALU_END_SHIFT)
1350 | (rmesa->state.pixel_shader.program.tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT)
1351 | (rmesa->state.pixel_shader.program.tex_end << R300_PFS_CNTL_TEX_END_SHIFT);
1353 R300_STATECHANGE(rmesa, fpp);
1354 for(i=0;i<rmesa->state.pixel_shader.param_length;i++){
1355 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+0]=r300PackFloat32(rmesa->state.pixel_shader.param[i].x);
1356 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+1]=r300PackFloat32(rmesa->state.pixel_shader.param[i].y);
1357 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+2]=r300PackFloat32(rmesa->state.pixel_shader.param[i].z);
1358 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+3]=r300PackFloat32(rmesa->state.pixel_shader.param[i].w);
1360 rmesa->hw.fpp.cmd[R300_FPP_CMD_0]=cmducs(R300_PFS_PARAM_0_X, rmesa->state.pixel_shader.param_length);
1365 * Called by Mesa after an internal state update.
1367 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
1369 r300ContextPtr r300 = R300_CONTEXT(ctx);
1371 _swrast_InvalidateState(ctx, new_state);
1372 _swsetup_InvalidateState(ctx, new_state);
1373 _ac_InvalidateState(ctx, new_state);
1374 _tnl_InvalidateState(ctx, new_state);
1375 _ae_invalidate_state(ctx, new_state);
1377 /* Go inefficiency! */
1378 r300ResetHwState(r300);
1383 * Completely recalculates hardware state based on the Mesa state.
1385 void r300ResetHwState(r300ContextPtr r300)
1387 GLcontext* ctx = r300->radeon.glCtx;
1390 if (RADEON_DEBUG & DEBUG_STATE)
1391 fprintf(stderr, "%s\n", __FUNCTION__);
1393 /* This is a place to initialize registers which
1394 have bitfields accessed by different functions
1395 and not all bits are used */
1397 r300->hw.zs.cmd[R300_ZS_CNTL_0] = 0;
1398 r300->hw.zs.cmd[R300_ZS_CNTL_1] = 0;
1399 r300->hw.zs.cmd[R300_ZS_CNTL_2] = 0xffff00;
1402 /* go and compute register values from GL state */
1404 r300UpdateWindow(ctx);
1407 ctx->Color.ColorMask[RCOMP],
1408 ctx->Color.ColorMask[GCOMP],
1409 ctx->Color.ColorMask[BCOMP],
1410 ctx->Color.ColorMask[ACOMP]);
1412 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
1413 r300DepthMask(ctx, ctx->Depth.Mask);
1414 r300DepthFunc(ctx, ctx->Depth.Func);
1416 r300UpdateCulling(ctx);
1418 r300_setup_routing(ctx, GL_TRUE);
1420 r300UpdateTextureState(ctx);
1421 r300_setup_textures(ctx);
1422 r300_setup_rs_unit(ctx);
1424 r300SetupVertexShader(r300);
1425 r300SetupPixelShader(r300);
1427 r300_set_blend_state(ctx);
1428 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
1430 /* Initialize magic registers
1431 TODO : learn what they really do, or get rid of
1432 those we don't have to touch */
1433 r300->hw.unk2080.cmd[1] = 0x0030045A;
1435 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
1436 | R300_VPORT_X_OFFSET_ENA
1437 | R300_VPORT_Y_SCALE_ENA
1438 | R300_VPORT_Y_OFFSET_ENA
1439 | R300_VPORT_Z_SCALE_ENA
1440 | R300_VPORT_Z_OFFSET_ENA
1442 r300->hw.vte.cmd[2] = 0x00000008;
1444 r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
1445 r300->hw.unk2134.cmd[2] = 0x00000000;
1447 r300->hw.unk2140.cmd[1] = 0x00000000;
1449 #if 0 /* Done in setup routing */
1450 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = 1;
1451 r300->hw.vir[0].cmd[1] = 0x21030003;
1453 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = 1;
1454 r300->hw.vir[1].cmd[1] = 0xF688F688;
1456 r300->hw.vic.cmd[R300_VIR_CNTL_0] = 0x00000001;
1457 r300->hw.vic.cmd[R300_VIR_CNTL_1] = 0x00000405;
1460 r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA;
1462 r300->hw.unk221C.cmd[1] = R300_221C_NORMAL;
1464 r300->hw.unk2220.cmd[1] = r300PackFloat32(1.0);
1465 r300->hw.unk2220.cmd[2] = r300PackFloat32(1.0);
1466 r300->hw.unk2220.cmd[3] = r300PackFloat32(1.0);
1467 r300->hw.unk2220.cmd[4] = r300PackFloat32(1.0);
1469 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1470 r300->hw.unk2288.cmd[1] = R300_2288_R300;
1472 r300->hw.unk2288.cmd[1] = R300_2288_RV350;
1475 r300->hw.vof.cmd[R300_VOF_CNTL_0] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
1476 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
1477 r300->hw.vof.cmd[R300_VOF_CNTL_1] = 0; /* no textures */
1480 r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0;
1481 r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0;
1482 r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0;
1485 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
1486 | R300_GB_LINE_STUFF_ENABLE
1487 | R300_GB_TRIANGLE_STUFF_ENABLE;
1489 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
1490 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
1491 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1492 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1493 | R300_GB_TILE_PIPE_COUNT_R300
1494 | R300_GB_TILE_SIZE_16;
1496 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1497 | R300_GB_TILE_PIPE_COUNT_RV300
1498 | R300_GB_TILE_SIZE_16;
1499 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0x00000000;
1500 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = 0x00000000; /* No antialiasing */
1502 //r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;
1504 r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0);
1505 r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0);
1506 r300->hw.unk4200.cmd[3] = r300PackFloat32(1.0);
1507 r300->hw.unk4200.cmd[4] = r300PackFloat32(1.0);
1509 r300->hw.unk4214.cmd[1] = 0x00050005;
1511 r300->hw.ps.cmd[R300_PS_POINTSIZE] = (6 << R300_POINTSIZE_X_SHIFT) |
1512 (6 << R300_POINTSIZE_Y_SHIFT);
1514 r300->hw.unk4230.cmd[1] = 0x01800000;
1515 r300->hw.unk4230.cmd[2] = 0x00020006;
1516 r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0);
1518 r300->hw.unk4260.cmd[1] = 0;
1519 r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0);
1520 r300->hw.unk4260.cmd[3] = r300PackFloat32(1.0);
1522 r300->hw.unk4274.cmd[1] = 0x00000002;
1523 r300->hw.unk4274.cmd[2] = 0x0003AAAA;
1524 r300->hw.unk4274.cmd[3] = 0x00000000;
1525 r300->hw.unk4274.cmd[4] = 0x00000000;
1527 r300->hw.unk4288.cmd[1] = 0x00000000;
1528 r300->hw.unk4288.cmd[2] = 0x00000001;
1529 r300->hw.unk4288.cmd[3] = 0x00000000;
1530 r300->hw.unk4288.cmd[4] = 0x00000000;
1531 r300->hw.unk4288.cmd[5] = 0x00000000;
1533 r300->hw.unk42A0.cmd[1] = 0x00000000;
1535 r300->hw.unk42B4.cmd[1] = 0x00000000;
1537 r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
1538 r300->hw.unk42C0.cmd[2] = 0x00000000;
1541 r300->hw.unk43A4.cmd[1] = 0x0000001C;
1542 r300->hw.unk43A4.cmd[2] = 0x2DA49525;
1544 r300->hw.unk43E8.cmd[1] = 0x00FFFFFF;
1547 r300->hw.fp.cmd[R300_FP_CNTL0] = 0;
1548 r300->hw.fp.cmd[R300_FP_CNTL1] = 0;
1549 r300->hw.fp.cmd[R300_FP_CNTL2] = 0;
1550 r300->hw.fp.cmd[R300_FP_NODE0] = 0;
1551 r300->hw.fp.cmd[R300_FP_NODE1] = 0;
1552 r300->hw.fp.cmd[R300_FP_NODE2] = 0;
1553 r300->hw.fp.cmd[R300_FP_NODE3] = 0;
1556 r300->hw.unk46A4.cmd[1] = 0x00001B01;
1557 r300->hw.unk46A4.cmd[2] = 0x00001B0F;
1558 r300->hw.unk46A4.cmd[3] = 0x00001B0F;
1559 r300->hw.unk46A4.cmd[4] = 0x00001B0F;
1560 r300->hw.unk46A4.cmd[5] = 0x00000001;
1563 for(i = 1; i <= 64; ++i) {
1564 /* create NOP instructions */
1565 r300->hw.fpi[0].cmd[i] = FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO));
1566 r300->hw.fpi[1].cmd[i] = FP_SELC(0,XYZ,NO,FP_TMP(0),0,0);
1567 r300->hw.fpi[2].cmd[i] = FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO));
1568 r300->hw.fpi[3].cmd[i] = FP_SELA(0,W,NO,FP_TMP(0),0,0);
1572 r300->hw.unk4BC0.cmd[1] = 0;
1574 r300->hw.unk4BC8.cmd[1] = 0;
1575 r300->hw.unk4BC8.cmd[2] = 0;
1576 r300->hw.unk4BC8.cmd[3] = 0;
1579 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
1582 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
1583 r300->hw.unk4BD8.cmd[1] = 0;
1585 r300->hw.unk4E00.cmd[1] = 0;
1588 r300->hw.bld.cmd[R300_BLD_CBLEND] = 0;
1589 r300->hw.bld.cmd[R300_BLD_ABLEND] = 0;
1592 r300->hw.unk4E10.cmd[1] = 0;
1593 r300->hw.unk4E10.cmd[2] = 0;
1594 r300->hw.unk4E10.cmd[3] = 0;
1596 r300->hw.cb.cmd[R300_CB_OFFSET] =
1597 r300->radeon.radeonScreen->backOffset +
1598 r300->radeon.radeonScreen->fbLocation;
1599 r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.radeonScreen->backPitch
1600 | R300_COLOR_UNKNOWN_22_23;
1602 r300->hw.unk4E50.cmd[1] = 0;
1603 r300->hw.unk4E50.cmd[2] = 0;
1604 r300->hw.unk4E50.cmd[3] = 0;
1605 r300->hw.unk4E50.cmd[4] = 0;
1606 r300->hw.unk4E50.cmd[5] = 0;
1607 r300->hw.unk4E50.cmd[6] = 0;
1608 r300->hw.unk4E50.cmd[7] = 0;
1609 r300->hw.unk4E50.cmd[8] = 0;
1610 r300->hw.unk4E50.cmd[9] = 0;
1612 r300->hw.unk4E88.cmd[1] = 0;
1614 r300->hw.unk4EA0.cmd[1] = 0x00000000;
1615 r300->hw.unk4EA0.cmd[2] = 0xffffffff;
1617 r300->hw.unk4F10.cmd[1] = 0x00000002; // depthbuffer format?
1618 r300->hw.unk4F10.cmd[2] = 0x00000000;
1619 r300->hw.unk4F10.cmd[3] = 0x00000003;
1620 r300->hw.unk4F10.cmd[4] = 0x00000000;
1622 /* experiment a bit */
1623 r300->hw.unk4F10.cmd[2] = 0x00000001; // depthbuffer format?
1625 r300->hw.zb.cmd[R300_ZB_OFFSET] =
1626 r300->radeon.radeonScreen->depthOffset +
1627 r300->radeon.radeonScreen->fbLocation;
1628 r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
1630 r300->hw.unk4F28.cmd[1] = 0;
1632 r300->hw.unk4F30.cmd[1] = 0;
1633 r300->hw.unk4F30.cmd[2] = 0;
1635 r300->hw.unk4F44.cmd[1] = 0;
1637 r300->hw.unk4F54.cmd[1] = 0;
1640 ((drm_r300_cmd_header_t*)r300->hw.vpi.cmd)->vpu.count = 0;
1641 for(i = 1; i < R300_VPI_CMDSIZE; i += 4) {
1643 r300->hw.vpi.cmd[i+0] = VP_OUT(ADD,TMP,0,XYZW);
1644 r300->hw.vpi.cmd[i+1] = VP_IN(TMP,0);
1645 r300->hw.vpi.cmd[i+2] = VP_ZERO();
1646 r300->hw.vpi.cmd[i+3] = VP_ZERO();
1649 ((drm_r300_cmd_header_t*)r300->hw.vpp.cmd)->vpu.count = 0;
1650 for(i = 1; i < R300_VPP_CMDSIZE; ++i)
1651 r300->hw.vpp.cmd[i] = 0;
1654 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
1655 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
1656 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
1657 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
1661 r300->hw.all_dirty = GL_TRUE;
1667 * Calculate initial hardware state and register state functions.
1668 * Assumes that the command buffer and state atoms have been
1669 * initialized already.
1671 void r300InitState(r300ContextPtr r300)
1673 GLcontext *ctx = r300->radeon.glCtx;
1676 radeonInitState(&r300->radeon);
1678 switch (ctx->Visual.depthBits) {
1680 r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
1681 depth_fmt = R200_DEPTH_FORMAT_16BIT_INT_Z;
1682 //r300->state.stencil.clear = 0x00000000;
1685 r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
1686 depth_fmt = R200_DEPTH_FORMAT_24BIT_INT_Z;
1687 //r300->state.stencil.clear = 0xff000000;
1690 fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
1691 ctx->Visual.depthBits);
1695 /* Only have hw stencil when depth buffer is 24 bits deep */
1696 r300->state.hw_stencil = (ctx->Visual.stencilBits > 0 &&
1697 ctx->Visual.depthBits == 24);
1699 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
1701 r300ResetHwState(r300);
1707 * Initialize driver's state callback functions
1709 void r300InitStateFuncs(struct dd_function_table* functions)
1711 radeonInitStateFuncs(functions);
1713 functions->UpdateState = r300InvalidateState;
1714 functions->AlphaFunc = r300AlphaFunc;
1715 functions->BlendColor = r300BlendColor;
1716 functions->BlendEquationSeparate = r300BlendEquationSeparate;
1717 functions->BlendFuncSeparate = r300BlendFuncSeparate;
1718 functions->Enable = r300Enable;
1719 functions->ColorMask = r300ColorMask;
1720 functions->DepthFunc = r300DepthFunc;
1721 functions->DepthMask = r300DepthMask;
1722 functions->CullFace = r300CullFace;
1723 functions->FrontFace = r300FrontFace;
1725 /* Stencil related */
1726 functions->ClearStencil = r300ClearStencil;
1727 functions->StencilFunc = r300StencilFunc;
1728 functions->StencilMask = r300StencilMask;
1729 functions->StencilOp = r300StencilOp;
1731 /* Viewport related */
1732 functions->Viewport = r300Viewport;
1733 functions->DepthRange = r300DepthRange;
1734 functions->PointSize = r300PointSize;