2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
34 * Nicolai Haehnle <prefect_@gmx.net>
44 #include "simple_list.h"
46 #include "api_arrayelt.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
51 #include "texformat.h"
53 #include "radeon_ioctl.h"
54 #include "radeon_state.h"
55 #include "r300_context.h"
56 #include "r300_ioctl.h"
57 #include "r300_state.h"
59 #include "r300_program.h"
60 #include "r300_emit.h"
61 #include "r300_fixed_pipelines.h"
64 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
66 r300ContextPtr rmesa = R300_CONTEXT(ctx);
67 int pp_misc = rmesa->hw.at.cmd[R300_AT_ALPHA_TEST];
70 CLAMPED_FLOAT_TO_UBYTE(refByte, ref);
72 R300_STATECHANGE(rmesa, at);
74 pp_misc &= ~(R300_ALPHA_TEST_OP_MASK | R300_REF_ALPHA_MASK);
75 pp_misc |= (refByte & R300_REF_ALPHA_MASK);
79 pp_misc |= R300_ALPHA_TEST_FAIL;
82 pp_misc |= R300_ALPHA_TEST_LESS;
85 pp_misc |= R300_ALPHA_TEST_EQUAL;
88 pp_misc |= R300_ALPHA_TEST_LEQUAL;
91 pp_misc |= R300_ALPHA_TEST_GREATER;
94 pp_misc |= R300_ALPHA_TEST_NEQUAL;
97 pp_misc |= R300_ALPHA_TEST_GEQUAL;
100 pp_misc |= R300_ALPHA_TEST_PASS;
104 rmesa->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
107 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
110 r300ContextPtr rmesa = R300_CONTEXT(ctx);
111 fprintf(stderr, "%s:%s is not implemented yet. Fixme !\n", __FILE__, __FUNCTION__);
113 R200_STATECHANGE(rmesa, ctx);
114 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
115 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
116 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
117 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
118 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor)
119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] =
120 radeonPackColor(4, color[0], color[1], color[2], color[3]);
125 * Calculate the hardware blend factor setting. This same function is used
126 * for source and destination of both alpha and RGB.
129 * The hardware register value for the specified blend factor. This value
130 * will need to be shifted into the correct position for either source or
131 * destination factor.
134 * Since the two cases where source and destination are handled differently
135 * are essentially error cases, they should never happen. Determine if these
136 * cases can be removed.
138 static int blend_factor(GLenum factor, GLboolean is_src)
144 func = R200_BLEND_GL_ZERO;
147 func = R200_BLEND_GL_ONE;
150 func = R200_BLEND_GL_DST_COLOR;
152 case GL_ONE_MINUS_DST_COLOR:
153 func = R200_BLEND_GL_ONE_MINUS_DST_COLOR;
156 func = R200_BLEND_GL_SRC_COLOR;
158 case GL_ONE_MINUS_SRC_COLOR:
159 func = R200_BLEND_GL_ONE_MINUS_SRC_COLOR;
162 func = R200_BLEND_GL_SRC_ALPHA;
164 case GL_ONE_MINUS_SRC_ALPHA:
165 func = R200_BLEND_GL_ONE_MINUS_SRC_ALPHA;
168 func = R200_BLEND_GL_DST_ALPHA;
170 case GL_ONE_MINUS_DST_ALPHA:
171 func = R200_BLEND_GL_ONE_MINUS_DST_ALPHA;
173 case GL_SRC_ALPHA_SATURATE:
175 (is_src) ? R200_BLEND_GL_SRC_ALPHA_SATURATE :
178 case GL_CONSTANT_COLOR:
179 func = R200_BLEND_GL_CONST_COLOR;
181 case GL_ONE_MINUS_CONSTANT_COLOR:
182 func = R200_BLEND_GL_ONE_MINUS_CONST_COLOR;
184 case GL_CONSTANT_ALPHA:
185 func = R200_BLEND_GL_CONST_ALPHA;
187 case GL_ONE_MINUS_CONSTANT_ALPHA:
188 func = R200_BLEND_GL_ONE_MINUS_CONST_ALPHA;
191 func = (is_src) ? R200_BLEND_GL_ONE : R200_BLEND_GL_ZERO;
197 * Sets both the blend equation and the blend function.
198 * This is done in a single
199 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
200 * change the interpretation of the blend function.
201 * Also, make sure that blend function and blend equation are set to their default
202 * value if color blending is not enabled, since at least blend equations GL_MIN
203 * and GL_FUNC_REVERSE_SUBTRACT will cause wrong results otherwise for
207 /* helper function */
208 static void r300_set_blend_cntl(r300ContextPtr rmesa, int func, int eqn, int cbits, int funcA, int eqnA)
210 GLuint new_ablend, new_cblend;
212 new_ablend = eqnA | funcA;
213 new_cblend = eqn | func | cbits;
214 if(rmesa->hw.bld.cmd[R300_BLD_ABLEND] == rmesa->hw.bld.cmd[R300_BLD_CBLEND]){
215 new_cblend |= R300_BLEND_NO_SEPARATE;
217 if((new_ablend != rmesa->hw.bld.cmd[R300_BLD_ABLEND])
218 || (new_cblend != rmesa->hw.bld.cmd[R300_BLD_CBLEND])){
219 R300_STATECHANGE(rmesa, bld);
220 rmesa->hw.bld.cmd[R300_BLD_ABLEND]=new_ablend;
221 rmesa->hw.bld.cmd[R300_BLD_CBLEND]=new_cblend;
225 static void r300_set_blend_state(GLcontext * ctx)
227 r300ContextPtr rmesa = R300_CONTEXT(ctx);
229 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
230 ~(R300_ROP_ENABLE | R300_ALPHA_BLEND_ENABLE |
231 R300_SEPARATE_ALPHA_ENABLE);
234 int func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
235 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
236 int eqn = R200_COMB_FCN_ADD_CLAMP;
237 int funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
238 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
239 int eqnA = R200_COMB_FCN_ADD_CLAMP;
242 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
243 if (ctx->Color._LogicOpEnabled) {
245 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
246 cntl | R300_ROP_ENABLE;
248 r300_set_blend_cntl(rmesa,
252 } else if (ctx->Color.BlendEnabled) {
254 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
255 cntl | R300_ALPHA_BLEND_ENABLE |
256 R300_SEPARATE_ALPHA_ENABLE;
260 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
262 r300_set_blend_cntl(rmesa,
268 if (ctx->Color._LogicOpEnabled) {
270 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
271 cntl | R300_ROP_ENABLE;
272 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
275 } else if (ctx->Color.BlendEnabled) {
277 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
278 cntl | R300_ALPHA_BLEND_ENABLE;
282 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
283 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
285 r300_set_blend_cntl(rmesa,
293 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
294 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
296 R200_DST_BLEND_SHIFT);
298 switch (ctx->Color.BlendEquationRGB) {
300 eqn = R300_COMB_FCN_ADD_CLAMP;
303 case GL_FUNC_SUBTRACT:
304 eqn = R300_COMB_FCN_SUB_CLAMP;
307 case GL_FUNC_REVERSE_SUBTRACT:
308 eqn = R200_COMB_FCN_RSUB_CLAMP;
312 eqn = R200_COMB_FCN_MIN;
313 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
314 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
318 eqn = R200_COMB_FCN_MAX;
319 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
320 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
325 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
326 __func__, __LINE__, ctx->Color.BlendEquationRGB);
330 if (!rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
332 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
338 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
339 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
341 R200_DST_BLEND_SHIFT);
343 switch (ctx->Color.BlendEquationA) {
345 eqnA = R300_COMB_FCN_ADD_CLAMP;
348 case GL_FUNC_SUBTRACT:
349 eqnA = R300_COMB_FCN_SUB_CLAMP;
352 case GL_FUNC_REVERSE_SUBTRACT:
353 eqnA = R200_COMB_FCN_RSUB_CLAMP;
357 eqnA = R200_COMB_FCN_MIN;
358 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
359 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
363 eqnA = R200_COMB_FCN_MAX;
364 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
365 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
369 fprintf(stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n",
370 __func__, __LINE__, ctx->Color.BlendEquationA);
374 r300_set_blend_cntl(rmesa,
375 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
377 r300_set_blend_cntl(rmesa,
378 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
382 static void r300BlendEquationSeparate(GLcontext * ctx,
383 GLenum modeRGB, GLenum modeA)
385 r300_set_blend_state(ctx);
388 static void r300BlendFuncSeparate(GLcontext * ctx,
389 GLenum sfactorRGB, GLenum dfactorRGB,
390 GLenum sfactorA, GLenum dfactorA)
392 r300_set_blend_state(ctx);
396 * Update our tracked culling state based on Mesa's state.
398 static void r300UpdateCulling(GLcontext* ctx)
400 r300ContextPtr r300 = R300_CONTEXT(ctx);
403 R300_STATECHANGE(r300, cul);
404 if (ctx->Polygon.CullFlag) {
405 if (ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK)
406 val = R300_CULL_FRONT|R300_CULL_BACK;
407 else if (ctx->Polygon.CullFaceMode == GL_FRONT)
408 val = R300_CULL_FRONT;
410 val = R300_CULL_BACK;
412 if (ctx->Polygon.FrontFace == GL_CW)
413 val |= R300_FRONT_FACE_CW;
415 val |= R300_FRONT_FACE_CCW;
418 r300->hw.cul.cmd[R300_CUL_CULL] = val;
423 * Handle glEnable()/glDisable().
425 * \note Mesa already filters redundant calls to glEnable/glDisable.
427 static void r300Enable(GLcontext* ctx, GLenum cap, GLboolean state)
429 r300ContextPtr r300 = R300_CONTEXT(ctx);
432 if (RADEON_DEBUG & DEBUG_STATE)
433 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
434 _mesa_lookup_enum_by_nr(cap),
435 state ? "GL_TRUE" : "GL_FALSE");
438 /* Fast track this one...
446 R200_STATECHANGE(r300, at);
448 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
449 R300_ALPHA_TEST_ENABLE;
451 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
452 ~R300_ALPHA_TEST_ENABLE;
457 case GL_COLOR_LOGIC_OP:
458 r300_set_blend_state(ctx);
462 R300_STATECHANGE(r300, zs);
466 newval = R300_RB3D_Z_TEST_AND_WRITE;
468 newval = R300_RB3D_Z_TEST;
472 r300->hw.zs.cmd[R300_ZS_CNTL_0] = newval;
475 case GL_STENCIL_TEST:
478 static int stencil=1;
480 fprintf(stderr, "%s:%s - do not know how to enable stencil. Help me !\n",
481 __FILE__, __FUNCTION__);
486 if (r300->state.hw_stencil) {
487 //fprintf(stderr, "Stencil %s\n", state ? "enabled" : "disabled");
488 R300_STATECHANGE(r300, zs);
490 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
491 R300_RB3D_STENCIL_ENABLE;
493 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
494 ~R300_RB3D_STENCIL_ENABLE;
497 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
502 r300UpdateCulling(ctx);
504 case GL_VERTEX_PROGRAM_ARB:
505 //TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, state);
509 radeonEnable(ctx, cap, state);
516 * Change the culling mode.
518 * \note Mesa already filters redundant calls to this function.
520 static void r300CullFace(GLcontext* ctx, GLenum mode)
524 r300UpdateCulling(ctx);
529 * Change the polygon orientation.
531 * \note Mesa already filters redundant calls to this function.
533 static void r300FrontFace(GLcontext* ctx, GLenum mode)
537 r300UpdateCulling(ctx);
542 * Change the depth testing function.
544 * \note Mesa already filters redundant calls to this function.
546 static void r300DepthFunc(GLcontext* ctx, GLenum func)
548 r300ContextPtr r300 = R300_CONTEXT(ctx);
550 R300_STATECHANGE(r300, zs);
552 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
556 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NEVER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
559 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LESS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
562 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_EQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
565 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
568 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GREATER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
571 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NOTEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
574 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
577 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
585 * Enable/Disable depth writing.
587 * \note Mesa already filters redundant calls to this function.
589 static void r300DepthMask(GLcontext* ctx, GLboolean mask)
591 r300ContextPtr r300 = R300_CONTEXT(ctx);
593 if (!ctx->Depth.Test)
596 R300_STATECHANGE(r300, zs);
597 r300->hw.zs.cmd[R300_ZS_CNTL_0] = mask
598 ? R300_RB3D_Z_TEST_AND_WRITE : R300_RB3D_Z_TEST;
603 * Handle glColorMask()
605 static void r300ColorMask(GLcontext* ctx,
606 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
608 r300ContextPtr r300 = R300_CONTEXT(ctx);
609 int mask = (b << 0) | (g << 1) | (r << 2) | (a << 3);
611 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
612 R300_STATECHANGE(r300, cmk);
613 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
617 /* =============================================================
620 static void r300PointSize(GLcontext * ctx, GLfloat size)
622 r300ContextPtr r300 = R300_CONTEXT(ctx);
624 /* This might need fixing later */
625 R300_STATECHANGE(r300, vps);
626 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
628 /* =============================================================
632 static int translate_stencil_func(int func)
636 return R300_ZS_NEVER;
642 return R300_ZS_EQUAL;
645 return R300_ZS_LEQUAL;
648 return R300_ZS_GREATER;
651 return R300_ZS_NOTEQUAL;
654 return R300_ZS_GEQUAL;
657 return R300_ZS_ALWAYS;
663 static int translate_stencil_op(int op)
671 return R300_ZS_REPLACE;
676 case GL_INCR_WRAP_EXT:
677 return R300_ZS_INCR_WRAP;
678 case GL_DECR_WRAP_EXT:
679 return R300_ZS_DECR_WRAP;
681 return R300_ZS_INVERT;
685 static void r300StencilFunc(GLcontext * ctx, GLenum func,
686 GLint ref, GLuint mask)
688 r300ContextPtr rmesa = R300_CONTEXT(ctx);
689 GLuint refmask = ((ctx->Stencil.Ref[0] << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
691 ValueMask[0] << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
694 R200_STATECHANGE(rmesa, zs);
696 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(
697 (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
698 | (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT));
699 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~((R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
700 (R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
702 flag = translate_stencil_func(ctx->Stencil.Function[0]);
704 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
705 | (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT);
706 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
709 static void r300StencilMask(GLcontext * ctx, GLuint mask)
711 r300ContextPtr rmesa = R300_CONTEXT(ctx);
713 R200_STATECHANGE(rmesa, zs);
714 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~(R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT);
715 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= ctx->Stencil.WriteMask[0] << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
719 static void r300StencilOp(GLcontext * ctx, GLenum fail,
720 GLenum zfail, GLenum zpass)
722 r300ContextPtr rmesa = R300_CONTEXT(ctx);
724 R200_STATECHANGE(rmesa, zs);
725 /* It is easier to mask what's left.. */
726 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= (R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
728 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
729 (translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT)
730 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT)
731 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT)
732 |(translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT)
733 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT)
734 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT);
738 static void r300ClearStencil(GLcontext * ctx, GLint s)
740 r300ContextPtr rmesa = R300_CONTEXT(ctx);
742 /* Not sure whether this is correct.. */
743 R200_STATECHANGE(rmesa, zs);
744 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] =
745 ((GLuint) ctx->Stencil.Clear |
746 (0xff << R200_STENCIL_MASK_SHIFT) |
747 (ctx->Stencil.WriteMask[0] << R200_STENCIL_WRITEMASK_SHIFT));
750 /* =============================================================
751 * Window position and viewport transformation
755 * To correctly position primitives:
757 #define SUBPIXEL_X 0.125
758 #define SUBPIXEL_Y 0.125
760 void r300UpdateWindow(GLcontext * ctx)
762 r300ContextPtr rmesa = R300_CONTEXT(ctx);
763 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
764 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
765 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
766 const GLfloat *v = ctx->Viewport._WindowMap.m;
768 GLfloat sx = v[MAT_SX];
769 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
770 GLfloat sy = -v[MAT_SY];
771 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
772 GLfloat sz = v[MAT_SZ] * rmesa->state.depth.scale;
773 GLfloat tz = v[MAT_TZ] * rmesa->state.depth.scale;
775 R300_FIREVERTICES(rmesa);
776 R300_STATECHANGE(rmesa, vpt);
778 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
779 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
780 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
781 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
782 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
783 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
786 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
787 GLsizei width, GLsizei height)
789 /* Don't pipeline viewport changes, conflict with window offset
790 * setting below. Could apply deltas to rescue pipelined viewport
791 * values, or keep the originals hanging around.
793 R200_FIREVERTICES(R200_CONTEXT(ctx));
794 r300UpdateWindow(ctx);
797 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
799 r300UpdateWindow(ctx);
802 /* Routing and texture-related */
804 void r300_setup_routing(GLcontext *ctx, GLboolean immediate)
806 int i, count=0,reg=0;
808 TNLcontext *tnl = TNL_CONTEXT(ctx);
809 struct vertex_buffer *VB = &tnl->vb;
810 r300ContextPtr r300 = R300_CONTEXT(ctx);
813 /* Stage 1 - input to VAP */
815 /* Assign register number automatically, retaining it in rmesa->state.reg */
817 /* Note: immediate vertex data includes all coordinates.
818 To save bandwidth use either VBUF or state-based vertex generation */
820 #define CONFIGURE_AOS(v, o, r, f) \
822 if (RADEON_DEBUG & DEBUG_STATE)fprintf(stderr, "Enabling "#r "\n"); \
824 r300->state.aos[count].element_size=4; \
825 r300->state.aos[count].stride=4; \
826 r300->state.aos[count].ncomponents=4; \
828 r300->state.aos[count].element_size=v->size; \
829 r300->state.aos[count].stride=v->size; \
830 r300->state.aos[count].ncomponents=v->size; \
832 r300->state.aos[count].offset=o; \
833 r300->state.aos[count].reg=reg; \
834 r300->state.aos[count].format=(f); \
835 r300->state.vap_reg.r=reg; \
840 /* All offsets are 0 - for use by immediate mode.
841 Should change later to handle vertex buffers */
842 if(tnl->render_inputs & _TNL_BIT_POS)
843 CONFIGURE_AOS(VB->ObjPtr, 0, i_coords, AOS_FORMAT_FLOAT);
844 if(tnl->render_inputs & _TNL_BIT_NORMAL)
845 CONFIGURE_AOS(VB->NormalPtr, 0, i_normal, AOS_FORMAT_FLOAT);
847 if(tnl->render_inputs & _TNL_BIT_COLOR0)
848 CONFIGURE_AOS(VB->ColorPtr[0], 0, i_color[0], AOS_FORMAT_FLOAT_COLOR);
849 if(tnl->render_inputs & _TNL_BIT_COLOR1)
850 CONFIGURE_AOS(VB->SecondaryColorPtr[0], 0, i_color[1], AOS_FORMAT_FLOAT_COLOR);
852 if(tnl->render_inputs & _TNL_BIT_FOG)
853 CONFIGURE_AOS(VB->FogCoordPtr, 0, i_fog, AOS_FORMAT_FLOAT);
855 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
856 if(tnl->render_inputs & (_TNL_BIT_TEX0<<i))
857 CONFIGURE_AOS(VB->TexCoordPtr[i], 0, i_tex[i], AOS_FORMAT_FLOAT);
859 if(tnl->render_inputs & _TNL_BIT_INDEX)
860 CONFIGURE_AOS(VB->IndexPtr[0], 0, i_index, AOS_FORMAT_FLOAT);
861 if(tnl->render_inputs & _TNL_BIT_POINTSIZE)
862 CONFIGURE_AOS(VB->PointSizePtr, 0, i_pointsize, AOS_FORMAT_FLOAT);
864 r300->state.aos_count=count;
866 if (RADEON_DEBUG & DEBUG_STATE)
867 fprintf(stderr, "aos_count=%d\n", count);
869 if(count>R300_MAX_AOS_ARRAYS){
870 fprintf(stderr, "Aieee ! AOS array count exceeded !\n");
876 /* setup INPUT_ROUTE */
877 R300_STATECHANGE(r300, vir[0]);
878 for(i=0;i+1<count;i+=2){
879 dw=(r300->state.aos[i].ncomponents-1)
880 | ((r300->state.aos[i].reg)<<8)
881 | (r300->state.aos[i].format<<14)
882 | (((r300->state.aos[i+1].ncomponents-1)
883 | ((r300->state.aos[i+1].reg)<<8)
884 | (r300->state.aos[i+1].format<<14))<<16);
889 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
892 dw=(r300->state.aos[count-1].ncomponents-1)
893 | (r300->state.aos[count-1].format<<14)
894 | ((r300->state.aos[count-1].reg)<<8)
896 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
897 //fprintf(stderr, "vir0 dw=%08x\n", dw);
899 /* Set the rest of INPUT_ROUTE_0 to 0 */
900 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[0].cmd[R300_VIR_CNTL_0+i]=(0x0);
901 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = (count+1)>>1;
904 /* Mesa assumes that all missing components are from (0, 0, 0, 1) */
905 #define ALL_COMPONENTS ((R300_INPUT_ROUTE_SELECT_X<<R300_INPUT_ROUTE_X_SHIFT) \
906 | (R300_INPUT_ROUTE_SELECT_Y<<R300_INPUT_ROUTE_Y_SHIFT) \
907 | (R300_INPUT_ROUTE_SELECT_Z<<R300_INPUT_ROUTE_Z_SHIFT) \
908 | (R300_INPUT_ROUTE_SELECT_W<<R300_INPUT_ROUTE_W_SHIFT))
910 #define ALL_DEFAULT ((R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_X_SHIFT) \
911 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Y_SHIFT) \
912 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Z_SHIFT) \
913 | (R300_INPUT_ROUTE_SELECT_ONE<<R300_INPUT_ROUTE_W_SHIFT))
915 R300_STATECHANGE(r300, vir[1]);
917 for(i=0;i+1<count;i+=2){
919 mask=(1<<(r300->state.aos[i].ncomponents*3))-1;
920 dw=(ALL_COMPONENTS & mask)
921 | (ALL_DEFAULT & ~mask)
922 | R300_INPUT_ROUTE_ENABLE;
925 mask=(1<<(r300->state.aos[i+1].ncomponents*3))-1;
927 (ALL_COMPONENTS & mask)
928 | (ALL_DEFAULT & ~mask)
929 | R300_INPUT_ROUTE_ENABLE
932 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
935 mask=(1<<(r300->state.aos[count-1].ncomponents*3))-1;
936 dw=(ALL_COMPONENTS & mask)
937 | (ALL_DEFAULT & ~mask)
938 | R300_INPUT_ROUTE_ENABLE;
939 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
940 //fprintf(stderr, "vir1 dw=%08x\n", dw);
942 /* Set the rest of INPUT_ROUTE_1 to 0 */
943 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[1].cmd[R300_VIR_CNTL_0+i]=0x0;
944 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = (count+1)>>1;
946 /* Set up input_cntl */
948 R300_STATECHANGE(r300, vic);
949 r300->hw.vic.cmd[R300_VIC_CNTL_0]=0x5555; /* Hard coded value, no idea what it means */
951 r300->hw.vic.cmd[R300_VIC_CNTL_1]=R300_INPUT_CNTL_POS
952 | R300_INPUT_CNTL_COLOR;
954 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
955 if(ctx->Texture.Unit[i].Enabled)
956 r300->hw.vic.cmd[R300_VIC_CNTL_1]|=(R300_INPUT_CNTL_TC0<<i);
958 /* Stage 3: VAP output */
959 R300_STATECHANGE(r300, vof);
960 r300->hw.vof.cmd[R300_VOF_CNTL_0]=R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
961 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
963 r300->hw.vof.cmd[R300_VOF_CNTL_1]=0;
964 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
965 if(ctx->Texture.Unit[i].Enabled)
966 r300->hw.vof.cmd[R300_VOF_CNTL_1]|=(4<<(3*i));
970 static r300TexObj default_tex_obj={
971 filter:R300_TX_MAG_FILTER_LINEAR | R300_TX_MIN_FILTER_LINEAR,
973 size: (0xff << R300_TX_WIDTHMASK_SHIFT)
974 | (0xff << R300_TX_HEIGHTMASK_SHIFT)
975 | (0x8 << R300_TX_SIZE_SHIFT),
982 /* there is probably a system to these value, but, for now,
983 we just try by hand */
985 static int inline translate_src(int src)
994 case GL_PRIMARY_COLOR:
1011 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1012 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1013 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1014 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1015 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1016 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1017 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1018 * combinations where only one of them is nearest.
1020 static unsigned long gen_fixed_filter(unsigned long f)
1022 unsigned long mag, min, needs_fixing=0;
1025 /* We ignore MIRROR bit so we dont have to do everything twice */
1026 if((f & ((7-1) << R300_TX_WRAP_S_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)){
1029 if((f & ((7-1) << R300_TX_WRAP_T_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)){
1032 if((f & ((7-1) << R300_TX_WRAP_Q_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_Q_SHIFT)){
1039 mag=f & R300_TX_MAG_FILTER_MASK;
1040 min=f & R300_TX_MIN_FILTER_MASK;
1042 /* TODO: Check for anisto filters too */
1043 if((mag != R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST))
1046 /* r300 cant handle these modes hence we force nearest to linear */
1047 if((mag == R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST)){
1048 f &= ~R300_TX_MAG_FILTER_NEAREST;
1049 f |= R300_TX_MAG_FILTER_LINEAR;
1053 if((min == R300_TX_MIN_FILTER_NEAREST) && (mag != R300_TX_MAG_FILTER_NEAREST)){
1054 f &= ~R300_TX_MIN_FILTER_NEAREST;
1055 f |= R300_TX_MIN_FILTER_LINEAR;
1059 /* Both are nearest */
1060 if(needs_fixing & 1){
1061 f &= ~((7-1) << R300_TX_WRAP_S_SHIFT);
1062 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1064 if(needs_fixing & 2){
1065 f &= ~((7-1) << R300_TX_WRAP_T_SHIFT);
1066 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1068 if(needs_fixing & 4){
1069 f &= ~((7-1) << R300_TX_WRAP_Q_SHIFT);
1070 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_Q_SHIFT;
1075 void r300_setup_textures(GLcontext *ctx)
1078 struct r300_tex_obj *t;
1079 r300ContextPtr r300 = R300_CONTEXT(ctx);
1080 int max_texture_unit=-1; /* -1 translates into no setup costs for fields */
1081 struct gl_texture_unit *texUnit;
1083 R300_STATECHANGE(r300, txe);
1084 R300_STATECHANGE(r300, tex.filter);
1085 R300_STATECHANGE(r300, tex.unknown1);
1086 R300_STATECHANGE(r300, tex.size);
1087 R300_STATECHANGE(r300, tex.format);
1088 R300_STATECHANGE(r300, tex.offset);
1089 R300_STATECHANGE(r300, tex.unknown4);
1090 R300_STATECHANGE(r300, tex.unknown5);
1091 //R300_STATECHANGE(r300, tex.border_color);
1093 r300->state.texture.tc_count=0;
1095 r300->hw.txe.cmd[R300_TXE_ENABLE]=0x0;
1097 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1098 if (RADEON_DEBUG & DEBUG_STATE)
1099 fprintf(stderr, "mtu=%d\n", mtu);
1101 if(mtu>R300_MAX_TEXTURE_UNITS){
1102 fprintf(stderr, "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1103 mtu, R300_MAX_TEXTURE_UNITS);
1107 if(ctx->Texture.Unit[i].Enabled){
1108 t=r300->state.texture.unit[i].texobj;
1109 fprintf(stderr, "format=%08x\n", r300->state.texture.unit[i].format);
1110 r300->state.texture.tc_count++;
1112 fprintf(stderr, "Texture unit %d enabled, but corresponding texobj is NULL, using default object.\n", i);
1116 if (RADEON_DEBUG & DEBUG_STATE)
1117 fprintf(stderr, "Activating texture unit %d\n", i);
1119 r300->hw.txe.cmd[R300_TXE_ENABLE]|=(1<<i);
1121 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0+i]=gen_fixed_filter(t->filter);
1122 /* No idea why linear filtered textures shake when puting random data */
1123 /*r300->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+i]=(rand()%0xffffffff) & (~0x1fff);*/
1124 r300->hw.tex.size.cmd[R300_TEX_VALUE_0+i]=t->size;
1125 r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=t->format;
1126 //fprintf(stderr, "t->format=%08x\n", t->format);
1127 r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=r300->radeon.radeonScreen->fbLocation+t->offset;
1128 r300->hw.tex.unknown4.cmd[R300_TEX_VALUE_0+i]=0x0;
1129 r300->hw.tex.unknown5.cmd[R300_TEX_VALUE_0+i]=0x0;
1130 //r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
1134 ((drm_r300_cmd_header_t*)r300->hw.tex.filter.cmd)->unchecked_state.count = max_texture_unit+1;
1135 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown1.cmd)->unchecked_state.count = max_texture_unit+1;
1136 ((drm_r300_cmd_header_t*)r300->hw.tex.size.cmd)->unchecked_state.count = max_texture_unit+1;
1137 ((drm_r300_cmd_header_t*)r300->hw.tex.format.cmd)->unchecked_state.count = max_texture_unit+1;
1138 ((drm_r300_cmd_header_t*)r300->hw.tex.offset.cmd)->unchecked_state.count = max_texture_unit+1;
1139 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown4.cmd)->unchecked_state.count = max_texture_unit+1;
1140 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown5.cmd)->unchecked_state.count = max_texture_unit+1;
1141 //((drm_r300_cmd_header_t*)r300->hw.tex.border_color.cmd)->unchecked_state.count = max_texture_unit+1;
1143 if (RADEON_DEBUG & DEBUG_STATE)
1144 fprintf(stderr, "TX_ENABLE: %08x max_texture_unit=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], max_texture_unit);
1147 void r300_setup_rs_unit(GLcontext *ctx)
1149 r300ContextPtr r300 = R300_CONTEXT(ctx);
1152 /* This needs to be rewritten - it is a hack at best */
1154 R300_STATECHANGE(r300, ri);
1155 R300_STATECHANGE(r300, rc);
1156 R300_STATECHANGE(r300, rr);
1158 for(i = 1; i <= 8; ++i)
1159 r300->hw.ri.cmd[i] = 0x00d10000;
1160 r300->hw.ri.cmd[R300_RI_INTERP_1] |= R300_RS_INTERP_1_UNKNOWN;
1161 r300->hw.ri.cmd[R300_RI_INTERP_2] |= R300_RS_INTERP_2_UNKNOWN;
1162 r300->hw.ri.cmd[R300_RI_INTERP_3] |= R300_RS_INTERP_3_UNKNOWN;
1165 for(i = 2; i <= 8; ++i)
1166 r300->hw.ri.cmd[i] |= 4;
1169 for(i = 1; i <= 8; ++i)
1170 r300->hw.rr.cmd[i] = 0;
1171 /* textures enabled ? */
1172 if(r300->state.texture.tc_count>0){
1174 /* This code only really works with one set of texture coordinates */
1176 /* The second constant is needed to get glxgears display anything .. */
1177 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7
1178 | R300_RS_CNTL_0_UNKNOWN_18
1179 | (r300->state.texture.tc_count<<R300_RS_CNTL_TC_CNT_SHIFT);
1180 r300->hw.rc.cmd[2] = 0xc0;
1183 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1184 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x24008;
1188 /* The second constant is needed to get glxgears display anything .. */
1189 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7 | R300_RS_CNTL_0_UNKNOWN_18;
1190 r300->hw.rc.cmd[2] = 0;
1192 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1193 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x4000;
1198 #define vpucount(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count)
1200 #define bump_vpu_count(ptr, new_count) do{\
1201 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1202 int _nc=(new_count)/4; \
1203 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1206 void static inline setup_vertex_shader_fragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1210 if(vsf->length==0)return;
1212 if(vsf->length & 0x3){
1213 fprintf(stderr,"VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1217 switch((dest>>8) & 0xf){
1219 R300_STATECHANGE(r300, vpi);
1220 for(i=0;i<vsf->length;i++)
1221 r300->hw.vpi.cmd[R300_VPI_INSTR_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1222 bump_vpu_count(r300->hw.vpi.cmd, vsf->length+4*(dest & 0xff));
1226 R300_STATECHANGE(r300, vpp);
1227 for(i=0;i<vsf->length;i++)
1228 r300->hw.vpp.cmd[R300_VPP_PARAM_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1229 bump_vpu_count(r300->hw.vpp.cmd, vsf->length+4*(dest & 0xff));
1232 R300_STATECHANGE(r300, vps);
1233 for(i=0;i<vsf->length;i++)
1234 r300->hw.vps.cmd[1+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1235 bump_vpu_count(r300->hw.vps.cmd, vsf->length+4*(dest & 0xff));
1238 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1244 void r300SetupVertexShader(r300ContextPtr rmesa)
1246 GLcontext* ctx = rmesa->radeon.glCtx;
1248 /* Reset state, in case we don't use something */
1249 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1250 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1251 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1254 /* This needs to be replaced by vertex shader generation code */
1257 /* textures enabled ? */
1258 if(rmesa->state.texture.tc_count>0){
1259 rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER;
1261 rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER;
1265 rmesa->state.vertex_shader.matrix[0].length=16;
1266 memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
1268 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->state.vertex_shader.program));
1270 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->state.vertex_shader.matrix[0]));
1272 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX1, &(rmesa->state.vertex_shader.matrix[0]));
1273 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX2, &(rmesa->state.vertex_shader.matrix[0]));
1275 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR0, &(rmesa->state.vertex_shader.vector[0]));
1276 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR1, &(rmesa->state.vertex_shader.vector[1]));
1280 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1281 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1284 R300_STATECHANGE(rmesa, pvs);
1285 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(rmesa->state.vertex_shader.program_start << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1286 | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1287 | (rmesa->state.vertex_shader.program_end << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1288 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(rmesa->state.vertex_shader.param_offset << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1289 | (rmesa->state.vertex_shader.param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1290 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(rmesa->state.vertex_shader.unknown_ptr2 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1291 | (rmesa->state.vertex_shader.unknown_ptr3 << 0);
1293 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1294 so I leave it as a reminder */
1296 reg_start(R300_VAP_PVS_WAITIDLE,0);
1301 void r300SetupVertexProgram(r300ContextPtr rmesa)
1303 GLcontext* ctx = rmesa->radeon.glCtx;
1305 /* Reset state, in case we don't use something */
1306 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1307 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1308 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1311 /* This needs to be replaced by vertex shader generation code */
1314 /* textures enabled ? */
1315 if(rmesa->state.texture.tc_count>0){
1316 rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER;
1318 rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER;
1322 rmesa->state.vertex_shader.matrix[0].length=16;
1323 memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
1326 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->current_vp->program));
1328 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->current_vp->params));
1331 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1332 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1335 R300_STATECHANGE(rmesa, pvs);
1336 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1337 | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1338 | (rmesa->current_vp->program.length/4 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1339 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1340 | (rmesa->current_vp->params.length/4 << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1341 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(0/*rmesa->state.vertex_shader.unknown_ptr2*/ << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1342 | (rmesa->current_vp->program.length/4/*rmesa->state.vertex_shader.unknown_ptr3*/ << 0);
1344 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1345 so I leave it as a reminder */
1347 reg_start(R300_VAP_PVS_WAITIDLE,0);
1352 void r300SetupPixelShader(r300ContextPtr rmesa)
1356 /* This needs to be replaced by pixel shader generation code */
1358 /* textures enabled ? */
1359 if(rmesa->state.texture.tc_count>0){
1360 rmesa->state.pixel_shader=SINGLE_TEXTURE_PIXEL_SHADER;
1362 rmesa->state.pixel_shader=FLAT_COLOR_PIXEL_SHADER;
1365 R300_STATECHANGE(rmesa, fpt);
1366 for(i=0;i<rmesa->state.pixel_shader.program.tex.length;i++)
1367 rmesa->hw.fpt.cmd[R300_FPT_INSTR_0+i]=rmesa->state.pixel_shader.program.tex.inst[i];
1368 rmesa->hw.fpt.cmd[R300_FPT_CMD_0]=cmducs(R300_PFS_TEXI_0, rmesa->state.pixel_shader.program.tex.length);
1370 #define OUTPUT_FIELD(st, reg, field) \
1371 R300_STATECHANGE(rmesa, st); \
1372 for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \
1373 rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rmesa->state.pixel_shader.program.alu.inst[i].field;\
1374 rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmducs(reg, rmesa->state.pixel_shader.program.alu.length);
1376 OUTPUT_FIELD(fpi[0], R300_PFS_INSTR0_0, inst0);
1377 OUTPUT_FIELD(fpi[1], R300_PFS_INSTR1_0, inst1);
1378 OUTPUT_FIELD(fpi[2], R300_PFS_INSTR2_0, inst2);
1379 OUTPUT_FIELD(fpi[3], R300_PFS_INSTR3_0, inst3);
1382 R300_STATECHANGE(rmesa, fp);
1384 rmesa->hw.fp.cmd[R300_FP_NODE0+i]=
1385 (rmesa->state.pixel_shader.program.node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT)
1386 | (rmesa->state.pixel_shader.program.node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT)
1387 | (rmesa->state.pixel_shader.program.node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT)
1388 | (rmesa->state.pixel_shader.program.node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT)
1389 | ( (i==3) ? R300_PFS_NODE_LAST_NODE : 0);
1393 rmesa->hw.fp.cmd[R300_FP_CNTL0]=
1394 (rmesa->state.pixel_shader.program.active_nodes-1)
1395 | (rmesa->state.pixel_shader.program.first_node_has_tex<<3);
1397 rmesa->hw.fp.cmd[R300_FP_CNTL1]=rmesa->state.pixel_shader.program.temp_register_count;
1399 rmesa->hw.fp.cmd[R300_FP_CNTL2]=
1400 (rmesa->state.pixel_shader.program.alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT)
1401 | (rmesa->state.pixel_shader.program.alu_end << R300_PFS_CNTL_ALU_END_SHIFT)
1402 | (rmesa->state.pixel_shader.program.tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT)
1403 | (rmesa->state.pixel_shader.program.tex_end << R300_PFS_CNTL_TEX_END_SHIFT);
1405 R300_STATECHANGE(rmesa, fpp);
1406 for(i=0;i<rmesa->state.pixel_shader.param_length;i++){
1407 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+0]=r300PackFloat32(rmesa->state.pixel_shader.param[i].x);
1408 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+1]=r300PackFloat32(rmesa->state.pixel_shader.param[i].y);
1409 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+2]=r300PackFloat32(rmesa->state.pixel_shader.param[i].z);
1410 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+3]=r300PackFloat32(rmesa->state.pixel_shader.param[i].w);
1412 rmesa->hw.fpp.cmd[R300_FPP_CMD_0]=cmducs(R300_PFS_PARAM_0_X, rmesa->state.pixel_shader.param_length);
1417 * Called by Mesa after an internal state update.
1419 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
1421 r300ContextPtr r300 = R300_CONTEXT(ctx);
1423 _swrast_InvalidateState(ctx, new_state);
1424 _swsetup_InvalidateState(ctx, new_state);
1425 _ac_InvalidateState(ctx, new_state);
1426 _tnl_InvalidateState(ctx, new_state);
1427 _ae_invalidate_state(ctx, new_state);
1429 /* Go inefficiency! */
1430 r300ResetHwState(r300);
1435 * Completely recalculates hardware state based on the Mesa state.
1437 void r300ResetHwState(r300ContextPtr r300)
1439 GLcontext* ctx = r300->radeon.glCtx;
1442 if (RADEON_DEBUG & DEBUG_STATE)
1443 fprintf(stderr, "%s\n", __FUNCTION__);
1445 /* This is a place to initialize registers which
1446 have bitfields accessed by different functions
1447 and not all bits are used */
1449 r300->hw.zs.cmd[R300_ZS_CNTL_0] = 0;
1450 r300->hw.zs.cmd[R300_ZS_CNTL_1] = 0;
1451 r300->hw.zs.cmd[R300_ZS_CNTL_2] = 0xffff00;
1454 /* go and compute register values from GL state */
1456 r300UpdateWindow(ctx);
1459 ctx->Color.ColorMask[RCOMP],
1460 ctx->Color.ColorMask[GCOMP],
1461 ctx->Color.ColorMask[BCOMP],
1462 ctx->Color.ColorMask[ACOMP]);
1464 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
1465 r300DepthMask(ctx, ctx->Depth.Mask);
1466 r300DepthFunc(ctx, ctx->Depth.Func);
1468 r300UpdateCulling(ctx);
1470 r300_setup_routing(ctx, GL_TRUE);
1472 r300UpdateTextureState(ctx);
1473 r300_setup_textures(ctx);
1474 r300_setup_rs_unit(ctx);
1476 r300SetupVertexShader(r300);
1477 r300SetupPixelShader(r300);
1479 r300_set_blend_state(ctx);
1480 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
1482 /* Initialize magic registers
1483 TODO : learn what they really do, or get rid of
1484 those we don't have to touch */
1485 r300->hw.unk2080.cmd[1] = 0x0030045A;
1487 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
1488 | R300_VPORT_X_OFFSET_ENA
1489 | R300_VPORT_Y_SCALE_ENA
1490 | R300_VPORT_Y_OFFSET_ENA
1491 | R300_VPORT_Z_SCALE_ENA
1492 | R300_VPORT_Z_OFFSET_ENA
1494 r300->hw.vte.cmd[2] = 0x00000008;
1496 r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
1497 r300->hw.unk2134.cmd[2] = 0x00000000;
1499 r300->hw.unk2140.cmd[1] = 0x00000000;
1501 #if 0 /* Done in setup routing */
1502 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = 1;
1503 r300->hw.vir[0].cmd[1] = 0x21030003;
1505 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = 1;
1506 r300->hw.vir[1].cmd[1] = 0xF688F688;
1508 r300->hw.vic.cmd[R300_VIR_CNTL_0] = 0x00000001;
1509 r300->hw.vic.cmd[R300_VIR_CNTL_1] = 0x00000405;
1512 r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA;
1514 r300->hw.unk221C.cmd[1] = R300_221C_NORMAL;
1516 r300->hw.unk2220.cmd[1] = r300PackFloat32(1.0);
1517 r300->hw.unk2220.cmd[2] = r300PackFloat32(1.0);
1518 r300->hw.unk2220.cmd[3] = r300PackFloat32(1.0);
1519 r300->hw.unk2220.cmd[4] = r300PackFloat32(1.0);
1521 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1522 r300->hw.unk2288.cmd[1] = R300_2288_R300;
1524 r300->hw.unk2288.cmd[1] = R300_2288_RV350;
1527 r300->hw.vof.cmd[R300_VOF_CNTL_0] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
1528 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
1529 r300->hw.vof.cmd[R300_VOF_CNTL_1] = 0; /* no textures */
1532 r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0;
1533 r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0;
1534 r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0;
1537 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
1538 | R300_GB_LINE_STUFF_ENABLE
1539 | R300_GB_TRIANGLE_STUFF_ENABLE;
1541 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
1542 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
1543 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1544 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1545 | R300_GB_TILE_PIPE_COUNT_R300
1546 | R300_GB_TILE_SIZE_16;
1548 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1549 | R300_GB_TILE_PIPE_COUNT_RV300
1550 | R300_GB_TILE_SIZE_16;
1551 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0x00000000;
1552 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = 0x00000000; /* No antialiasing */
1554 //r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;
1556 r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0);
1557 r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0);
1558 r300->hw.unk4200.cmd[3] = r300PackFloat32(1.0);
1559 r300->hw.unk4200.cmd[4] = r300PackFloat32(1.0);
1561 r300->hw.unk4214.cmd[1] = 0x00050005;
1563 r300->hw.ps.cmd[R300_PS_POINTSIZE] = (6 << R300_POINTSIZE_X_SHIFT) |
1564 (6 << R300_POINTSIZE_Y_SHIFT);
1566 r300->hw.unk4230.cmd[1] = 0x01800000;
1567 r300->hw.unk4230.cmd[2] = 0x00020006;
1568 r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0);
1570 r300->hw.unk4260.cmd[1] = 0;
1571 r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0);
1572 r300->hw.unk4260.cmd[3] = r300PackFloat32(1.0);
1574 r300->hw.unk4274.cmd[1] = 0x00000002;
1575 r300->hw.unk4274.cmd[2] = 0x0003AAAA;
1576 r300->hw.unk4274.cmd[3] = 0x00000000;
1577 r300->hw.unk4274.cmd[4] = 0x00000000;
1579 r300->hw.unk4288.cmd[1] = 0x00000000;
1580 r300->hw.unk4288.cmd[2] = 0x00000001;
1581 r300->hw.unk4288.cmd[3] = 0x00000000;
1582 r300->hw.unk4288.cmd[4] = 0x00000000;
1583 r300->hw.unk4288.cmd[5] = 0x00000000;
1585 r300->hw.unk42A0.cmd[1] = 0x00000000;
1587 r300->hw.unk42B4.cmd[1] = 0x00000000;
1589 r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
1590 r300->hw.unk42C0.cmd[2] = 0x00000000;
1593 r300->hw.unk43A4.cmd[1] = 0x0000001C;
1594 r300->hw.unk43A4.cmd[2] = 0x2DA49525;
1596 r300->hw.unk43E8.cmd[1] = 0x00FFFFFF;
1599 r300->hw.fp.cmd[R300_FP_CNTL0] = 0;
1600 r300->hw.fp.cmd[R300_FP_CNTL1] = 0;
1601 r300->hw.fp.cmd[R300_FP_CNTL2] = 0;
1602 r300->hw.fp.cmd[R300_FP_NODE0] = 0;
1603 r300->hw.fp.cmd[R300_FP_NODE1] = 0;
1604 r300->hw.fp.cmd[R300_FP_NODE2] = 0;
1605 r300->hw.fp.cmd[R300_FP_NODE3] = 0;
1608 r300->hw.unk46A4.cmd[1] = 0x00001B01;
1609 r300->hw.unk46A4.cmd[2] = 0x00001B0F;
1610 r300->hw.unk46A4.cmd[3] = 0x00001B0F;
1611 r300->hw.unk46A4.cmd[4] = 0x00001B0F;
1612 r300->hw.unk46A4.cmd[5] = 0x00000001;
1615 for(i = 1; i <= 64; ++i) {
1616 /* create NOP instructions */
1617 r300->hw.fpi[0].cmd[i] = FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO));
1618 r300->hw.fpi[1].cmd[i] = FP_SELC(0,XYZ,NO,FP_TMP(0),0,0);
1619 r300->hw.fpi[2].cmd[i] = FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO));
1620 r300->hw.fpi[3].cmd[i] = FP_SELA(0,W,NO,FP_TMP(0),0,0);
1624 r300->hw.unk4BC0.cmd[1] = 0;
1626 r300->hw.unk4BC8.cmd[1] = 0;
1627 r300->hw.unk4BC8.cmd[2] = 0;
1628 r300->hw.unk4BC8.cmd[3] = 0;
1631 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
1634 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
1635 r300->hw.unk4BD8.cmd[1] = 0;
1637 r300->hw.unk4E00.cmd[1] = 0;
1640 r300->hw.bld.cmd[R300_BLD_CBLEND] = 0;
1641 r300->hw.bld.cmd[R300_BLD_ABLEND] = 0;
1644 r300->hw.unk4E10.cmd[1] = 0;
1645 r300->hw.unk4E10.cmd[2] = 0;
1646 r300->hw.unk4E10.cmd[3] = 0;
1648 r300->hw.cb.cmd[R300_CB_OFFSET] =
1649 r300->radeon.radeonScreen->backOffset +
1650 r300->radeon.radeonScreen->fbLocation;
1651 r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.radeonScreen->backPitch
1652 | R300_COLOR_UNKNOWN_22_23;
1654 r300->hw.unk4E50.cmd[1] = 0;
1655 r300->hw.unk4E50.cmd[2] = 0;
1656 r300->hw.unk4E50.cmd[3] = 0;
1657 r300->hw.unk4E50.cmd[4] = 0;
1658 r300->hw.unk4E50.cmd[5] = 0;
1659 r300->hw.unk4E50.cmd[6] = 0;
1660 r300->hw.unk4E50.cmd[7] = 0;
1661 r300->hw.unk4E50.cmd[8] = 0;
1662 r300->hw.unk4E50.cmd[9] = 0;
1664 r300->hw.unk4E88.cmd[1] = 0;
1666 r300->hw.unk4EA0.cmd[1] = 0x00000000;
1667 r300->hw.unk4EA0.cmd[2] = 0xffffffff;
1669 r300->hw.unk4F10.cmd[1] = 0x00000002; // depthbuffer format?
1670 r300->hw.unk4F10.cmd[2] = 0x00000000;
1671 r300->hw.unk4F10.cmd[3] = 0x00000003;
1672 r300->hw.unk4F10.cmd[4] = 0x00000000;
1674 /* experiment a bit */
1675 r300->hw.unk4F10.cmd[2] = 0x00000001; // depthbuffer format?
1677 r300->hw.zb.cmd[R300_ZB_OFFSET] =
1678 r300->radeon.radeonScreen->depthOffset +
1679 r300->radeon.radeonScreen->fbLocation;
1680 r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
1682 r300->hw.unk4F28.cmd[1] = 0;
1684 r300->hw.unk4F30.cmd[1] = 0;
1685 r300->hw.unk4F30.cmd[2] = 0;
1687 r300->hw.unk4F44.cmd[1] = 0;
1689 r300->hw.unk4F54.cmd[1] = 0;
1692 ((drm_r300_cmd_header_t*)r300->hw.vpi.cmd)->vpu.count = 0;
1693 for(i = 1; i < R300_VPI_CMDSIZE; i += 4) {
1695 r300->hw.vpi.cmd[i+0] = VP_OUT(ADD,TMP,0,XYZW);
1696 r300->hw.vpi.cmd[i+1] = VP_IN(TMP,0);
1697 r300->hw.vpi.cmd[i+2] = VP_ZERO();
1698 r300->hw.vpi.cmd[i+3] = VP_ZERO();
1701 ((drm_r300_cmd_header_t*)r300->hw.vpp.cmd)->vpu.count = 0;
1702 for(i = 1; i < R300_VPP_CMDSIZE; ++i)
1703 r300->hw.vpp.cmd[i] = 0;
1706 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
1707 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
1708 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
1709 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
1713 r300->hw.all_dirty = GL_TRUE;
1719 * Calculate initial hardware state and register state functions.
1720 * Assumes that the command buffer and state atoms have been
1721 * initialized already.
1723 void r300InitState(r300ContextPtr r300)
1725 GLcontext *ctx = r300->radeon.glCtx;
1728 radeonInitState(&r300->radeon);
1730 switch (ctx->Visual.depthBits) {
1732 r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
1733 depth_fmt = R200_DEPTH_FORMAT_16BIT_INT_Z;
1734 //r300->state.stencil.clear = 0x00000000;
1737 r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
1738 depth_fmt = R200_DEPTH_FORMAT_24BIT_INT_Z;
1739 //r300->state.stencil.clear = 0xff000000;
1742 fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
1743 ctx->Visual.depthBits);
1747 /* Only have hw stencil when depth buffer is 24 bits deep */
1748 r300->state.hw_stencil = (ctx->Visual.stencilBits > 0 &&
1749 ctx->Visual.depthBits == 24);
1751 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
1753 r300ResetHwState(r300);
1759 * Initialize driver's state callback functions
1761 void r300InitStateFuncs(struct dd_function_table* functions)
1763 radeonInitStateFuncs(functions);
1765 functions->UpdateState = r300InvalidateState;
1766 functions->AlphaFunc = r300AlphaFunc;
1767 functions->BlendColor = r300BlendColor;
1768 functions->BlendEquationSeparate = r300BlendEquationSeparate;
1769 functions->BlendFuncSeparate = r300BlendFuncSeparate;
1770 functions->Enable = r300Enable;
1771 functions->ColorMask = r300ColorMask;
1772 functions->DepthFunc = r300DepthFunc;
1773 functions->DepthMask = r300DepthMask;
1774 functions->CullFace = r300CullFace;
1775 functions->FrontFace = r300FrontFace;
1777 /* Stencil related */
1778 functions->ClearStencil = r300ClearStencil;
1779 functions->StencilFunc = r300StencilFunc;
1780 functions->StencilMask = r300StencilMask;
1781 functions->StencilOp = r300StencilOp;
1783 /* Viewport related */
1784 functions->Viewport = r300Viewport;
1785 functions->DepthRange = r300DepthRange;
1786 functions->PointSize = r300PointSize;