2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
34 * Nicolai Haehnle <prefect_@gmx.net>
44 #include "simple_list.h"
46 #include "api_arrayelt.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
51 #include "texformat.h"
53 #include "radeon_ioctl.h"
54 #include "radeon_state.h"
55 #include "r300_context.h"
56 #include "r300_ioctl.h"
57 #include "r300_state.h"
59 #include "r300_program.h"
60 #include "r300_emit.h"
61 #include "r300_fixed_pipelines.h"
63 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
65 r300ContextPtr rmesa = R300_CONTEXT(ctx);
66 int pp_misc = rmesa->hw.at.cmd[R300_AT_ALPHA_TEST];
69 CLAMPED_FLOAT_TO_UBYTE(refByte, ref);
71 R300_STATECHANGE(rmesa, at);
73 pp_misc &= ~(R300_ALPHA_TEST_OP_MASK | R300_REF_ALPHA_MASK);
74 pp_misc |= (refByte & R300_REF_ALPHA_MASK);
78 pp_misc |= R300_ALPHA_TEST_FAIL;
81 pp_misc |= R300_ALPHA_TEST_LESS;
84 pp_misc |= R300_ALPHA_TEST_EQUAL;
87 pp_misc |= R300_ALPHA_TEST_LEQUAL;
90 pp_misc |= R300_ALPHA_TEST_GREATER;
93 pp_misc |= R300_ALPHA_TEST_NEQUAL;
96 pp_misc |= R300_ALPHA_TEST_GEQUAL;
99 pp_misc |= R300_ALPHA_TEST_PASS;
103 rmesa->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
106 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
109 r300ContextPtr rmesa = R300_CONTEXT(ctx);
110 fprintf(stderr, "%s:%s is not implemented yet. Fixme !\n", __FILE__, __FUNCTION__);
112 R200_STATECHANGE(rmesa, ctx);
113 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
114 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
115 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
116 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
117 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor)
118 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] =
119 radeonPackColor(4, color[0], color[1], color[2], color[3]);
124 * Calculate the hardware blend factor setting. This same function is used
125 * for source and destination of both alpha and RGB.
128 * The hardware register value for the specified blend factor. This value
129 * will need to be shifted into the correct position for either source or
130 * destination factor.
133 * Since the two cases where source and destination are handled differently
134 * are essentially error cases, they should never happen. Determine if these
135 * cases can be removed.
137 static int blend_factor(GLenum factor, GLboolean is_src)
143 func = R200_BLEND_GL_ZERO;
146 func = R200_BLEND_GL_ONE;
149 func = R200_BLEND_GL_DST_COLOR;
151 case GL_ONE_MINUS_DST_COLOR:
152 func = R200_BLEND_GL_ONE_MINUS_DST_COLOR;
155 func = R200_BLEND_GL_SRC_COLOR;
157 case GL_ONE_MINUS_SRC_COLOR:
158 func = R200_BLEND_GL_ONE_MINUS_SRC_COLOR;
161 func = R200_BLEND_GL_SRC_ALPHA;
163 case GL_ONE_MINUS_SRC_ALPHA:
164 func = R200_BLEND_GL_ONE_MINUS_SRC_ALPHA;
167 func = R200_BLEND_GL_DST_ALPHA;
169 case GL_ONE_MINUS_DST_ALPHA:
170 func = R200_BLEND_GL_ONE_MINUS_DST_ALPHA;
172 case GL_SRC_ALPHA_SATURATE:
174 (is_src) ? R200_BLEND_GL_SRC_ALPHA_SATURATE :
177 case GL_CONSTANT_COLOR:
178 func = R200_BLEND_GL_CONST_COLOR;
180 case GL_ONE_MINUS_CONSTANT_COLOR:
181 func = R200_BLEND_GL_ONE_MINUS_CONST_COLOR;
183 case GL_CONSTANT_ALPHA:
184 func = R200_BLEND_GL_CONST_ALPHA;
186 case GL_ONE_MINUS_CONSTANT_ALPHA:
187 func = R200_BLEND_GL_ONE_MINUS_CONST_ALPHA;
190 func = (is_src) ? R200_BLEND_GL_ONE : R200_BLEND_GL_ZERO;
196 * Sets both the blend equation and the blend function.
197 * This is done in a single
198 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
199 * change the interpretation of the blend function.
200 * Also, make sure that blend function and blend equation are set to their default
201 * value if color blending is not enabled, since at least blend equations GL_MIN
202 * and GL_FUNC_REVERSE_SUBTRACT will cause wrong results otherwise for
206 /* helper function */
207 static void r300_set_blend_cntl(r300ContextPtr rmesa, int func, int eqn, int cbits, int funcA, int eqnA)
209 GLuint new_ablend, new_cblend;
211 new_ablend = eqnA | funcA;
212 new_cblend = eqn | func | cbits;
213 if(rmesa->hw.bld.cmd[R300_BLD_ABLEND] == rmesa->hw.bld.cmd[R300_BLD_CBLEND]){
214 new_cblend |= R300_BLEND_NO_SEPARATE;
216 if((new_ablend != rmesa->hw.bld.cmd[R300_BLD_ABLEND])
217 || (new_cblend != rmesa->hw.bld.cmd[R300_BLD_CBLEND])){
218 R300_STATECHANGE(rmesa, bld);
219 rmesa->hw.bld.cmd[R300_BLD_ABLEND]=new_ablend;
220 rmesa->hw.bld.cmd[R300_BLD_CBLEND]=new_cblend;
224 static void r300_set_blend_state(GLcontext * ctx)
226 r300ContextPtr rmesa = R300_CONTEXT(ctx);
228 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
229 ~(R300_ROP_ENABLE | R300_ALPHA_BLEND_ENABLE |
230 R300_SEPARATE_ALPHA_ENABLE);
233 int func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
234 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
235 int eqn = R200_COMB_FCN_ADD_CLAMP;
236 int funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
237 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
238 int eqnA = R200_COMB_FCN_ADD_CLAMP;
241 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
242 if (ctx->Color._LogicOpEnabled) {
244 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
245 cntl | R300_ROP_ENABLE;
247 r300_set_blend_cntl(rmesa,
251 } else if (ctx->Color.BlendEnabled) {
253 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
254 cntl | R300_ALPHA_BLEND_ENABLE |
255 R300_SEPARATE_ALPHA_ENABLE;
259 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
261 r300_set_blend_cntl(rmesa,
267 if (ctx->Color._LogicOpEnabled) {
269 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
270 cntl | R300_ROP_ENABLE;
271 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
274 } else if (ctx->Color.BlendEnabled) {
276 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
277 cntl | R300_ALPHA_BLEND_ENABLE;
281 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
282 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
284 r300_set_blend_cntl(rmesa,
292 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
293 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
295 R200_DST_BLEND_SHIFT);
297 switch (ctx->Color.BlendEquationRGB) {
299 eqn = R300_COMB_FCN_ADD_CLAMP;
302 case GL_FUNC_SUBTRACT:
303 eqn = R300_COMB_FCN_SUB_CLAMP;
306 case GL_FUNC_REVERSE_SUBTRACT:
307 eqn = R200_COMB_FCN_RSUB_CLAMP;
311 eqn = R200_COMB_FCN_MIN;
312 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
313 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
317 eqn = R200_COMB_FCN_MAX;
318 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
319 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
324 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
325 __func__, __LINE__, ctx->Color.BlendEquationRGB);
329 if (!rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
331 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
337 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
338 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
340 R200_DST_BLEND_SHIFT);
342 switch (ctx->Color.BlendEquationA) {
344 eqnA = R300_COMB_FCN_ADD_CLAMP;
347 case GL_FUNC_SUBTRACT:
348 eqnA = R300_COMB_FCN_SUB_CLAMP;
351 case GL_FUNC_REVERSE_SUBTRACT:
352 eqnA = R200_COMB_FCN_RSUB_CLAMP;
356 eqnA = R200_COMB_FCN_MIN;
357 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
358 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
362 eqnA = R200_COMB_FCN_MAX;
363 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
364 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
368 fprintf(stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n",
369 __func__, __LINE__, ctx->Color.BlendEquationA);
373 r300_set_blend_cntl(rmesa,
374 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
376 r300_set_blend_cntl(rmesa,
377 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
381 static void r300BlendEquationSeparate(GLcontext * ctx,
382 GLenum modeRGB, GLenum modeA)
384 r300_set_blend_state(ctx);
387 static void r300BlendFuncSeparate(GLcontext * ctx,
388 GLenum sfactorRGB, GLenum dfactorRGB,
389 GLenum sfactorA, GLenum dfactorA)
391 r300_set_blend_state(ctx);
395 * Update our tracked culling state based on Mesa's state.
397 static void r300UpdateCulling(GLcontext* ctx)
399 r300ContextPtr r300 = R300_CONTEXT(ctx);
402 R300_STATECHANGE(r300, cul);
403 if (ctx->Polygon.CullFlag) {
404 if (ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK)
405 val = R300_CULL_FRONT|R300_CULL_BACK;
406 else if (ctx->Polygon.CullFaceMode == GL_FRONT)
407 val = R300_CULL_FRONT;
409 val = R300_CULL_BACK;
411 if (ctx->Polygon.FrontFace == GL_CW)
412 val |= R300_FRONT_FACE_CW;
414 val |= R300_FRONT_FACE_CCW;
417 r300->hw.cul.cmd[R300_CUL_CULL] = val;
422 * Handle glEnable()/glDisable().
424 * \note Mesa already filters redundant calls to glEnable/glDisable.
426 static void r300Enable(GLcontext* ctx, GLenum cap, GLboolean state)
428 r300ContextPtr r300 = R300_CONTEXT(ctx);
431 if (RADEON_DEBUG & DEBUG_STATE)
432 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
433 _mesa_lookup_enum_by_nr(cap),
434 state ? "GL_TRUE" : "GL_FALSE");
437 /* Fast track this one...
445 R200_STATECHANGE(r300, at);
447 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
448 R300_ALPHA_TEST_ENABLE;
450 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
451 ~R300_ALPHA_TEST_ENABLE;
456 case GL_COLOR_LOGIC_OP:
457 r300_set_blend_state(ctx);
461 R300_STATECHANGE(r300, zs);
465 newval = R300_RB3D_Z_TEST_AND_WRITE;
467 newval = R300_RB3D_Z_TEST;
471 r300->hw.zs.cmd[R300_ZS_CNTL_0] = newval;
474 case GL_STENCIL_TEST:
477 static int stencil=1;
479 fprintf(stderr, "%s:%s - do not know how to enable stencil. Help me !\n",
480 __FILE__, __FUNCTION__);
485 if (r300->state.hw_stencil) {
486 //fprintf(stderr, "Stencil %s\n", state ? "enabled" : "disabled");
487 R300_STATECHANGE(r300, zs);
489 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
490 R300_RB3D_STENCIL_ENABLE;
492 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
493 ~R300_RB3D_STENCIL_ENABLE;
496 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
501 r300UpdateCulling(ctx);
505 radeonEnable(ctx, cap, state);
512 * Change the culling mode.
514 * \note Mesa already filters redundant calls to this function.
516 static void r300CullFace(GLcontext* ctx, GLenum mode)
520 r300UpdateCulling(ctx);
525 * Change the polygon orientation.
527 * \note Mesa already filters redundant calls to this function.
529 static void r300FrontFace(GLcontext* ctx, GLenum mode)
533 r300UpdateCulling(ctx);
538 * Change the depth testing function.
540 * \note Mesa already filters redundant calls to this function.
542 static void r300DepthFunc(GLcontext* ctx, GLenum func)
544 r300ContextPtr r300 = R300_CONTEXT(ctx);
546 R300_STATECHANGE(r300, zs);
548 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
552 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NEVER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
555 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LESS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
558 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_EQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
561 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
564 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GREATER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
567 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NOTEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
570 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
573 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
581 * Enable/Disable depth writing.
583 * \note Mesa already filters redundant calls to this function.
585 static void r300DepthMask(GLcontext* ctx, GLboolean mask)
587 r300ContextPtr r300 = R300_CONTEXT(ctx);
589 if (!ctx->Depth.Test)
592 R300_STATECHANGE(r300, zs);
593 r300->hw.zs.cmd[R300_ZS_CNTL_0] = mask
594 ? R300_RB3D_Z_TEST_AND_WRITE : R300_RB3D_Z_TEST;
599 * Handle glColorMask()
601 static void r300ColorMask(GLcontext* ctx,
602 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
604 r300ContextPtr r300 = R300_CONTEXT(ctx);
605 int mask = (b << 0) | (g << 1) | (r << 2) | (a << 3);
607 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
608 R300_STATECHANGE(r300, cmk);
609 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
613 /* =============================================================
616 static void r300PointSize(GLcontext * ctx, GLfloat size)
618 r300ContextPtr r300 = R300_CONTEXT(ctx);
620 /* This might need fixing later */
621 R300_STATECHANGE(r300, vps);
622 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
624 /* =============================================================
628 static int translate_stencil_func(int func)
632 return R300_ZS_NEVER;
638 return R300_ZS_EQUAL;
641 return R300_ZS_LEQUAL;
644 return R300_ZS_GREATER;
647 return R300_ZS_NOTEQUAL;
650 return R300_ZS_GEQUAL;
653 return R300_ZS_ALWAYS;
659 static int translate_stencil_op(int op)
667 return R300_ZS_REPLACE;
672 case GL_INCR_WRAP_EXT:
673 return R300_ZS_INCR_WRAP;
674 case GL_DECR_WRAP_EXT:
675 return R300_ZS_DECR_WRAP;
677 return R300_ZS_INVERT;
681 static void r300StencilFunc(GLcontext * ctx, GLenum func,
682 GLint ref, GLuint mask)
684 r300ContextPtr rmesa = R300_CONTEXT(ctx);
685 GLuint refmask = ((ctx->Stencil.Ref[0] << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
687 ValueMask[0] << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
690 R200_STATECHANGE(rmesa, zs);
692 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(
693 (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
694 | (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT));
695 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~((R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
696 (R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
698 flag = translate_stencil_func(ctx->Stencil.Function[0]);
700 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
701 | (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT);
702 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
705 static void r300StencilMask(GLcontext * ctx, GLuint mask)
707 r300ContextPtr rmesa = R300_CONTEXT(ctx);
709 R200_STATECHANGE(rmesa, zs);
710 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~(R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT);
711 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= ctx->Stencil.WriteMask[0] << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
715 static void r300StencilOp(GLcontext * ctx, GLenum fail,
716 GLenum zfail, GLenum zpass)
718 r300ContextPtr rmesa = R300_CONTEXT(ctx);
720 R200_STATECHANGE(rmesa, zs);
721 /* It is easier to mask what's left.. */
722 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= (R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
724 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
725 (translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT)
726 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT)
727 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT)
728 |(translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT)
729 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT)
730 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT);
734 static void r300ClearStencil(GLcontext * ctx, GLint s)
736 r300ContextPtr rmesa = R300_CONTEXT(ctx);
738 /* Not sure whether this is correct.. */
739 R200_STATECHANGE(rmesa, zs);
740 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] =
741 ((GLuint) ctx->Stencil.Clear |
742 (0xff << R200_STENCIL_MASK_SHIFT) |
743 (ctx->Stencil.WriteMask[0] << R200_STENCIL_WRITEMASK_SHIFT));
746 /* =============================================================
747 * Window position and viewport transformation
751 * To correctly position primitives:
753 #define SUBPIXEL_X 0.125
754 #define SUBPIXEL_Y 0.125
756 void r300UpdateWindow(GLcontext * ctx)
758 r300ContextPtr rmesa = R300_CONTEXT(ctx);
759 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
760 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
761 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
762 const GLfloat *v = ctx->Viewport._WindowMap.m;
764 GLfloat sx = v[MAT_SX];
765 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
766 GLfloat sy = -v[MAT_SY];
767 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
768 GLfloat sz = v[MAT_SZ] * rmesa->state.depth.scale;
769 GLfloat tz = v[MAT_TZ] * rmesa->state.depth.scale;
771 R300_FIREVERTICES(rmesa);
772 R300_STATECHANGE(rmesa, vpt);
774 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
775 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
776 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
777 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
778 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
779 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
782 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
783 GLsizei width, GLsizei height)
785 /* Don't pipeline viewport changes, conflict with window offset
786 * setting below. Could apply deltas to rescue pipelined viewport
787 * values, or keep the originals hanging around.
789 R200_FIREVERTICES(R200_CONTEXT(ctx));
790 r300UpdateWindow(ctx);
793 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
795 r300UpdateWindow(ctx);
798 /* Routing and texture-related */
800 void r300_setup_routing(GLcontext *ctx, GLboolean immediate)
802 int i, count=0,reg=0;
804 TNLcontext *tnl = TNL_CONTEXT(ctx);
805 struct vertex_buffer *VB = &tnl->vb;
806 r300ContextPtr r300 = R300_CONTEXT(ctx);
809 /* Stage 1 - input to VAP */
811 /* Assign register number automatically, retaining it in rmesa->state.reg */
813 /* Note: immediate vertex data includes all coordinates.
814 To save bandwidth use either VBUF or state-based vertex generation */
816 #define CONFIGURE_AOS(v, o, r, f) \
818 if (RADEON_DEBUG & DEBUG_STATE)fprintf(stderr, "Enabling "#r "\n"); \
820 r300->state.aos[count].element_size=4; \
821 r300->state.aos[count].stride=4; \
822 r300->state.aos[count].ncomponents=4; \
824 r300->state.aos[count].element_size=v->size; \
825 r300->state.aos[count].stride=v->size; \
826 r300->state.aos[count].ncomponents=v->size; \
828 r300->state.aos[count].offset=o; \
829 r300->state.aos[count].reg=reg; \
830 r300->state.aos[count].format=(f); \
831 r300->state.vap_reg.r=reg; \
836 /* All offsets are 0 - for use by immediate mode.
837 Should change later to handle vertex buffers */
838 if(tnl->render_inputs & _TNL_BIT_POS)
839 CONFIGURE_AOS(VB->ObjPtr, 0, i_coords, AOS_FORMAT_FLOAT);
840 if(tnl->render_inputs & _TNL_BIT_NORMAL)
841 CONFIGURE_AOS(VB->NormalPtr, 0, i_normal, AOS_FORMAT_FLOAT);
843 if(tnl->render_inputs & _TNL_BIT_COLOR0)
844 CONFIGURE_AOS(VB->ColorPtr[0], 0, i_color[0], AOS_FORMAT_FLOAT_COLOR);
845 if(tnl->render_inputs & _TNL_BIT_COLOR1)
846 CONFIGURE_AOS(VB->ColorPtr[1], 0, i_color[1], AOS_FORMAT_FLOAT_COLOR);
848 if(tnl->render_inputs & _TNL_BIT_FOG)
849 CONFIGURE_AOS(VB->FogCoordPtr, 0, i_fog, AOS_FORMAT_FLOAT);
851 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
852 if(tnl->render_inputs & (_TNL_BIT_TEX0<<i))
853 CONFIGURE_AOS(VB->TexCoordPtr[i], 0, i_tex[i], AOS_FORMAT_FLOAT);
855 if(tnl->render_inputs & _TNL_BIT_INDEX)
856 CONFIGURE_AOS(VB->IndexPtr[0], 0, i_index, AOS_FORMAT_FLOAT);
857 if(tnl->render_inputs & _TNL_BIT_POINTSIZE)
858 CONFIGURE_AOS(VB->PointSizePtr, 0, i_pointsize, AOS_FORMAT_FLOAT);
860 r300->state.aos_count=count;
862 if (RADEON_DEBUG & DEBUG_STATE)
863 fprintf(stderr, "aos_count=%d\n", count);
865 if(count>R300_MAX_AOS_ARRAYS){
866 fprintf(stderr, "Aieee ! AOS array count exceeded !\n");
872 /* setup INPUT_ROUTE */
873 R300_STATECHANGE(r300, vir[0]);
874 for(i=0;i+1<count;i+=2){
875 dw=(r300->state.aos[i].ncomponents-1)
876 | ((r300->state.aos[i].reg)<<8)
877 | (r300->state.aos[i].format<<14)
878 | (((r300->state.aos[i+1].ncomponents-1)
879 | ((r300->state.aos[i+1].reg)<<8)
880 | (r300->state.aos[i+1].format<<14))<<16);
885 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
888 dw=(r300->state.aos[count-1].ncomponents-1)
889 | (r300->state.aos[count-1].format<<14)
890 | ((r300->state.aos[count-1].reg)<<8)
892 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
893 //fprintf(stderr, "vir0 dw=%08x\n", dw);
895 /* Set the rest of INPUT_ROUTE_0 to 0 */
896 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[0].cmd[R300_VIR_CNTL_0+i]=(0x0);
897 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = (count+1)>>1;
900 /* Mesa assumes that all missing components are from (0, 0, 0, 1) */
901 #define ALL_COMPONENTS ((R300_INPUT_ROUTE_SELECT_X<<R300_INPUT_ROUTE_X_SHIFT) \
902 | (R300_INPUT_ROUTE_SELECT_Y<<R300_INPUT_ROUTE_Y_SHIFT) \
903 | (R300_INPUT_ROUTE_SELECT_Z<<R300_INPUT_ROUTE_Z_SHIFT) \
904 | (R300_INPUT_ROUTE_SELECT_W<<R300_INPUT_ROUTE_W_SHIFT))
906 #define ALL_DEFAULT ((R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_X_SHIFT) \
907 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Y_SHIFT) \
908 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Z_SHIFT) \
909 | (R300_INPUT_ROUTE_SELECT_ONE<<R300_INPUT_ROUTE_W_SHIFT))
911 R300_STATECHANGE(r300, vir[1]);
913 for(i=0;i+1<count;i+=2){
915 mask=(1<<(r300->state.aos[i].ncomponents*3))-1;
916 dw=(ALL_COMPONENTS & mask)
917 | (ALL_DEFAULT & ~mask)
918 | R300_INPUT_ROUTE_ENABLE;
921 mask=(1<<(r300->state.aos[i+1].ncomponents*3))-1;
923 (ALL_COMPONENTS & mask)
924 | (ALL_DEFAULT & ~mask)
925 | R300_INPUT_ROUTE_ENABLE
928 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
931 mask=(1<<(r300->state.aos[count-1].ncomponents*3))-1;
932 dw=(ALL_COMPONENTS & mask)
933 | (ALL_DEFAULT & ~mask)
934 | R300_INPUT_ROUTE_ENABLE;
935 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
936 //fprintf(stderr, "vir1 dw=%08x\n", dw);
938 /* Set the rest of INPUT_ROUTE_1 to 0 */
939 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[1].cmd[R300_VIR_CNTL_0+i]=0x0;
940 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = (count+1)>>1;
942 /* Set up input_cntl */
944 R300_STATECHANGE(r300, vic);
945 r300->hw.vic.cmd[R300_VIC_CNTL_0]=0x5555; /* Hard coded value, no idea what it means */
947 r300->hw.vic.cmd[R300_VIC_CNTL_1]=R300_INPUT_CNTL_POS
948 | R300_INPUT_CNTL_COLOR;
950 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
951 if(ctx->Texture.Unit[i].Enabled)
952 r300->hw.vic.cmd[R300_VIC_CNTL_1]|=(R300_INPUT_CNTL_TC0<<i);
954 /* Stage 3: VAP output */
955 R300_STATECHANGE(r300, vof);
956 r300->hw.vof.cmd[R300_VOF_CNTL_0]=R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
957 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
959 r300->hw.vof.cmd[R300_VOF_CNTL_1]=0;
960 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
961 if(ctx->Texture.Unit[i].Enabled)
962 r300->hw.vof.cmd[R300_VOF_CNTL_1]|=(4<<(3*i));
966 static r300TexObj default_tex_obj={
967 filter:R300_TX_MAG_FILTER_LINEAR | R300_TX_MIN_FILTER_LINEAR,
969 size: (0xff << R300_TX_WIDTHMASK_SHIFT)
970 | (0xff << R300_TX_HEIGHTMASK_SHIFT)
971 | (0x8 << R300_TX_SIZE_SHIFT),
978 /* there is probably a system to these value, but, for now,
979 we just try by hand */
981 static int inline translate_src(int src)
990 case GL_PRIMARY_COLOR:
1007 void r300_setup_textures(GLcontext *ctx)
1010 struct r300_tex_obj *t;
1011 r300ContextPtr r300 = R300_CONTEXT(ctx);
1012 int max_texture_unit=-1; /* -1 translates into no setup costs for fields */
1013 struct gl_texture_unit *texUnit;
1015 R300_STATECHANGE(r300, txe);
1016 R300_STATECHANGE(r300, tex.filter);
1017 R300_STATECHANGE(r300, tex.unknown1);
1018 R300_STATECHANGE(r300, tex.size);
1019 R300_STATECHANGE(r300, tex.format);
1020 R300_STATECHANGE(r300, tex.offset);
1021 R300_STATECHANGE(r300, tex.unknown4);
1022 R300_STATECHANGE(r300, tex.unknown5);
1023 R300_STATECHANGE(r300, tex.border_color);
1025 r300->state.texture.tc_count=0;
1027 r300->hw.txe.cmd[R300_TXE_ENABLE]=0x0;
1029 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1030 if (RADEON_DEBUG & DEBUG_STATE)
1031 fprintf(stderr, "mtu=%d\n", mtu);
1033 if(mtu>R300_MAX_TEXTURE_UNITS){
1034 fprintf(stderr, "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1035 mtu, R300_MAX_TEXTURE_UNITS);
1039 if(ctx->Texture.Unit[i].Enabled){
1040 t=r300->state.texture.unit[i].texobj;
1041 fprintf(stderr, "format=%08x\n", r300->state.texture.unit[i].format);
1042 r300->state.texture.tc_count++;
1044 fprintf(stderr, "Texture unit %d enabled, but corresponding texobj is NULL, using default object.\n", i);
1048 if (RADEON_DEBUG & DEBUG_STATE)
1049 fprintf(stderr, "Activating texture unit %d\n", i);
1051 r300->hw.txe.cmd[R300_TXE_ENABLE]|=(1<<i);
1053 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0+i]=t->filter;
1055 /* No idea why linear filtered textures shake when puting random data */
1056 /*r300->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+i]=(rand()%0xffffffff) & (~0x1fff);*/
1057 r300->hw.tex.size.cmd[R300_TEX_VALUE_0+i]=t->size;
1058 r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=t->format;
1059 //fprintf(stderr, "t->format=%08x\n", t->format);
1060 r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=r300->radeon.radeonScreen->fbLocation+t->offset;
1061 r300->hw.tex.unknown4.cmd[R300_TEX_VALUE_0+i]=0x0;
1062 r300->hw.tex.unknown5.cmd[R300_TEX_VALUE_0+i]=0x0;
1063 r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
1067 ((drm_r300_cmd_header_t*)r300->hw.tex.filter.cmd)->unchecked_state.count = max_texture_unit+1;
1068 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown1.cmd)->unchecked_state.count = max_texture_unit+1;
1069 ((drm_r300_cmd_header_t*)r300->hw.tex.size.cmd)->unchecked_state.count = max_texture_unit+1;
1070 ((drm_r300_cmd_header_t*)r300->hw.tex.format.cmd)->unchecked_state.count = max_texture_unit+1;
1071 ((drm_r300_cmd_header_t*)r300->hw.tex.offset.cmd)->unchecked_state.count = max_texture_unit+1;
1072 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown4.cmd)->unchecked_state.count = max_texture_unit+1;
1073 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown5.cmd)->unchecked_state.count = max_texture_unit+1;
1074 ((drm_r300_cmd_header_t*)r300->hw.tex.border_color.cmd)->unchecked_state.count = max_texture_unit+1;
1076 if (RADEON_DEBUG & DEBUG_STATE)
1077 fprintf(stderr, "TX_ENABLE: %08x max_texture_unit=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], max_texture_unit);
1080 void r300_setup_rs_unit(GLcontext *ctx)
1082 r300ContextPtr r300 = R300_CONTEXT(ctx);
1085 /* This needs to be rewritten - it is a hack at best */
1087 R300_STATECHANGE(r300, ri);
1088 R300_STATECHANGE(r300, rc);
1089 R300_STATECHANGE(r300, rr);
1091 for(i = 1; i <= 8; ++i)
1092 r300->hw.ri.cmd[i] = 0x00d10000;
1093 r300->hw.ri.cmd[R300_RI_INTERP_1] |= R300_RS_INTERP_1_UNKNOWN;
1094 r300->hw.ri.cmd[R300_RI_INTERP_2] |= R300_RS_INTERP_2_UNKNOWN;
1095 r300->hw.ri.cmd[R300_RI_INTERP_3] |= R300_RS_INTERP_3_UNKNOWN;
1098 for(i = 2; i <= 8; ++i)
1099 r300->hw.ri.cmd[i] |= 4;
1102 for(i = 1; i <= 8; ++i)
1103 r300->hw.rr.cmd[i] = 0;
1104 /* textures enabled ? */
1105 if(r300->state.texture.tc_count>0){
1107 /* This code only really works with one set of texture coordinates */
1109 /* The second constant is needed to get glxgears display anything .. */
1110 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7
1111 | R300_RS_CNTL_0_UNKNOWN_18
1112 | (r300->state.texture.tc_count<<R300_RS_CNTL_TC_CNT_SHIFT);
1113 r300->hw.rc.cmd[2] = 0xc0;
1116 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1117 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x24008;
1121 /* The second constant is needed to get glxgears display anything .. */
1122 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7 | R300_RS_CNTL_0_UNKNOWN_18;
1123 r300->hw.rc.cmd[2] = 0;
1125 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1126 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x4000;
1131 #define vpucount(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count)
1133 #define bump_vpu_count(ptr, new_count) do{\
1134 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1135 int _nc=(new_count)/4; \
1136 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1139 void static inline setup_vertex_shader_fragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1143 if(vsf->length==0)return;
1145 if(vsf->length & 0x3){
1146 fprintf(stderr,"VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1150 switch((dest>>8) & 0xf){
1152 R300_STATECHANGE(r300, vpi);
1153 for(i=0;i<vsf->length;i++)
1154 r300->hw.vpi.cmd[R300_VPI_INSTR_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1155 bump_vpu_count(r300->hw.vpi.cmd, vsf->length+4*(dest & 0xff));
1159 R300_STATECHANGE(r300, vpp);
1160 for(i=0;i<vsf->length;i++)
1161 r300->hw.vpp.cmd[R300_VPP_PARAM_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1162 bump_vpu_count(r300->hw.vpp.cmd, vsf->length+4*(dest & 0xff));
1165 R300_STATECHANGE(r300, vps);
1166 for(i=0;i<vsf->length;i++)
1167 r300->hw.vps.cmd[1+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1168 bump_vpu_count(r300->hw.vps.cmd, vsf->length+4*(dest & 0xff));
1171 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1177 void r300SetupVertexShader(r300ContextPtr rmesa)
1179 GLcontext* ctx = rmesa->radeon.glCtx;
1181 /* Reset state, in case we don't use something */
1182 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1183 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1184 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1187 /* This needs to be replaced by vertex shader generation code */
1190 /* textures enabled ? */
1191 if(rmesa->state.texture.tc_count>0){
1192 rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER;
1194 rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER;
1198 rmesa->state.vertex_shader.matrix[0].length=16;
1199 memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
1201 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->state.vertex_shader.program));
1203 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->state.vertex_shader.matrix[0]));
1205 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX1, &(rmesa->state.vertex_shader.matrix[0]));
1206 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX2, &(rmesa->state.vertex_shader.matrix[0]));
1208 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR0, &(rmesa->state.vertex_shader.vector[0]));
1209 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR1, &(rmesa->state.vertex_shader.vector[1]));
1213 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1214 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1217 R300_STATECHANGE(rmesa, pvs);
1218 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(rmesa->state.vertex_shader.program_start << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1219 | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1220 | (rmesa->state.vertex_shader.program_end << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1221 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(rmesa->state.vertex_shader.param_offset << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1222 | (rmesa->state.vertex_shader.param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1223 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(rmesa->state.vertex_shader.unknown_ptr2 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1224 | (rmesa->state.vertex_shader.unknown_ptr3 << 0);
1226 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1227 so I leave it as a reminder */
1229 reg_start(R300_VAP_PVS_WAITIDLE,0);
1234 void r300SetupPixelShader(r300ContextPtr rmesa)
1238 /* This needs to be replaced by pixel shader generation code */
1240 /* textures enabled ? */
1241 if(rmesa->state.texture.tc_count>0){
1242 rmesa->state.pixel_shader=SINGLE_TEXTURE_PIXEL_SHADER;
1244 rmesa->state.pixel_shader=FLAT_COLOR_PIXEL_SHADER;
1247 R300_STATECHANGE(rmesa, fpt);
1248 for(i=0;i<rmesa->state.pixel_shader.program.tex.length;i++)
1249 rmesa->hw.fpt.cmd[R300_FPT_INSTR_0+i]=rmesa->state.pixel_shader.program.tex.inst[i];
1250 rmesa->hw.fpt.cmd[R300_FPT_CMD_0]=cmducs(R300_PFS_TEXI_0, rmesa->state.pixel_shader.program.tex.length);
1252 #define OUTPUT_FIELD(st, reg, field) \
1253 R300_STATECHANGE(rmesa, st); \
1254 for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \
1255 rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rmesa->state.pixel_shader.program.alu.inst[i].field;\
1256 rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmducs(reg, rmesa->state.pixel_shader.program.alu.length);
1258 OUTPUT_FIELD(fpi[0], R300_PFS_INSTR0_0, inst0);
1259 OUTPUT_FIELD(fpi[1], R300_PFS_INSTR1_0, inst1);
1260 OUTPUT_FIELD(fpi[2], R300_PFS_INSTR2_0, inst2);
1261 OUTPUT_FIELD(fpi[3], R300_PFS_INSTR3_0, inst3);
1264 R300_STATECHANGE(rmesa, fp);
1266 rmesa->hw.fp.cmd[R300_FP_NODE0+i]=
1267 (rmesa->state.pixel_shader.program.node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT)
1268 | (rmesa->state.pixel_shader.program.node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT)
1269 | (rmesa->state.pixel_shader.program.node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT)
1270 | (rmesa->state.pixel_shader.program.node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT)
1271 | ( (i==3) ? R300_PFS_NODE_LAST_NODE : 0);
1275 rmesa->hw.fp.cmd[R300_FP_CNTL0]=
1276 (rmesa->state.pixel_shader.program.active_nodes-1)
1277 | (rmesa->state.pixel_shader.program.first_node_has_tex<<3);
1279 rmesa->hw.fp.cmd[R300_FP_CNTL1]=rmesa->state.pixel_shader.program.temp_register_count;
1281 rmesa->hw.fp.cmd[R300_FP_CNTL2]=
1282 (rmesa->state.pixel_shader.program.alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT)
1283 | (rmesa->state.pixel_shader.program.alu_end << R300_PFS_CNTL_ALU_END_SHIFT)
1284 | (rmesa->state.pixel_shader.program.tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT)
1285 | (rmesa->state.pixel_shader.program.tex_end << R300_PFS_CNTL_TEX_END_SHIFT);
1287 R300_STATECHANGE(rmesa, fpp);
1288 for(i=0;i<rmesa->state.pixel_shader.param_length;i++){
1289 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+0]=r300PackFloat32(rmesa->state.pixel_shader.param[i].x);
1290 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+1]=r300PackFloat32(rmesa->state.pixel_shader.param[i].y);
1291 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+2]=r300PackFloat32(rmesa->state.pixel_shader.param[i].z);
1292 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+3]=r300PackFloat32(rmesa->state.pixel_shader.param[i].w);
1294 rmesa->hw.fpp.cmd[R300_FPP_CMD_0]=cmducs(R300_PFS_PARAM_0_X, rmesa->state.pixel_shader.param_length);
1299 * Called by Mesa after an internal state update.
1301 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
1303 r300ContextPtr r300 = R300_CONTEXT(ctx);
1305 _swrast_InvalidateState(ctx, new_state);
1306 _swsetup_InvalidateState(ctx, new_state);
1307 _ac_InvalidateState(ctx, new_state);
1308 _tnl_InvalidateState(ctx, new_state);
1309 _ae_invalidate_state(ctx, new_state);
1311 /* Go inefficiency! */
1312 r300ResetHwState(r300);
1317 * Completely recalculates hardware state based on the Mesa state.
1319 void r300ResetHwState(r300ContextPtr r300)
1321 GLcontext* ctx = r300->radeon.glCtx;
1324 if (RADEON_DEBUG & DEBUG_STATE)
1325 fprintf(stderr, "%s\n", __FUNCTION__);
1327 /* This is a place to initialize registers which
1328 have bitfields accessed by different functions
1329 and not all bits are used */
1331 r300->hw.zs.cmd[R300_ZS_CNTL_0] = 0;
1332 r300->hw.zs.cmd[R300_ZS_CNTL_1] = 0;
1333 r300->hw.zs.cmd[R300_ZS_CNTL_2] = 0xffff00;
1336 /* go and compute register values from GL state */
1338 r300UpdateWindow(ctx);
1341 ctx->Color.ColorMask[RCOMP],
1342 ctx->Color.ColorMask[GCOMP],
1343 ctx->Color.ColorMask[BCOMP],
1344 ctx->Color.ColorMask[ACOMP]);
1346 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
1347 r300DepthMask(ctx, ctx->Depth.Mask);
1348 r300DepthFunc(ctx, ctx->Depth.Func);
1350 r300UpdateCulling(ctx);
1352 r300_setup_routing(ctx, GL_TRUE);
1354 r300UpdateTextureState(ctx);
1355 r300_setup_textures(ctx);
1356 r300_setup_rs_unit(ctx);
1358 r300SetupVertexShader(r300);
1359 r300SetupPixelShader(r300);
1361 r300_set_blend_state(ctx);
1362 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
1364 /* Initialize magic registers
1365 TODO : learn what they really do, or get rid of
1366 those we don't have to touch */
1367 r300->hw.unk2080.cmd[1] = 0x0030045A;
1369 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
1370 | R300_VPORT_X_OFFSET_ENA
1371 | R300_VPORT_Y_SCALE_ENA
1372 | R300_VPORT_Y_OFFSET_ENA
1373 | R300_VPORT_Z_SCALE_ENA
1374 | R300_VPORT_Z_OFFSET_ENA
1376 r300->hw.vte.cmd[2] = 0x00000008;
1378 r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
1379 r300->hw.unk2134.cmd[2] = 0x00000000;
1381 r300->hw.unk2140.cmd[1] = 0x00000000;
1383 #if 0 /* Done in setup routing */
1384 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = 1;
1385 r300->hw.vir[0].cmd[1] = 0x21030003;
1387 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = 1;
1388 r300->hw.vir[1].cmd[1] = 0xF688F688;
1390 r300->hw.vic.cmd[R300_VIR_CNTL_0] = 0x00000001;
1391 r300->hw.vic.cmd[R300_VIR_CNTL_1] = 0x00000405;
1394 r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA;
1396 r300->hw.unk221C.cmd[1] = R300_221C_NORMAL;
1398 r300->hw.unk2220.cmd[1] = r300PackFloat32(1.0);
1399 r300->hw.unk2220.cmd[2] = r300PackFloat32(1.0);
1400 r300->hw.unk2220.cmd[3] = r300PackFloat32(1.0);
1401 r300->hw.unk2220.cmd[4] = r300PackFloat32(1.0);
1403 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1404 r300->hw.unk2288.cmd[1] = R300_2288_R300;
1406 r300->hw.unk2288.cmd[1] = R300_2288_RV350;
1409 r300->hw.vof.cmd[R300_VOF_CNTL_0] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
1410 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
1411 r300->hw.vof.cmd[R300_VOF_CNTL_1] = 0; /* no textures */
1414 r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0;
1415 r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0;
1416 r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0;
1419 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
1420 | R300_GB_LINE_STUFF_ENABLE
1421 | R300_GB_TRIANGLE_STUFF_ENABLE;
1423 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
1424 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
1425 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1426 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1427 | R300_GB_TILE_PIPE_COUNT_R300
1428 | R300_GB_TILE_SIZE_16;
1430 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1431 | R300_GB_TILE_PIPE_COUNT_RV300
1432 | R300_GB_TILE_SIZE_16;
1433 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0x00000000;
1434 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = 0x00000000; /* No antialiasing */
1436 //r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;
1438 r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0);
1439 r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0);
1440 r300->hw.unk4200.cmd[3] = r300PackFloat32(1.0);
1441 r300->hw.unk4200.cmd[4] = r300PackFloat32(1.0);
1443 r300->hw.unk4214.cmd[1] = 0x00050005;
1445 r300->hw.ps.cmd[R300_PS_POINTSIZE] = (6 << R300_POINTSIZE_X_SHIFT) |
1446 (6 << R300_POINTSIZE_Y_SHIFT);
1448 r300->hw.unk4230.cmd[1] = 0x01800000;
1449 r300->hw.unk4230.cmd[2] = 0x00020006;
1450 r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0);
1452 r300->hw.unk4260.cmd[1] = 0;
1453 r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0);
1454 r300->hw.unk4260.cmd[3] = r300PackFloat32(1.0);
1456 r300->hw.unk4274.cmd[1] = 0x00000002;
1457 r300->hw.unk4274.cmd[2] = 0x0003AAAA;
1458 r300->hw.unk4274.cmd[3] = 0x00000000;
1459 r300->hw.unk4274.cmd[4] = 0x00000000;
1461 r300->hw.unk4288.cmd[1] = 0x00000000;
1462 r300->hw.unk4288.cmd[2] = 0x00000001;
1463 r300->hw.unk4288.cmd[3] = 0x00000000;
1464 r300->hw.unk4288.cmd[4] = 0x00000000;
1465 r300->hw.unk4288.cmd[5] = 0x00000000;
1467 r300->hw.unk42A0.cmd[1] = 0x00000000;
1469 r300->hw.unk42B4.cmd[1] = 0x00000000;
1471 r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
1472 r300->hw.unk42C0.cmd[2] = 0x00000000;
1475 r300->hw.unk43A4.cmd[1] = 0x0000001C;
1476 r300->hw.unk43A4.cmd[2] = 0x2DA49525;
1478 r300->hw.unk43E8.cmd[1] = 0x00FFFFFF;
1481 r300->hw.fp.cmd[R300_FP_CNTL0] = 0;
1482 r300->hw.fp.cmd[R300_FP_CNTL1] = 0;
1483 r300->hw.fp.cmd[R300_FP_CNTL2] = 0;
1484 r300->hw.fp.cmd[R300_FP_NODE0] = 0;
1485 r300->hw.fp.cmd[R300_FP_NODE1] = 0;
1486 r300->hw.fp.cmd[R300_FP_NODE2] = 0;
1487 r300->hw.fp.cmd[R300_FP_NODE3] = 0;
1490 r300->hw.unk46A4.cmd[1] = 0x00001B01;
1491 r300->hw.unk46A4.cmd[2] = 0x00001B0F;
1492 r300->hw.unk46A4.cmd[3] = 0x00001B0F;
1493 r300->hw.unk46A4.cmd[4] = 0x00001B0F;
1494 r300->hw.unk46A4.cmd[5] = 0x00000001;
1497 for(i = 1; i <= 64; ++i) {
1498 /* create NOP instructions */
1499 r300->hw.fpi[0].cmd[i] = FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO));
1500 r300->hw.fpi[1].cmd[i] = FP_SELC(0,XYZ,NO,FP_TMP(0),0,0);
1501 r300->hw.fpi[2].cmd[i] = FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO));
1502 r300->hw.fpi[3].cmd[i] = FP_SELA(0,W,NO,FP_TMP(0),0,0);
1506 r300->hw.unk4BC0.cmd[1] = 0;
1508 r300->hw.unk4BC8.cmd[1] = 0;
1509 r300->hw.unk4BC8.cmd[2] = 0;
1510 r300->hw.unk4BC8.cmd[3] = 0;
1513 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
1516 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
1517 r300->hw.unk4BD8.cmd[1] = 0;
1519 r300->hw.unk4E00.cmd[1] = 0;
1522 r300->hw.bld.cmd[R300_BLD_CBLEND] = 0;
1523 r300->hw.bld.cmd[R300_BLD_ABLEND] = 0;
1526 r300->hw.unk4E10.cmd[1] = 0;
1527 r300->hw.unk4E10.cmd[2] = 0;
1528 r300->hw.unk4E10.cmd[3] = 0;
1530 r300->hw.cb.cmd[R300_CB_OFFSET] =
1531 r300->radeon.radeonScreen->backOffset +
1532 r300->radeon.radeonScreen->fbLocation;
1533 r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.radeonScreen->backPitch
1534 | R300_COLOR_UNKNOWN_22_23;
1536 r300->hw.unk4E50.cmd[1] = 0;
1537 r300->hw.unk4E50.cmd[2] = 0;
1538 r300->hw.unk4E50.cmd[3] = 0;
1539 r300->hw.unk4E50.cmd[4] = 0;
1540 r300->hw.unk4E50.cmd[5] = 0;
1541 r300->hw.unk4E50.cmd[6] = 0;
1542 r300->hw.unk4E50.cmd[7] = 0;
1543 r300->hw.unk4E50.cmd[8] = 0;
1544 r300->hw.unk4E50.cmd[9] = 0;
1546 r300->hw.unk4E88.cmd[1] = 0;
1548 r300->hw.unk4EA0.cmd[1] = 0x00000000;
1549 r300->hw.unk4EA0.cmd[2] = 0xffffffff;
1551 r300->hw.unk4F10.cmd[1] = 0x00000002; // depthbuffer format?
1552 r300->hw.unk4F10.cmd[2] = 0x00000000;
1553 r300->hw.unk4F10.cmd[3] = 0x00000003;
1554 r300->hw.unk4F10.cmd[4] = 0x00000000;
1556 /* experiment a bit */
1557 r300->hw.unk4F10.cmd[2] = 0x00000001; // depthbuffer format?
1559 r300->hw.zb.cmd[R300_ZB_OFFSET] =
1560 r300->radeon.radeonScreen->depthOffset +
1561 r300->radeon.radeonScreen->fbLocation;
1562 r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
1564 r300->hw.unk4F28.cmd[1] = 0;
1566 r300->hw.unk4F30.cmd[1] = 0;
1567 r300->hw.unk4F30.cmd[2] = 0;
1569 r300->hw.unk4F44.cmd[1] = 0;
1571 r300->hw.unk4F54.cmd[1] = 0;
1574 ((drm_r300_cmd_header_t*)r300->hw.vpi.cmd)->vpu.count = 0;
1575 for(i = 1; i < R300_VPI_CMDSIZE; i += 4) {
1577 r300->hw.vpi.cmd[i+0] = VP_OUT(ADD,TMP,0,XYZW);
1578 r300->hw.vpi.cmd[i+1] = VP_IN(TMP,0);
1579 r300->hw.vpi.cmd[i+2] = VP_ZERO();
1580 r300->hw.vpi.cmd[i+3] = VP_ZERO();
1583 ((drm_r300_cmd_header_t*)r300->hw.vpp.cmd)->vpu.count = 0;
1584 for(i = 1; i < R300_VPP_CMDSIZE; ++i)
1585 r300->hw.vpp.cmd[i] = 0;
1588 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
1589 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
1590 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
1591 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
1595 r300->hw.all_dirty = GL_TRUE;
1601 * Calculate initial hardware state and register state functions.
1602 * Assumes that the command buffer and state atoms have been
1603 * initialized already.
1605 void r300InitState(r300ContextPtr r300)
1607 GLcontext *ctx = r300->radeon.glCtx;
1610 radeonInitState(&r300->radeon);
1612 switch (ctx->Visual.depthBits) {
1614 r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
1615 depth_fmt = R200_DEPTH_FORMAT_16BIT_INT_Z;
1616 //r300->state.stencil.clear = 0x00000000;
1619 r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
1620 depth_fmt = R200_DEPTH_FORMAT_24BIT_INT_Z;
1621 //r300->state.stencil.clear = 0xff000000;
1624 fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
1625 ctx->Visual.depthBits);
1629 /* Only have hw stencil when depth buffer is 24 bits deep */
1630 r300->state.hw_stencil = (ctx->Visual.stencilBits > 0 &&
1631 ctx->Visual.depthBits == 24);
1633 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
1635 r300ResetHwState(r300);
1641 * Initialize driver's state callback functions
1643 void r300InitStateFuncs(struct dd_function_table* functions)
1645 radeonInitStateFuncs(functions);
1647 functions->UpdateState = r300InvalidateState;
1648 functions->AlphaFunc = r300AlphaFunc;
1649 functions->BlendColor = r300BlendColor;
1650 functions->BlendEquationSeparate = r300BlendEquationSeparate;
1651 functions->BlendFuncSeparate = r300BlendFuncSeparate;
1652 functions->Enable = r300Enable;
1653 functions->ColorMask = r300ColorMask;
1654 functions->DepthFunc = r300DepthFunc;
1655 functions->DepthMask = r300DepthMask;
1656 functions->CullFace = r300CullFace;
1657 functions->FrontFace = r300FrontFace;
1659 /* Stencil related */
1660 functions->ClearStencil = r300ClearStencil;
1661 functions->StencilFunc = r300StencilFunc;
1662 functions->StencilMask = r300StencilMask;
1663 functions->StencilOp = r300StencilOp;
1665 /* Viewport related */
1666 functions->Viewport = r300Viewport;
1667 functions->DepthRange = r300DepthRange;
1668 functions->PointSize = r300PointSize;