2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
34 * Nicolai Haehnle <prefect_@gmx.net>
44 #include "simple_list.h"
46 #include "api_arrayelt.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
51 #include "texformat.h"
53 #include "radeon_ioctl.h"
54 #include "radeon_state.h"
55 #include "r300_context.h"
56 #include "r300_ioctl.h"
57 #include "r300_state.h"
59 #include "r300_program.h"
60 #include "r300_emit.h"
61 #include "r300_fixed_pipelines.h"
64 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
66 r300ContextPtr rmesa = R300_CONTEXT(ctx);
67 int pp_misc = rmesa->hw.at.cmd[R300_AT_ALPHA_TEST];
70 CLAMPED_FLOAT_TO_UBYTE(refByte, ref);
72 R300_STATECHANGE(rmesa, at);
74 pp_misc &= ~(R300_ALPHA_TEST_OP_MASK | R300_REF_ALPHA_MASK);
75 pp_misc |= (refByte & R300_REF_ALPHA_MASK);
79 pp_misc |= R300_ALPHA_TEST_FAIL;
82 pp_misc |= R300_ALPHA_TEST_LESS;
85 pp_misc |= R300_ALPHA_TEST_EQUAL;
88 pp_misc |= R300_ALPHA_TEST_LEQUAL;
91 pp_misc |= R300_ALPHA_TEST_GREATER;
94 pp_misc |= R300_ALPHA_TEST_NEQUAL;
97 pp_misc |= R300_ALPHA_TEST_GEQUAL;
100 pp_misc |= R300_ALPHA_TEST_PASS;
104 rmesa->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
107 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
110 r300ContextPtr rmesa = R300_CONTEXT(ctx);
111 fprintf(stderr, "%s:%s is not implemented yet. Fixme !\n", __FILE__, __FUNCTION__);
113 R200_STATECHANGE(rmesa, ctx);
114 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
115 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
116 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
117 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
118 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor)
119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] =
120 radeonPackColor(4, color[0], color[1], color[2], color[3]);
125 * Calculate the hardware blend factor setting. This same function is used
126 * for source and destination of both alpha and RGB.
129 * The hardware register value for the specified blend factor. This value
130 * will need to be shifted into the correct position for either source or
131 * destination factor.
134 * Since the two cases where source and destination are handled differently
135 * are essentially error cases, they should never happen. Determine if these
136 * cases can be removed.
138 static int blend_factor(GLenum factor, GLboolean is_src)
144 func = R200_BLEND_GL_ZERO;
147 func = R200_BLEND_GL_ONE;
150 func = R200_BLEND_GL_DST_COLOR;
152 case GL_ONE_MINUS_DST_COLOR:
153 func = R200_BLEND_GL_ONE_MINUS_DST_COLOR;
156 func = R200_BLEND_GL_SRC_COLOR;
158 case GL_ONE_MINUS_SRC_COLOR:
159 func = R200_BLEND_GL_ONE_MINUS_SRC_COLOR;
162 func = R200_BLEND_GL_SRC_ALPHA;
164 case GL_ONE_MINUS_SRC_ALPHA:
165 func = R200_BLEND_GL_ONE_MINUS_SRC_ALPHA;
168 func = R200_BLEND_GL_DST_ALPHA;
170 case GL_ONE_MINUS_DST_ALPHA:
171 func = R200_BLEND_GL_ONE_MINUS_DST_ALPHA;
173 case GL_SRC_ALPHA_SATURATE:
175 (is_src) ? R200_BLEND_GL_SRC_ALPHA_SATURATE :
178 case GL_CONSTANT_COLOR:
179 func = R200_BLEND_GL_CONST_COLOR;
181 case GL_ONE_MINUS_CONSTANT_COLOR:
182 func = R200_BLEND_GL_ONE_MINUS_CONST_COLOR;
184 case GL_CONSTANT_ALPHA:
185 func = R200_BLEND_GL_CONST_ALPHA;
187 case GL_ONE_MINUS_CONSTANT_ALPHA:
188 func = R200_BLEND_GL_ONE_MINUS_CONST_ALPHA;
191 func = (is_src) ? R200_BLEND_GL_ONE : R200_BLEND_GL_ZERO;
197 * Sets both the blend equation and the blend function.
198 * This is done in a single
199 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
200 * change the interpretation of the blend function.
201 * Also, make sure that blend function and blend equation are set to their default
202 * value if color blending is not enabled, since at least blend equations GL_MIN
203 * and GL_FUNC_REVERSE_SUBTRACT will cause wrong results otherwise for
207 /* helper function */
208 static void r300_set_blend_cntl(r300ContextPtr rmesa, int func, int eqn, int cbits, int funcA, int eqnA)
210 GLuint new_ablend, new_cblend;
212 new_ablend = eqnA | funcA;
213 new_cblend = eqn | func;
215 new_cblend |= R300_BLEND_NO_SEPARATE;
219 if((new_ablend != rmesa->hw.bld.cmd[R300_BLD_ABLEND])
220 || (new_cblend != rmesa->hw.bld.cmd[R300_BLD_CBLEND])){
221 R300_STATECHANGE(rmesa, bld);
222 rmesa->hw.bld.cmd[R300_BLD_ABLEND]=new_ablend;
223 rmesa->hw.bld.cmd[R300_BLD_CBLEND]=new_cblend;
227 static void r300_set_blend_state(GLcontext * ctx)
229 r300ContextPtr rmesa = R300_CONTEXT(ctx);
231 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
232 ~(R300_ROP_ENABLE | R300_ALPHA_BLEND_ENABLE |
233 R300_SEPARATE_ALPHA_ENABLE);
236 int func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
237 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
238 int eqn = R200_COMB_FCN_ADD_CLAMP;
239 int funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
240 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
241 int eqnA = R200_COMB_FCN_ADD_CLAMP;
244 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
245 if (ctx->Color._LogicOpEnabled) {
247 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
248 cntl | R300_ROP_ENABLE;
250 r300_set_blend_cntl(rmesa,
254 } else if (ctx->Color.BlendEnabled) {
256 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
257 cntl | R300_ALPHA_BLEND_ENABLE |
258 R300_SEPARATE_ALPHA_ENABLE;
262 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
264 r300_set_blend_cntl(rmesa,
270 if (ctx->Color._LogicOpEnabled) {
272 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
273 cntl | R300_ROP_ENABLE;
274 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
277 } else if (ctx->Color.BlendEnabled) {
279 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
280 cntl | R300_ALPHA_BLEND_ENABLE;
284 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
285 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
287 r300_set_blend_cntl(rmesa,
295 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
296 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
298 R200_DST_BLEND_SHIFT);
300 switch (ctx->Color.BlendEquationRGB) {
302 eqn = R300_COMB_FCN_ADD_CLAMP;
305 case GL_FUNC_SUBTRACT:
306 eqn = R300_COMB_FCN_SUB_CLAMP;
309 case GL_FUNC_REVERSE_SUBTRACT:
310 eqn = R200_COMB_FCN_RSUB_CLAMP;
314 eqn = R200_COMB_FCN_MIN;
315 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
316 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
320 eqn = R200_COMB_FCN_MAX;
321 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
322 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
327 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
328 __func__, __LINE__, ctx->Color.BlendEquationRGB);
332 if (!rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
334 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
340 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
341 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
343 R200_DST_BLEND_SHIFT);
345 switch (ctx->Color.BlendEquationA) {
347 eqnA = R300_COMB_FCN_ADD_CLAMP;
350 case GL_FUNC_SUBTRACT:
351 eqnA = R300_COMB_FCN_SUB_CLAMP;
354 case GL_FUNC_REVERSE_SUBTRACT:
355 eqnA = R200_COMB_FCN_RSUB_CLAMP;
359 eqnA = R200_COMB_FCN_MIN;
360 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
361 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
365 eqnA = R200_COMB_FCN_MAX;
366 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
367 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
371 fprintf(stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n",
372 __func__, __LINE__, ctx->Color.BlendEquationA);
376 r300_set_blend_cntl(rmesa,
377 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
379 r300_set_blend_cntl(rmesa,
380 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
384 static void r300BlendEquationSeparate(GLcontext * ctx,
385 GLenum modeRGB, GLenum modeA)
387 r300_set_blend_state(ctx);
390 static void r300BlendFuncSeparate(GLcontext * ctx,
391 GLenum sfactorRGB, GLenum dfactorRGB,
392 GLenum sfactorA, GLenum dfactorA)
394 r300_set_blend_state(ctx);
398 * Update our tracked culling state based on Mesa's state.
400 static void r300UpdateCulling(GLcontext* ctx)
402 r300ContextPtr r300 = R300_CONTEXT(ctx);
405 R300_STATECHANGE(r300, cul);
406 if (ctx->Polygon.CullFlag) {
407 if (ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK)
408 val = R300_CULL_FRONT|R300_CULL_BACK;
409 else if (ctx->Polygon.CullFaceMode == GL_FRONT)
410 val = R300_CULL_FRONT;
412 val = R300_CULL_BACK;
414 if (ctx->Polygon.FrontFace == GL_CW)
415 val |= R300_FRONT_FACE_CW;
417 val |= R300_FRONT_FACE_CCW;
420 r300->hw.cul.cmd[R300_CUL_CULL] = val;
425 * Handle glEnable()/glDisable().
427 * \note Mesa already filters redundant calls to glEnable/glDisable.
429 static void r300Enable(GLcontext* ctx, GLenum cap, GLboolean state)
431 r300ContextPtr r300 = R300_CONTEXT(ctx);
434 if (RADEON_DEBUG & DEBUG_STATE)
435 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
436 _mesa_lookup_enum_by_nr(cap),
437 state ? "GL_TRUE" : "GL_FALSE");
440 /* Fast track this one...
448 R200_STATECHANGE(r300, at);
450 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
451 R300_ALPHA_TEST_ENABLE;
453 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
454 ~R300_ALPHA_TEST_ENABLE;
459 case GL_COLOR_LOGIC_OP:
460 r300_set_blend_state(ctx);
464 R300_STATECHANGE(r300, zs);
468 newval = R300_RB3D_Z_TEST_AND_WRITE;
470 newval = R300_RB3D_Z_TEST;
474 r300->hw.zs.cmd[R300_ZS_CNTL_0] = newval;
477 case GL_STENCIL_TEST:
480 static int stencil=1;
482 fprintf(stderr, "%s:%s - do not know how to enable stencil. Help me !\n",
483 __FILE__, __FUNCTION__);
488 if (r300->state.hw_stencil) {
489 //fprintf(stderr, "Stencil %s\n", state ? "enabled" : "disabled");
490 R300_STATECHANGE(r300, zs);
492 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
493 R300_RB3D_STENCIL_ENABLE;
495 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
496 ~R300_RB3D_STENCIL_ENABLE;
499 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
504 r300UpdateCulling(ctx);
506 case GL_VERTEX_PROGRAM_ARB:
507 //TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, state);
511 radeonEnable(ctx, cap, state);
518 * Change the culling mode.
520 * \note Mesa already filters redundant calls to this function.
522 static void r300CullFace(GLcontext* ctx, GLenum mode)
526 r300UpdateCulling(ctx);
531 * Change the polygon orientation.
533 * \note Mesa already filters redundant calls to this function.
535 static void r300FrontFace(GLcontext* ctx, GLenum mode)
539 r300UpdateCulling(ctx);
544 * Change the depth testing function.
546 * \note Mesa already filters redundant calls to this function.
548 static void r300DepthFunc(GLcontext* ctx, GLenum func)
550 r300ContextPtr r300 = R300_CONTEXT(ctx);
552 R300_STATECHANGE(r300, zs);
554 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
558 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NEVER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
561 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LESS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
564 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_EQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
567 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
570 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GREATER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
573 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NOTEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
576 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
579 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
587 * Enable/Disable depth writing.
589 * \note Mesa already filters redundant calls to this function.
591 static void r300DepthMask(GLcontext* ctx, GLboolean mask)
593 r300ContextPtr r300 = R300_CONTEXT(ctx);
595 if (!ctx->Depth.Test)
598 R300_STATECHANGE(r300, zs);
599 r300->hw.zs.cmd[R300_ZS_CNTL_0] = mask
600 ? R300_RB3D_Z_TEST_AND_WRITE : R300_RB3D_Z_TEST;
605 * Handle glColorMask()
607 static void r300ColorMask(GLcontext* ctx,
608 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
610 r300ContextPtr r300 = R300_CONTEXT(ctx);
611 int mask = (b << 0) | (g << 1) | (r << 2) | (a << 3);
613 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
614 R300_STATECHANGE(r300, cmk);
615 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
619 /* =============================================================
622 static void r300PointSize(GLcontext * ctx, GLfloat size)
624 r300ContextPtr r300 = R300_CONTEXT(ctx);
626 /* This might need fixing later */
627 R300_STATECHANGE(r300, vps);
628 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
630 /* =============================================================
634 static int translate_stencil_func(int func)
638 return R300_ZS_NEVER;
644 return R300_ZS_EQUAL;
647 return R300_ZS_LEQUAL;
650 return R300_ZS_GREATER;
653 return R300_ZS_NOTEQUAL;
656 return R300_ZS_GEQUAL;
659 return R300_ZS_ALWAYS;
665 static int translate_stencil_op(int op)
673 return R300_ZS_REPLACE;
678 case GL_INCR_WRAP_EXT:
679 return R300_ZS_INCR_WRAP;
680 case GL_DECR_WRAP_EXT:
681 return R300_ZS_DECR_WRAP;
683 return R300_ZS_INVERT;
687 static void r300StencilFunc(GLcontext * ctx, GLenum func,
688 GLint ref, GLuint mask)
690 r300ContextPtr rmesa = R300_CONTEXT(ctx);
691 GLuint refmask = ((ctx->Stencil.Ref[0] << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
693 ValueMask[0] << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
696 R200_STATECHANGE(rmesa, zs);
698 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(
699 (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
700 | (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT));
701 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~((R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
702 (R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
704 flag = translate_stencil_func(ctx->Stencil.Function[0]);
706 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
707 | (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT);
708 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
711 static void r300StencilMask(GLcontext * ctx, GLuint mask)
713 r300ContextPtr rmesa = R300_CONTEXT(ctx);
715 R200_STATECHANGE(rmesa, zs);
716 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~(R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT);
717 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= ctx->Stencil.WriteMask[0] << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
721 static void r300StencilOp(GLcontext * ctx, GLenum fail,
722 GLenum zfail, GLenum zpass)
724 r300ContextPtr rmesa = R300_CONTEXT(ctx);
726 R200_STATECHANGE(rmesa, zs);
727 /* It is easier to mask what's left.. */
728 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= (R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
730 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
731 (translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT)
732 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT)
733 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT)
734 |(translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT)
735 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT)
736 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT);
740 static void r300ClearStencil(GLcontext * ctx, GLint s)
742 r300ContextPtr rmesa = R300_CONTEXT(ctx);
744 /* Not sure whether this is correct.. */
745 R200_STATECHANGE(rmesa, zs);
746 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] =
747 ((GLuint) ctx->Stencil.Clear |
748 (0xff << R200_STENCIL_MASK_SHIFT) |
749 (ctx->Stencil.WriteMask[0] << R200_STENCIL_WRITEMASK_SHIFT));
752 /* =============================================================
753 * Window position and viewport transformation
757 * To correctly position primitives:
759 #define SUBPIXEL_X 0.125
760 #define SUBPIXEL_Y 0.125
762 void r300UpdateWindow(GLcontext * ctx)
764 r300ContextPtr rmesa = R300_CONTEXT(ctx);
765 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
766 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
767 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
768 const GLfloat *v = ctx->Viewport._WindowMap.m;
770 GLfloat sx = v[MAT_SX];
771 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
772 GLfloat sy = -v[MAT_SY];
773 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
774 GLfloat sz = v[MAT_SZ] * rmesa->state.depth.scale;
775 GLfloat tz = v[MAT_TZ] * rmesa->state.depth.scale;
777 R300_FIREVERTICES(rmesa);
778 R300_STATECHANGE(rmesa, vpt);
780 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
781 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
782 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
783 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
784 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
785 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
788 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
789 GLsizei width, GLsizei height)
791 /* Don't pipeline viewport changes, conflict with window offset
792 * setting below. Could apply deltas to rescue pipelined viewport
793 * values, or keep the originals hanging around.
795 R200_FIREVERTICES(R200_CONTEXT(ctx));
796 r300UpdateWindow(ctx);
799 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
801 r300UpdateWindow(ctx);
804 /* Routing and texture-related */
806 void r300_setup_routing(GLcontext *ctx, GLboolean immediate)
808 int i, count=0,reg=0;
810 TNLcontext *tnl = TNL_CONTEXT(ctx);
811 struct vertex_buffer *VB = &tnl->vb;
812 r300ContextPtr r300 = R300_CONTEXT(ctx);
815 /* Stage 1 - input to VAP */
817 /* Assign register number automatically, retaining it in rmesa->state.reg */
819 /* Note: immediate vertex data includes all coordinates.
820 To save bandwidth use either VBUF or state-based vertex generation */
822 #define CONFIGURE_AOS(v, o, r, f) \
824 if (RADEON_DEBUG & DEBUG_STATE)fprintf(stderr, "Enabling "#r "\n"); \
826 r300->state.aos[count].element_size=4; \
827 r300->state.aos[count].stride=4; \
828 r300->state.aos[count].ncomponents=4; \
830 r300->state.aos[count].element_size=v->size; \
831 r300->state.aos[count].stride=v->size; \
832 r300->state.aos[count].ncomponents=v->size; \
834 r300->state.aos[count].offset=o; \
835 r300->state.aos[count].reg=reg; \
836 r300->state.aos[count].format=(f); \
837 r300->state.vap_reg.r=reg; \
842 /* All offsets are 0 - for use by immediate mode.
843 Should change later to handle vertex buffers */
844 if(tnl->render_inputs & _TNL_BIT_POS)
845 CONFIGURE_AOS(VB->ObjPtr, 0, i_coords, AOS_FORMAT_FLOAT);
846 if(tnl->render_inputs & _TNL_BIT_NORMAL)
847 CONFIGURE_AOS(VB->NormalPtr, 0, i_normal, AOS_FORMAT_FLOAT);
849 if(tnl->render_inputs & _TNL_BIT_COLOR0)
850 CONFIGURE_AOS(VB->ColorPtr[0], 0, i_color[0], AOS_FORMAT_FLOAT_COLOR);
851 if(tnl->render_inputs & _TNL_BIT_COLOR1)
852 CONFIGURE_AOS(VB->SecondaryColorPtr[0], 0, i_color[1], AOS_FORMAT_FLOAT_COLOR);
854 if(tnl->render_inputs & _TNL_BIT_FOG)
855 CONFIGURE_AOS(VB->FogCoordPtr, 0, i_fog, AOS_FORMAT_FLOAT);
857 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
858 if(tnl->render_inputs & (_TNL_BIT_TEX0<<i))
859 CONFIGURE_AOS(VB->TexCoordPtr[i], 0, i_tex[i], AOS_FORMAT_FLOAT);
861 if(tnl->render_inputs & _TNL_BIT_INDEX)
862 CONFIGURE_AOS(VB->IndexPtr[0], 0, i_index, AOS_FORMAT_FLOAT);
863 if(tnl->render_inputs & _TNL_BIT_POINTSIZE)
864 CONFIGURE_AOS(VB->PointSizePtr, 0, i_pointsize, AOS_FORMAT_FLOAT);
866 r300->state.aos_count=count;
868 if (RADEON_DEBUG & DEBUG_STATE)
869 fprintf(stderr, "aos_count=%d\n", count);
871 if(count>R300_MAX_AOS_ARRAYS){
872 fprintf(stderr, "Aieee ! AOS array count exceeded !\n");
878 /* setup INPUT_ROUTE */
879 R300_STATECHANGE(r300, vir[0]);
880 for(i=0;i+1<count;i+=2){
881 dw=(r300->state.aos[i].ncomponents-1)
882 | ((r300->state.aos[i].reg)<<8)
883 | (r300->state.aos[i].format<<14)
884 | (((r300->state.aos[i+1].ncomponents-1)
885 | ((r300->state.aos[i+1].reg)<<8)
886 | (r300->state.aos[i+1].format<<14))<<16);
891 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
894 dw=(r300->state.aos[count-1].ncomponents-1)
895 | (r300->state.aos[count-1].format<<14)
896 | ((r300->state.aos[count-1].reg)<<8)
898 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
899 //fprintf(stderr, "vir0 dw=%08x\n", dw);
901 /* Set the rest of INPUT_ROUTE_0 to 0 */
902 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[0].cmd[R300_VIR_CNTL_0+i]=(0x0);
903 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = (count+1)>>1;
906 /* Mesa assumes that all missing components are from (0, 0, 0, 1) */
907 #define ALL_COMPONENTS ((R300_INPUT_ROUTE_SELECT_X<<R300_INPUT_ROUTE_X_SHIFT) \
908 | (R300_INPUT_ROUTE_SELECT_Y<<R300_INPUT_ROUTE_Y_SHIFT) \
909 | (R300_INPUT_ROUTE_SELECT_Z<<R300_INPUT_ROUTE_Z_SHIFT) \
910 | (R300_INPUT_ROUTE_SELECT_W<<R300_INPUT_ROUTE_W_SHIFT))
912 #define ALL_DEFAULT ((R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_X_SHIFT) \
913 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Y_SHIFT) \
914 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Z_SHIFT) \
915 | (R300_INPUT_ROUTE_SELECT_ONE<<R300_INPUT_ROUTE_W_SHIFT))
917 R300_STATECHANGE(r300, vir[1]);
919 for(i=0;i+1<count;i+=2){
921 mask=(1<<(r300->state.aos[i].ncomponents*3))-1;
922 dw=(ALL_COMPONENTS & mask)
923 | (ALL_DEFAULT & ~mask)
924 | R300_INPUT_ROUTE_ENABLE;
927 mask=(1<<(r300->state.aos[i+1].ncomponents*3))-1;
929 (ALL_COMPONENTS & mask)
930 | (ALL_DEFAULT & ~mask)
931 | R300_INPUT_ROUTE_ENABLE
934 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
937 mask=(1<<(r300->state.aos[count-1].ncomponents*3))-1;
938 dw=(ALL_COMPONENTS & mask)
939 | (ALL_DEFAULT & ~mask)
940 | R300_INPUT_ROUTE_ENABLE;
941 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
942 //fprintf(stderr, "vir1 dw=%08x\n", dw);
944 /* Set the rest of INPUT_ROUTE_1 to 0 */
945 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[1].cmd[R300_VIR_CNTL_0+i]=0x0;
946 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = (count+1)>>1;
948 /* Set up input_cntl */
950 R300_STATECHANGE(r300, vic);
951 r300->hw.vic.cmd[R300_VIC_CNTL_0]=0x5555; /* Hard coded value, no idea what it means */
953 r300->hw.vic.cmd[R300_VIC_CNTL_1]=R300_INPUT_CNTL_POS
954 | R300_INPUT_CNTL_COLOR;
956 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
957 if(ctx->Texture.Unit[i].Enabled)
958 r300->hw.vic.cmd[R300_VIC_CNTL_1]|=(R300_INPUT_CNTL_TC0<<i);
960 /* Stage 3: VAP output */
961 R300_STATECHANGE(r300, vof);
962 r300->hw.vof.cmd[R300_VOF_CNTL_0]=R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
963 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
965 r300->hw.vof.cmd[R300_VOF_CNTL_1]=0;
966 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
967 if(ctx->Texture.Unit[i].Enabled)
968 r300->hw.vof.cmd[R300_VOF_CNTL_1]|=(4<<(3*i));
972 static r300TexObj default_tex_obj={
973 filter:R300_TX_MAG_FILTER_LINEAR | R300_TX_MIN_FILTER_LINEAR,
975 size: (0xff << R300_TX_WIDTHMASK_SHIFT)
976 | (0xff << R300_TX_HEIGHTMASK_SHIFT)
977 | (0x8 << R300_TX_SIZE_SHIFT),
984 /* there is probably a system to these value, but, for now,
985 we just try by hand */
987 static int inline translate_src(int src)
996 case GL_PRIMARY_COLOR:
1013 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1014 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1015 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1016 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1017 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1018 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1019 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1020 * combinations where only one of them is nearest.
1022 static unsigned long gen_fixed_filter(unsigned long f)
1024 unsigned long mag, min, needs_fixing=0;
1027 /* We ignore MIRROR bit so we dont have to do everything twice */
1028 if((f & ((7-1) << R300_TX_WRAP_S_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)){
1031 if((f & ((7-1) << R300_TX_WRAP_T_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)){
1034 if((f & ((7-1) << R300_TX_WRAP_Q_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_Q_SHIFT)){
1041 mag=f & R300_TX_MAG_FILTER_MASK;
1042 min=f & R300_TX_MIN_FILTER_MASK;
1044 /* TODO: Check for anisto filters too */
1045 if((mag != R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST))
1048 /* r300 cant handle these modes hence we force nearest to linear */
1049 if((mag == R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST)){
1050 f &= ~R300_TX_MAG_FILTER_NEAREST;
1051 f |= R300_TX_MAG_FILTER_LINEAR;
1055 if((min == R300_TX_MIN_FILTER_NEAREST) && (mag != R300_TX_MAG_FILTER_NEAREST)){
1056 f &= ~R300_TX_MIN_FILTER_NEAREST;
1057 f |= R300_TX_MIN_FILTER_LINEAR;
1061 /* Both are nearest */
1062 if(needs_fixing & 1){
1063 f &= ~((7-1) << R300_TX_WRAP_S_SHIFT);
1064 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1066 if(needs_fixing & 2){
1067 f &= ~((7-1) << R300_TX_WRAP_T_SHIFT);
1068 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1070 if(needs_fixing & 4){
1071 f &= ~((7-1) << R300_TX_WRAP_Q_SHIFT);
1072 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_Q_SHIFT;
1077 void r300_setup_textures(GLcontext *ctx)
1080 struct r300_tex_obj *t;
1081 r300ContextPtr r300 = R300_CONTEXT(ctx);
1082 int max_texture_unit=-1; /* -1 translates into no setup costs for fields */
1083 struct gl_texture_unit *texUnit;
1085 R300_STATECHANGE(r300, txe);
1086 R300_STATECHANGE(r300, tex.filter);
1087 R300_STATECHANGE(r300, tex.unknown1);
1088 R300_STATECHANGE(r300, tex.size);
1089 R300_STATECHANGE(r300, tex.format);
1090 R300_STATECHANGE(r300, tex.offset);
1091 R300_STATECHANGE(r300, tex.unknown4);
1092 R300_STATECHANGE(r300, tex.unknown5);
1093 //R300_STATECHANGE(r300, tex.border_color);
1095 r300->state.texture.tc_count=0;
1097 r300->hw.txe.cmd[R300_TXE_ENABLE]=0x0;
1099 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1100 if (RADEON_DEBUG & DEBUG_STATE)
1101 fprintf(stderr, "mtu=%d\n", mtu);
1103 if(mtu>R300_MAX_TEXTURE_UNITS){
1104 fprintf(stderr, "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1105 mtu, R300_MAX_TEXTURE_UNITS);
1109 if(ctx->Texture.Unit[i].Enabled){
1110 t=r300->state.texture.unit[i].texobj;
1111 fprintf(stderr, "format=%08x\n", r300->state.texture.unit[i].format);
1112 r300->state.texture.tc_count++;
1114 fprintf(stderr, "Texture unit %d enabled, but corresponding texobj is NULL, using default object.\n", i);
1118 fprintf(stderr, "t->format=%08x\n", t->format);
1119 if (RADEON_DEBUG & DEBUG_STATE)
1120 fprintf(stderr, "Activating texture unit %d\n", i);
1122 r300->hw.txe.cmd[R300_TXE_ENABLE]|=(1<<i);
1124 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0+i]=gen_fixed_filter(t->filter);
1125 /* No idea why linear filtered textures shake when puting random data */
1126 /*r300->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+i]=(rand()%0xffffffff) & (~0x1fff);*/
1127 r300->hw.tex.size.cmd[R300_TEX_VALUE_0+i]=t->size;
1128 r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=t->format;
1129 //fprintf(stderr, "t->format=%08x\n", t->format);
1130 r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=r300->radeon.radeonScreen->fbLocation+t->offset;
1131 r300->hw.tex.unknown4.cmd[R300_TEX_VALUE_0+i]=0x0;
1132 r300->hw.tex.unknown5.cmd[R300_TEX_VALUE_0+i]=0x0;
1133 //r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
1136 ((drm_r300_cmd_header_t*)r300->hw.tex.filter.cmd)->unchecked_state.count = max_texture_unit+1;
1137 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown1.cmd)->unchecked_state.count = max_texture_unit+1;
1138 ((drm_r300_cmd_header_t*)r300->hw.tex.size.cmd)->unchecked_state.count = max_texture_unit+1;
1139 ((drm_r300_cmd_header_t*)r300->hw.tex.format.cmd)->unchecked_state.count = max_texture_unit+1;
1140 ((drm_r300_cmd_header_t*)r300->hw.tex.offset.cmd)->unchecked_state.count = max_texture_unit+1;
1141 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown4.cmd)->unchecked_state.count = max_texture_unit+1;
1142 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown5.cmd)->unchecked_state.count = max_texture_unit+1;
1143 //((drm_r300_cmd_header_t*)r300->hw.tex.border_color.cmd)->unchecked_state.count = max_texture_unit+1;
1145 if (RADEON_DEBUG & DEBUG_STATE)
1146 fprintf(stderr, "TX_ENABLE: %08x max_texture_unit=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], max_texture_unit);
1149 void r300_setup_rs_unit(GLcontext *ctx)
1151 r300ContextPtr r300 = R300_CONTEXT(ctx);
1154 /* This needs to be rewritten - it is a hack at best */
1156 R300_STATECHANGE(r300, ri);
1157 R300_STATECHANGE(r300, rc);
1158 R300_STATECHANGE(r300, rr);
1160 for(i = 1; i <= 8; ++i)
1161 r300->hw.ri.cmd[i] = 0x00d10000;
1162 r300->hw.ri.cmd[R300_RI_INTERP_1] |= R300_RS_INTERP_1_UNKNOWN;
1163 r300->hw.ri.cmd[R300_RI_INTERP_2] |= R300_RS_INTERP_2_UNKNOWN;
1164 r300->hw.ri.cmd[R300_RI_INTERP_3] |= R300_RS_INTERP_3_UNKNOWN;
1167 for(i = 2; i <= 8; ++i)
1168 r300->hw.ri.cmd[i] |= 4;
1171 for(i = 1; i <= 8; ++i)
1172 r300->hw.rr.cmd[i] = 0;
1173 /* textures enabled ? */
1174 if(r300->state.texture.tc_count>0){
1176 /* This code only really works with one set of texture coordinates */
1178 /* The second constant is needed to get glxgears display anything .. */
1179 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7
1180 | R300_RS_CNTL_0_UNKNOWN_18
1181 | (r300->state.texture.tc_count<<R300_RS_CNTL_TC_CNT_SHIFT);
1182 r300->hw.rc.cmd[2] = 0xc0;
1185 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1186 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x24008;
1190 /* The second constant is needed to get glxgears display anything .. */
1191 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7 | R300_RS_CNTL_0_UNKNOWN_18;
1192 r300->hw.rc.cmd[2] = 0;
1194 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1195 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x4000;
1200 #define vpucount(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count)
1202 #define bump_vpu_count(ptr, new_count) do{\
1203 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1204 int _nc=(new_count)/4; \
1205 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1208 void static inline setup_vertex_shader_fragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1212 if(vsf->length==0)return;
1214 if(vsf->length & 0x3){
1215 fprintf(stderr,"VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1219 switch((dest>>8) & 0xf){
1221 R300_STATECHANGE(r300, vpi);
1222 for(i=0;i<vsf->length;i++)
1223 r300->hw.vpi.cmd[R300_VPI_INSTR_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1224 bump_vpu_count(r300->hw.vpi.cmd, vsf->length+4*(dest & 0xff));
1228 R300_STATECHANGE(r300, vpp);
1229 for(i=0;i<vsf->length;i++)
1230 r300->hw.vpp.cmd[R300_VPP_PARAM_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1231 bump_vpu_count(r300->hw.vpp.cmd, vsf->length+4*(dest & 0xff));
1234 R300_STATECHANGE(r300, vps);
1235 for(i=0;i<vsf->length;i++)
1236 r300->hw.vps.cmd[1+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1237 bump_vpu_count(r300->hw.vps.cmd, vsf->length+4*(dest & 0xff));
1240 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1246 void r300SetupVertexShader(r300ContextPtr rmesa)
1248 GLcontext* ctx = rmesa->radeon.glCtx;
1250 /* Reset state, in case we don't use something */
1251 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1252 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1253 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1256 /* This needs to be replaced by vertex shader generation code */
1259 /* textures enabled ? */
1260 if(rmesa->state.texture.tc_count>0){
1261 rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER;
1263 rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER;
1267 rmesa->state.vertex_shader.matrix[0].length=16;
1268 memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
1270 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->state.vertex_shader.program));
1272 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->state.vertex_shader.matrix[0]));
1274 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX1, &(rmesa->state.vertex_shader.matrix[0]));
1275 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX2, &(rmesa->state.vertex_shader.matrix[0]));
1277 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR0, &(rmesa->state.vertex_shader.vector[0]));
1278 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR1, &(rmesa->state.vertex_shader.vector[1]));
1282 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1283 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1286 R300_STATECHANGE(rmesa, pvs);
1287 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(rmesa->state.vertex_shader.program_start << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1288 | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1289 | (rmesa->state.vertex_shader.program_end << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1290 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(rmesa->state.vertex_shader.param_offset << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1291 | (rmesa->state.vertex_shader.param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1292 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(rmesa->state.vertex_shader.unknown_ptr2 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1293 | (rmesa->state.vertex_shader.unknown_ptr3 << 0);
1295 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1296 so I leave it as a reminder */
1298 reg_start(R300_VAP_PVS_WAITIDLE,0);
1303 void r300SetupVertexProgram(r300ContextPtr rmesa)
1305 GLcontext* ctx = rmesa->radeon.glCtx;
1307 /* Reset state, in case we don't use something */
1308 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1309 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1310 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1313 /* This needs to be replaced by vertex shader generation code */
1316 /* textures enabled ? */
1317 if(rmesa->state.texture.tc_count>0){
1318 rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER;
1320 rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER;
1324 rmesa->state.vertex_shader.matrix[0].length=16;
1325 memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
1328 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->current_vp->program));
1330 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->current_vp->params));
1333 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1334 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1337 R300_STATECHANGE(rmesa, pvs);
1338 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1339 | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1340 | (rmesa->current_vp->program.length/4 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1341 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1342 | (rmesa->current_vp->params.length/4 << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1343 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(0/*rmesa->state.vertex_shader.unknown_ptr2*/ << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1344 | (rmesa->current_vp->program.length/4/*rmesa->state.vertex_shader.unknown_ptr3*/ << 0);
1346 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1347 so I leave it as a reminder */
1349 reg_start(R300_VAP_PVS_WAITIDLE,0);
1354 void r300SetupPixelShader(r300ContextPtr rmesa)
1358 /* This needs to be replaced by pixel shader generation code */
1360 /* textures enabled ? */
1361 if(rmesa->state.texture.tc_count>0){
1362 rmesa->state.pixel_shader=SINGLE_TEXTURE_PIXEL_SHADER;
1364 rmesa->state.pixel_shader=FLAT_COLOR_PIXEL_SHADER;
1367 R300_STATECHANGE(rmesa, fpt);
1368 for(i=0;i<rmesa->state.pixel_shader.program.tex.length;i++)
1369 rmesa->hw.fpt.cmd[R300_FPT_INSTR_0+i]=rmesa->state.pixel_shader.program.tex.inst[i];
1370 rmesa->hw.fpt.cmd[R300_FPT_CMD_0]=cmducs(R300_PFS_TEXI_0, rmesa->state.pixel_shader.program.tex.length);
1372 #define OUTPUT_FIELD(st, reg, field) \
1373 R300_STATECHANGE(rmesa, st); \
1374 for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \
1375 rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rmesa->state.pixel_shader.program.alu.inst[i].field;\
1376 rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmducs(reg, rmesa->state.pixel_shader.program.alu.length);
1378 OUTPUT_FIELD(fpi[0], R300_PFS_INSTR0_0, inst0);
1379 OUTPUT_FIELD(fpi[1], R300_PFS_INSTR1_0, inst1);
1380 OUTPUT_FIELD(fpi[2], R300_PFS_INSTR2_0, inst2);
1381 OUTPUT_FIELD(fpi[3], R300_PFS_INSTR3_0, inst3);
1384 R300_STATECHANGE(rmesa, fp);
1386 rmesa->hw.fp.cmd[R300_FP_NODE0+i]=
1387 (rmesa->state.pixel_shader.program.node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT)
1388 | (rmesa->state.pixel_shader.program.node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT)
1389 | (rmesa->state.pixel_shader.program.node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT)
1390 | (rmesa->state.pixel_shader.program.node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT)
1391 | ( (i==3) ? R300_PFS_NODE_LAST_NODE : 0);
1395 rmesa->hw.fp.cmd[R300_FP_CNTL0]=
1396 (rmesa->state.pixel_shader.program.active_nodes-1)
1397 | (rmesa->state.pixel_shader.program.first_node_has_tex<<3);
1399 rmesa->hw.fp.cmd[R300_FP_CNTL1]=rmesa->state.pixel_shader.program.temp_register_count;
1401 rmesa->hw.fp.cmd[R300_FP_CNTL2]=
1402 (rmesa->state.pixel_shader.program.alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT)
1403 | (rmesa->state.pixel_shader.program.alu_end << R300_PFS_CNTL_ALU_END_SHIFT)
1404 | (rmesa->state.pixel_shader.program.tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT)
1405 | (rmesa->state.pixel_shader.program.tex_end << R300_PFS_CNTL_TEX_END_SHIFT);
1407 R300_STATECHANGE(rmesa, fpp);
1408 for(i=0;i<rmesa->state.pixel_shader.param_length;i++){
1409 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+0]=r300PackFloat32(rmesa->state.pixel_shader.param[i].x);
1410 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+1]=r300PackFloat32(rmesa->state.pixel_shader.param[i].y);
1411 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+2]=r300PackFloat32(rmesa->state.pixel_shader.param[i].z);
1412 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+3]=r300PackFloat32(rmesa->state.pixel_shader.param[i].w);
1414 rmesa->hw.fpp.cmd[R300_FPP_CMD_0]=cmducs(R300_PFS_PARAM_0_X, rmesa->state.pixel_shader.param_length);
1419 * Called by Mesa after an internal state update.
1421 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
1423 r300ContextPtr r300 = R300_CONTEXT(ctx);
1425 _swrast_InvalidateState(ctx, new_state);
1426 _swsetup_InvalidateState(ctx, new_state);
1427 _ac_InvalidateState(ctx, new_state);
1428 _tnl_InvalidateState(ctx, new_state);
1429 _ae_invalidate_state(ctx, new_state);
1431 /* Go inefficiency! */
1432 r300ResetHwState(r300);
1437 * Completely recalculates hardware state based on the Mesa state.
1439 void r300ResetHwState(r300ContextPtr r300)
1441 GLcontext* ctx = r300->radeon.glCtx;
1444 if (RADEON_DEBUG & DEBUG_STATE)
1445 fprintf(stderr, "%s\n", __FUNCTION__);
1447 /* This is a place to initialize registers which
1448 have bitfields accessed by different functions
1449 and not all bits are used */
1451 r300->hw.zs.cmd[R300_ZS_CNTL_0] = 0;
1452 r300->hw.zs.cmd[R300_ZS_CNTL_1] = 0;
1453 r300->hw.zs.cmd[R300_ZS_CNTL_2] = 0xffff00;
1456 /* go and compute register values from GL state */
1458 r300UpdateWindow(ctx);
1461 ctx->Color.ColorMask[RCOMP],
1462 ctx->Color.ColorMask[GCOMP],
1463 ctx->Color.ColorMask[BCOMP],
1464 ctx->Color.ColorMask[ACOMP]);
1466 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
1467 r300DepthMask(ctx, ctx->Depth.Mask);
1468 r300DepthFunc(ctx, ctx->Depth.Func);
1470 r300UpdateCulling(ctx);
1472 r300_setup_routing(ctx, GL_TRUE);
1474 r300UpdateTextureState(ctx);
1475 r300_setup_textures(ctx);
1476 r300_setup_rs_unit(ctx);
1478 r300SetupVertexShader(r300);
1479 r300SetupPixelShader(r300);
1481 r300_set_blend_state(ctx);
1482 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
1484 /* Initialize magic registers
1485 TODO : learn what they really do, or get rid of
1486 those we don't have to touch */
1487 r300->hw.unk2080.cmd[1] = 0x0030045A;
1489 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
1490 | R300_VPORT_X_OFFSET_ENA
1491 | R300_VPORT_Y_SCALE_ENA
1492 | R300_VPORT_Y_OFFSET_ENA
1493 | R300_VPORT_Z_SCALE_ENA
1494 | R300_VPORT_Z_OFFSET_ENA
1496 r300->hw.vte.cmd[2] = 0x00000008;
1498 r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
1499 r300->hw.unk2134.cmd[2] = 0x00000000;
1501 r300->hw.unk2140.cmd[1] = 0x00000000;
1503 #if 0 /* Done in setup routing */
1504 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = 1;
1505 r300->hw.vir[0].cmd[1] = 0x21030003;
1507 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = 1;
1508 r300->hw.vir[1].cmd[1] = 0xF688F688;
1510 r300->hw.vic.cmd[R300_VIR_CNTL_0] = 0x00000001;
1511 r300->hw.vic.cmd[R300_VIR_CNTL_1] = 0x00000405;
1514 r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA;
1516 r300->hw.unk221C.cmd[1] = R300_221C_NORMAL;
1518 r300->hw.unk2220.cmd[1] = r300PackFloat32(1.0);
1519 r300->hw.unk2220.cmd[2] = r300PackFloat32(1.0);
1520 r300->hw.unk2220.cmd[3] = r300PackFloat32(1.0);
1521 r300->hw.unk2220.cmd[4] = r300PackFloat32(1.0);
1523 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1524 r300->hw.unk2288.cmd[1] = R300_2288_R300;
1526 r300->hw.unk2288.cmd[1] = R300_2288_RV350;
1529 r300->hw.vof.cmd[R300_VOF_CNTL_0] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
1530 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
1531 r300->hw.vof.cmd[R300_VOF_CNTL_1] = 0; /* no textures */
1534 r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0;
1535 r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0;
1536 r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0;
1539 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
1540 | R300_GB_LINE_STUFF_ENABLE
1541 | R300_GB_TRIANGLE_STUFF_ENABLE;
1543 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
1544 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
1545 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1546 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1547 | R300_GB_TILE_PIPE_COUNT_R300
1548 | R300_GB_TILE_SIZE_16;
1550 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1551 | R300_GB_TILE_PIPE_COUNT_RV300
1552 | R300_GB_TILE_SIZE_16;
1553 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0x00000000;
1554 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = 0x00000000; /* No antialiasing */
1556 //r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;
1558 r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0);
1559 r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0);
1560 r300->hw.unk4200.cmd[3] = r300PackFloat32(1.0);
1561 r300->hw.unk4200.cmd[4] = r300PackFloat32(1.0);
1563 r300->hw.unk4214.cmd[1] = 0x00050005;
1565 r300->hw.ps.cmd[R300_PS_POINTSIZE] = (6 << R300_POINTSIZE_X_SHIFT) |
1566 (6 << R300_POINTSIZE_Y_SHIFT);
1568 r300->hw.unk4230.cmd[1] = 0x01800000;
1569 r300->hw.unk4230.cmd[2] = 0x00020006;
1570 r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0);
1572 r300->hw.unk4260.cmd[1] = 0;
1573 r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0);
1574 r300->hw.unk4260.cmd[3] = r300PackFloat32(1.0);
1576 r300->hw.unk4274.cmd[1] = 0x00000002;
1577 r300->hw.unk4274.cmd[2] = 0x0003AAAA;
1578 r300->hw.unk4274.cmd[3] = 0x00000000;
1579 r300->hw.unk4274.cmd[4] = 0x00000000;
1581 r300->hw.unk4288.cmd[1] = 0x00000000;
1582 r300->hw.unk4288.cmd[2] = 0x00000001;
1583 r300->hw.unk4288.cmd[3] = 0x00000000;
1584 r300->hw.unk4288.cmd[4] = 0x00000000;
1585 r300->hw.unk4288.cmd[5] = 0x00000000;
1587 r300->hw.unk42A0.cmd[1] = 0x00000000;
1589 r300->hw.unk42B4.cmd[1] = 0x00000000;
1591 r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
1592 r300->hw.unk42C0.cmd[2] = 0x00000000;
1595 r300->hw.unk43A4.cmd[1] = 0x0000001C;
1596 r300->hw.unk43A4.cmd[2] = 0x2DA49525;
1598 r300->hw.unk43E8.cmd[1] = 0x00FFFFFF;
1601 r300->hw.fp.cmd[R300_FP_CNTL0] = 0;
1602 r300->hw.fp.cmd[R300_FP_CNTL1] = 0;
1603 r300->hw.fp.cmd[R300_FP_CNTL2] = 0;
1604 r300->hw.fp.cmd[R300_FP_NODE0] = 0;
1605 r300->hw.fp.cmd[R300_FP_NODE1] = 0;
1606 r300->hw.fp.cmd[R300_FP_NODE2] = 0;
1607 r300->hw.fp.cmd[R300_FP_NODE3] = 0;
1610 r300->hw.unk46A4.cmd[1] = 0x00001B01;
1611 r300->hw.unk46A4.cmd[2] = 0x00001B0F;
1612 r300->hw.unk46A4.cmd[3] = 0x00001B0F;
1613 r300->hw.unk46A4.cmd[4] = 0x00001B0F;
1614 r300->hw.unk46A4.cmd[5] = 0x00000001;
1617 for(i = 1; i <= 64; ++i) {
1618 /* create NOP instructions */
1619 r300->hw.fpi[0].cmd[i] = FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO));
1620 r300->hw.fpi[1].cmd[i] = FP_SELC(0,XYZ,NO,FP_TMP(0),0,0);
1621 r300->hw.fpi[2].cmd[i] = FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO));
1622 r300->hw.fpi[3].cmd[i] = FP_SELA(0,W,NO,FP_TMP(0),0,0);
1626 r300->hw.unk4BC0.cmd[1] = 0;
1628 r300->hw.unk4BC8.cmd[1] = 0;
1629 r300->hw.unk4BC8.cmd[2] = 0;
1630 r300->hw.unk4BC8.cmd[3] = 0;
1633 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
1636 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
1637 r300->hw.unk4BD8.cmd[1] = 0;
1639 r300->hw.unk4E00.cmd[1] = 0;
1642 r300->hw.bld.cmd[R300_BLD_CBLEND] = 0;
1643 r300->hw.bld.cmd[R300_BLD_ABLEND] = 0;
1646 r300->hw.unk4E10.cmd[1] = 0;
1647 r300->hw.unk4E10.cmd[2] = 0;
1648 r300->hw.unk4E10.cmd[3] = 0;
1650 r300->hw.cb.cmd[R300_CB_OFFSET] =
1651 r300->radeon.radeonScreen->backOffset +
1652 r300->radeon.radeonScreen->fbLocation;
1653 r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.radeonScreen->backPitch
1654 | R300_COLOR_UNKNOWN_22_23;
1656 r300->hw.unk4E50.cmd[1] = 0;
1657 r300->hw.unk4E50.cmd[2] = 0;
1658 r300->hw.unk4E50.cmd[3] = 0;
1659 r300->hw.unk4E50.cmd[4] = 0;
1660 r300->hw.unk4E50.cmd[5] = 0;
1661 r300->hw.unk4E50.cmd[6] = 0;
1662 r300->hw.unk4E50.cmd[7] = 0;
1663 r300->hw.unk4E50.cmd[8] = 0;
1664 r300->hw.unk4E50.cmd[9] = 0;
1666 r300->hw.unk4E88.cmd[1] = 0;
1668 r300->hw.unk4EA0.cmd[1] = 0x00000000;
1669 r300->hw.unk4EA0.cmd[2] = 0xffffffff;
1671 r300->hw.unk4F10.cmd[1] = 0x00000002; // depthbuffer format?
1672 r300->hw.unk4F10.cmd[2] = 0x00000000;
1673 r300->hw.unk4F10.cmd[3] = 0x00000003;
1674 r300->hw.unk4F10.cmd[4] = 0x00000000;
1676 /* experiment a bit */
1677 r300->hw.unk4F10.cmd[2] = 0x00000001; // depthbuffer format?
1679 r300->hw.zb.cmd[R300_ZB_OFFSET] =
1680 r300->radeon.radeonScreen->depthOffset +
1681 r300->radeon.radeonScreen->fbLocation;
1682 r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
1684 r300->hw.unk4F28.cmd[1] = 0;
1686 r300->hw.unk4F30.cmd[1] = 0;
1687 r300->hw.unk4F30.cmd[2] = 0;
1689 r300->hw.unk4F44.cmd[1] = 0;
1691 r300->hw.unk4F54.cmd[1] = 0;
1694 ((drm_r300_cmd_header_t*)r300->hw.vpi.cmd)->vpu.count = 0;
1695 for(i = 1; i < R300_VPI_CMDSIZE; i += 4) {
1697 r300->hw.vpi.cmd[i+0] = VP_OUT(ADD,TMP,0,XYZW);
1698 r300->hw.vpi.cmd[i+1] = VP_IN(TMP,0);
1699 r300->hw.vpi.cmd[i+2] = VP_ZERO();
1700 r300->hw.vpi.cmd[i+3] = VP_ZERO();
1703 ((drm_r300_cmd_header_t*)r300->hw.vpp.cmd)->vpu.count = 0;
1704 for(i = 1; i < R300_VPP_CMDSIZE; ++i)
1705 r300->hw.vpp.cmd[i] = 0;
1708 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
1709 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
1710 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
1711 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
1715 r300->hw.all_dirty = GL_TRUE;
1721 * Calculate initial hardware state and register state functions.
1722 * Assumes that the command buffer and state atoms have been
1723 * initialized already.
1725 void r300InitState(r300ContextPtr r300)
1727 GLcontext *ctx = r300->radeon.glCtx;
1730 radeonInitState(&r300->radeon);
1732 switch (ctx->Visual.depthBits) {
1734 r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
1735 depth_fmt = R200_DEPTH_FORMAT_16BIT_INT_Z;
1736 //r300->state.stencil.clear = 0x00000000;
1739 r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
1740 depth_fmt = R200_DEPTH_FORMAT_24BIT_INT_Z;
1741 //r300->state.stencil.clear = 0xff000000;
1744 fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
1745 ctx->Visual.depthBits);
1749 /* Only have hw stencil when depth buffer is 24 bits deep */
1750 r300->state.hw_stencil = (ctx->Visual.stencilBits > 0 &&
1751 ctx->Visual.depthBits == 24);
1753 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
1755 r300ResetHwState(r300);
1761 * Initialize driver's state callback functions
1763 void r300InitStateFuncs(struct dd_function_table* functions)
1765 radeonInitStateFuncs(functions);
1767 functions->UpdateState = r300InvalidateState;
1768 functions->AlphaFunc = r300AlphaFunc;
1769 functions->BlendColor = r300BlendColor;
1770 functions->BlendEquationSeparate = r300BlendEquationSeparate;
1771 functions->BlendFuncSeparate = r300BlendFuncSeparate;
1772 functions->Enable = r300Enable;
1773 functions->ColorMask = r300ColorMask;
1774 functions->DepthFunc = r300DepthFunc;
1775 functions->DepthMask = r300DepthMask;
1776 functions->CullFace = r300CullFace;
1777 functions->FrontFace = r300FrontFace;
1779 /* Stencil related */
1780 functions->ClearStencil = r300ClearStencil;
1781 functions->StencilFunc = r300StencilFunc;
1782 functions->StencilMask = r300StencilMask;
1783 functions->StencilOp = r300StencilOp;
1785 /* Viewport related */
1786 functions->Viewport = r300Viewport;
1787 functions->DepthRange = r300DepthRange;
1788 functions->PointSize = r300PointSize;