2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
34 * Nicolai Haehnle <prefect_@gmx.net>
44 #include "simple_list.h"
46 #include "api_arrayelt.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
51 #include "texformat.h"
53 #include "radeon_ioctl.h"
54 #include "radeon_state.h"
55 #include "r300_context.h"
56 #include "r300_ioctl.h"
57 #include "r300_state.h"
59 #include "r300_program.h"
60 #include "r300_emit.h"
61 #include "r300_fixed_pipelines.h"
64 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
66 r300ContextPtr rmesa = R300_CONTEXT(ctx);
67 int pp_misc = rmesa->hw.at.cmd[R300_AT_ALPHA_TEST];
70 CLAMPED_FLOAT_TO_UBYTE(refByte, ref);
72 R300_STATECHANGE(rmesa, at);
74 pp_misc &= ~(R300_ALPHA_TEST_OP_MASK | R300_REF_ALPHA_MASK);
75 pp_misc |= (refByte & R300_REF_ALPHA_MASK);
79 pp_misc |= R300_ALPHA_TEST_FAIL;
82 pp_misc |= R300_ALPHA_TEST_LESS;
85 pp_misc |= R300_ALPHA_TEST_EQUAL;
88 pp_misc |= R300_ALPHA_TEST_LEQUAL;
91 pp_misc |= R300_ALPHA_TEST_GREATER;
94 pp_misc |= R300_ALPHA_TEST_NEQUAL;
97 pp_misc |= R300_ALPHA_TEST_GEQUAL;
100 pp_misc |= R300_ALPHA_TEST_PASS;
104 rmesa->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
107 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
110 r300ContextPtr rmesa = R300_CONTEXT(ctx);
111 fprintf(stderr, "%s:%s is not implemented yet. Fixme !\n", __FILE__, __FUNCTION__);
113 R200_STATECHANGE(rmesa, ctx);
114 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
115 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
116 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
117 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
118 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor)
119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] =
120 radeonPackColor(4, color[0], color[1], color[2], color[3]);
125 * Calculate the hardware blend factor setting. This same function is used
126 * for source and destination of both alpha and RGB.
129 * The hardware register value for the specified blend factor. This value
130 * will need to be shifted into the correct position for either source or
131 * destination factor.
134 * Since the two cases where source and destination are handled differently
135 * are essentially error cases, they should never happen. Determine if these
136 * cases can be removed.
138 static int blend_factor(GLenum factor, GLboolean is_src)
144 func = R200_BLEND_GL_ZERO;
147 func = R200_BLEND_GL_ONE;
150 func = R200_BLEND_GL_DST_COLOR;
152 case GL_ONE_MINUS_DST_COLOR:
153 func = R200_BLEND_GL_ONE_MINUS_DST_COLOR;
156 func = R200_BLEND_GL_SRC_COLOR;
158 case GL_ONE_MINUS_SRC_COLOR:
159 func = R200_BLEND_GL_ONE_MINUS_SRC_COLOR;
162 func = R200_BLEND_GL_SRC_ALPHA;
164 case GL_ONE_MINUS_SRC_ALPHA:
165 func = R200_BLEND_GL_ONE_MINUS_SRC_ALPHA;
168 func = R200_BLEND_GL_DST_ALPHA;
170 case GL_ONE_MINUS_DST_ALPHA:
171 func = R200_BLEND_GL_ONE_MINUS_DST_ALPHA;
173 case GL_SRC_ALPHA_SATURATE:
175 (is_src) ? R200_BLEND_GL_SRC_ALPHA_SATURATE :
178 case GL_CONSTANT_COLOR:
179 func = R200_BLEND_GL_CONST_COLOR;
181 case GL_ONE_MINUS_CONSTANT_COLOR:
182 func = R200_BLEND_GL_ONE_MINUS_CONST_COLOR;
184 case GL_CONSTANT_ALPHA:
185 func = R200_BLEND_GL_CONST_ALPHA;
187 case GL_ONE_MINUS_CONSTANT_ALPHA:
188 func = R200_BLEND_GL_ONE_MINUS_CONST_ALPHA;
191 func = (is_src) ? R200_BLEND_GL_ONE : R200_BLEND_GL_ZERO;
197 * Sets both the blend equation and the blend function.
198 * This is done in a single
199 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
200 * change the interpretation of the blend function.
201 * Also, make sure that blend function and blend equation are set to their default
202 * value if color blending is not enabled, since at least blend equations GL_MIN
203 * and GL_FUNC_REVERSE_SUBTRACT will cause wrong results otherwise for
207 /* helper function */
208 static void r300_set_blend_cntl(r300ContextPtr rmesa, int func, int eqn, int cbits, int funcA, int eqnA)
210 GLuint new_ablend, new_cblend;
213 fprintf(stderr, "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n", eqnA, funcA, eqn, func, cbits);
215 new_ablend = eqnA | funcA;
216 new_cblend = eqn | func;
218 new_cblend |= R300_BLEND_NO_SEPARATE;
222 if((new_ablend != rmesa->hw.bld.cmd[R300_BLD_ABLEND])
223 || (new_cblend != rmesa->hw.bld.cmd[R300_BLD_CBLEND])){
224 R300_STATECHANGE(rmesa, bld);
225 rmesa->hw.bld.cmd[R300_BLD_ABLEND]=new_ablend;
226 rmesa->hw.bld.cmd[R300_BLD_CBLEND]=new_cblend;
230 static void r300_set_blend_state(GLcontext * ctx)
232 r300ContextPtr rmesa = R300_CONTEXT(ctx);
234 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
235 ~(R300_ROP_ENABLE | R300_ALPHA_BLEND_ENABLE |
236 R300_SEPARATE_ALPHA_ENABLE);
239 int func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
240 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
241 int eqn = R200_COMB_FCN_ADD_CLAMP;
242 int funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
243 (R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT);
244 int eqnA = R200_COMB_FCN_ADD_CLAMP;
247 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
248 if (ctx->Color._LogicOpEnabled) {
250 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
251 cntl | R300_ROP_ENABLE;
253 r300_set_blend_cntl(rmesa,
257 } else if (ctx->Color.BlendEnabled) {
259 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
260 cntl | R300_ALPHA_BLEND_ENABLE |
261 R300_SEPARATE_ALPHA_ENABLE;
265 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
267 r300_set_blend_cntl(rmesa,
273 if (ctx->Color._LogicOpEnabled) {
275 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
276 cntl | R300_ROP_ENABLE;
277 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
280 } else if (ctx->Color.BlendEnabled) {
282 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] =
283 cntl | R300_ALPHA_BLEND_ENABLE;
287 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl;
288 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
290 r300_set_blend_cntl(rmesa,
298 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
299 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
301 R200_DST_BLEND_SHIFT);
303 switch (ctx->Color.BlendEquationRGB) {
305 eqn = R300_COMB_FCN_ADD_CLAMP;
308 case GL_FUNC_SUBTRACT:
309 eqn = R300_COMB_FCN_SUB_CLAMP;
312 case GL_FUNC_REVERSE_SUBTRACT:
313 eqn = R200_COMB_FCN_RSUB_CLAMP;
317 eqn = R200_COMB_FCN_MIN;
318 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
319 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
323 eqn = R200_COMB_FCN_MAX;
324 func = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
325 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
330 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
331 __func__, __LINE__, ctx->Color.BlendEquationRGB);
335 if (!rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
337 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
343 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
344 R200_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
346 R200_DST_BLEND_SHIFT);
348 switch (ctx->Color.BlendEquationA) {
350 eqnA = R300_COMB_FCN_ADD_CLAMP;
353 case GL_FUNC_SUBTRACT:
354 eqnA = R300_COMB_FCN_SUB_CLAMP;
357 case GL_FUNC_REVERSE_SUBTRACT:
358 eqnA = R200_COMB_FCN_RSUB_CLAMP;
362 eqnA = R200_COMB_FCN_MIN;
363 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
364 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
368 eqnA = R200_COMB_FCN_MAX;
369 funcA = (R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
370 (R200_BLEND_GL_ONE << R200_DST_BLEND_SHIFT);
374 fprintf(stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n",
375 __func__, __LINE__, ctx->Color.BlendEquationA);
379 r300_set_blend_cntl(rmesa,
380 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
382 r300_set_blend_cntl(rmesa,
383 func, eqn, R300_BLEND_UNKNOWN | R300_BLEND_ENABLE,
387 static void r300BlendEquationSeparate(GLcontext * ctx,
388 GLenum modeRGB, GLenum modeA)
390 r300_set_blend_state(ctx);
393 static void r300BlendFuncSeparate(GLcontext * ctx,
394 GLenum sfactorRGB, GLenum dfactorRGB,
395 GLenum sfactorA, GLenum dfactorA)
397 r300_set_blend_state(ctx);
401 * Update our tracked culling state based on Mesa's state.
403 static void r300UpdateCulling(GLcontext* ctx)
405 r300ContextPtr r300 = R300_CONTEXT(ctx);
408 R300_STATECHANGE(r300, cul);
409 if (ctx->Polygon.CullFlag) {
410 if (ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK)
411 val = R300_CULL_FRONT|R300_CULL_BACK;
412 else if (ctx->Polygon.CullFaceMode == GL_FRONT)
413 val = R300_CULL_FRONT;
415 val = R300_CULL_BACK;
417 if (ctx->Polygon.FrontFace == GL_CW)
418 val |= R300_FRONT_FACE_CW;
420 val |= R300_FRONT_FACE_CCW;
423 r300->hw.cul.cmd[R300_CUL_CULL] = val;
428 * Handle glEnable()/glDisable().
430 * \note Mesa already filters redundant calls to glEnable/glDisable.
432 static void r300Enable(GLcontext* ctx, GLenum cap, GLboolean state)
434 r300ContextPtr r300 = R300_CONTEXT(ctx);
437 if (RADEON_DEBUG & DEBUG_STATE)
438 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
439 _mesa_lookup_enum_by_nr(cap),
440 state ? "GL_TRUE" : "GL_FALSE");
443 /* Fast track this one...
451 R200_STATECHANGE(r300, at);
453 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
454 R300_ALPHA_TEST_ENABLE;
456 r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
457 ~R300_ALPHA_TEST_ENABLE;
462 case GL_COLOR_LOGIC_OP:
463 r300_set_blend_state(ctx);
467 R300_STATECHANGE(r300, zs);
471 newval = R300_RB3D_Z_TEST_AND_WRITE;
473 newval = R300_RB3D_Z_TEST;
477 r300->hw.zs.cmd[R300_ZS_CNTL_0] = newval;
480 case GL_STENCIL_TEST:
483 static int stencil=1;
485 fprintf(stderr, "%s:%s - do not know how to enable stencil. Help me !\n",
486 __FILE__, __FUNCTION__);
491 if (r300->state.hw_stencil) {
492 //fprintf(stderr, "Stencil %s\n", state ? "enabled" : "disabled");
493 R300_STATECHANGE(r300, zs);
495 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
496 R300_RB3D_STENCIL_ENABLE;
498 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
499 ~R300_RB3D_STENCIL_ENABLE;
502 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
507 r300UpdateCulling(ctx);
509 case GL_VERTEX_PROGRAM_ARB:
510 //TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, state);
514 radeonEnable(ctx, cap, state);
521 * Change the culling mode.
523 * \note Mesa already filters redundant calls to this function.
525 static void r300CullFace(GLcontext* ctx, GLenum mode)
529 r300UpdateCulling(ctx);
534 * Change the polygon orientation.
536 * \note Mesa already filters redundant calls to this function.
538 static void r300FrontFace(GLcontext* ctx, GLenum mode)
542 r300UpdateCulling(ctx);
547 * Change the depth testing function.
549 * \note Mesa already filters redundant calls to this function.
551 static void r300DepthFunc(GLcontext* ctx, GLenum func)
553 r300ContextPtr r300 = R300_CONTEXT(ctx);
555 R300_STATECHANGE(r300, zs);
557 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
561 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NEVER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
564 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LESS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
567 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_EQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
570 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_LEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
573 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GREATER << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
576 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_NOTEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
579 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_GEQUAL << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
582 r300->hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
590 * Enable/Disable depth writing.
592 * \note Mesa already filters redundant calls to this function.
594 static void r300DepthMask(GLcontext* ctx, GLboolean mask)
596 r300ContextPtr r300 = R300_CONTEXT(ctx);
598 if (!ctx->Depth.Test)
601 R300_STATECHANGE(r300, zs);
602 r300->hw.zs.cmd[R300_ZS_CNTL_0] = mask
603 ? R300_RB3D_Z_TEST_AND_WRITE : R300_RB3D_Z_TEST;
608 * Handle glColorMask()
610 static void r300ColorMask(GLcontext* ctx,
611 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
613 r300ContextPtr r300 = R300_CONTEXT(ctx);
614 int mask = (b << 0) | (g << 1) | (r << 2) | (a << 3);
616 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
617 R300_STATECHANGE(r300, cmk);
618 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
622 /* =============================================================
625 static void r300PointSize(GLcontext * ctx, GLfloat size)
627 r300ContextPtr r300 = R300_CONTEXT(ctx);
629 /* This might need fixing later */
630 R300_STATECHANGE(r300, vps);
631 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
633 /* =============================================================
637 static int translate_stencil_func(int func)
641 return R300_ZS_NEVER;
647 return R300_ZS_EQUAL;
650 return R300_ZS_LEQUAL;
653 return R300_ZS_GREATER;
656 return R300_ZS_NOTEQUAL;
659 return R300_ZS_GEQUAL;
662 return R300_ZS_ALWAYS;
668 static int translate_stencil_op(int op)
676 return R300_ZS_REPLACE;
681 case GL_INCR_WRAP_EXT:
682 return R300_ZS_INCR_WRAP;
683 case GL_DECR_WRAP_EXT:
684 return R300_ZS_DECR_WRAP;
686 return R300_ZS_INVERT;
690 static void r300StencilFunc(GLcontext * ctx, GLenum func,
691 GLint ref, GLuint mask)
693 r300ContextPtr rmesa = R300_CONTEXT(ctx);
694 GLuint refmask = ((ctx->Stencil.Ref[0] << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
696 ValueMask[0] << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
699 R200_STATECHANGE(rmesa, zs);
701 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(
702 (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
703 | (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT));
704 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~((R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
705 (R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
707 flag = translate_stencil_func(ctx->Stencil.Function[0]);
709 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |= (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
710 | (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT);
711 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
714 static void r300StencilMask(GLcontext * ctx, GLuint mask)
716 r300ContextPtr rmesa = R300_CONTEXT(ctx);
718 R200_STATECHANGE(rmesa, zs);
719 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &= ~(R300_ZS_MASK << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT);
720 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= ctx->Stencil.WriteMask[0] << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
724 static void r300StencilOp(GLcontext * ctx, GLenum fail,
725 GLenum zfail, GLenum zpass)
727 r300ContextPtr rmesa = R300_CONTEXT(ctx);
729 R200_STATECHANGE(rmesa, zs);
730 /* It is easier to mask what's left.. */
731 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= (R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
733 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
734 (translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT)
735 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT)
736 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT)
737 |(translate_stencil_op(ctx->Stencil.FailFunc[0]) << R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT)
738 |(translate_stencil_op(ctx->Stencil.ZFailFunc[0]) << R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT)
739 |(translate_stencil_op(ctx->Stencil.ZPassFunc[0]) << R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT);
743 static void r300ClearStencil(GLcontext * ctx, GLint s)
745 r300ContextPtr rmesa = R300_CONTEXT(ctx);
747 /* Not sure whether this is correct.. */
748 R200_STATECHANGE(rmesa, zs);
749 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] =
750 ((GLuint) ctx->Stencil.Clear |
751 (0xff << R200_STENCIL_MASK_SHIFT) |
752 (ctx->Stencil.WriteMask[0] << R200_STENCIL_WRITEMASK_SHIFT));
755 /* =============================================================
756 * Window position and viewport transformation
760 * To correctly position primitives:
762 #define SUBPIXEL_X 0.125
763 #define SUBPIXEL_Y 0.125
765 void r300UpdateWindow(GLcontext * ctx)
767 r300ContextPtr rmesa = R300_CONTEXT(ctx);
768 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
769 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
770 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
771 const GLfloat *v = ctx->Viewport._WindowMap.m;
773 GLfloat sx = v[MAT_SX];
774 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
775 GLfloat sy = -v[MAT_SY];
776 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
777 GLfloat sz = v[MAT_SZ] * rmesa->state.depth.scale;
778 GLfloat tz = v[MAT_TZ] * rmesa->state.depth.scale;
780 R300_FIREVERTICES(rmesa);
781 R300_STATECHANGE(rmesa, vpt);
783 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
784 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
785 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
786 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
787 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
788 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
791 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
792 GLsizei width, GLsizei height)
794 /* Don't pipeline viewport changes, conflict with window offset
795 * setting below. Could apply deltas to rescue pipelined viewport
796 * values, or keep the originals hanging around.
798 R200_FIREVERTICES(R200_CONTEXT(ctx));
799 r300UpdateWindow(ctx);
802 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
804 r300UpdateWindow(ctx);
807 /* Routing and texture-related */
809 void r300_setup_routing(GLcontext *ctx, GLboolean immediate)
811 int i, count=0,reg=0;
813 TNLcontext *tnl = TNL_CONTEXT(ctx);
814 struct vertex_buffer *VB = &tnl->vb;
815 r300ContextPtr r300 = R300_CONTEXT(ctx);
818 /* Stage 1 - input to VAP */
820 /* Assign register number automatically, retaining it in rmesa->state.reg */
822 /* Note: immediate vertex data includes all coordinates.
823 To save bandwidth use either VBUF or state-based vertex generation */
825 #define CONFIGURE_AOS(v, o, r, f) \
827 if (RADEON_DEBUG & DEBUG_STATE)fprintf(stderr, "Enabling "#r "\n"); \
829 r300->state.aos[count].element_size=4; \
830 r300->state.aos[count].stride=4; \
831 r300->state.aos[count].ncomponents=4; \
833 r300->state.aos[count].element_size=v->size; \
834 r300->state.aos[count].stride=v->size; \
835 r300->state.aos[count].ncomponents=v->size; \
837 r300->state.aos[count].offset=o; \
838 r300->state.aos[count].reg=reg; \
839 r300->state.aos[count].format=(f); \
840 r300->state.vap_reg.r=reg; \
845 /* All offsets are 0 - for use by immediate mode.
846 Should change later to handle vertex buffers */
847 if(r300->current_vp){
849 /* VERT_ATTRIB_WEIGHT, VERT_ATTRIB_SIX, VERT_ATTRIB_SEVEN, VERT_ATTRIB_GENERIC0,
850 VERT_ATTRIB_GENERIC1, VERT_ATTRIB_GENERIC2, VERT_ATTRIB_GENERIC3 */
852 if(r300->current_vp->inputs[VERT_ATTRIB_POS] != -1){
853 if(tnl->render_inputs & _TNL_BIT_POS){
854 reg=r300->current_vp->inputs[VERT_ATTRIB_POS];
855 CONFIGURE_AOS(VB->ObjPtr, 0, i_coords, AOS_FORMAT_FLOAT);
856 }else fprintf(stderr, "vp expects pos but none was given\n");
858 if(r300->current_vp->inputs[VERT_ATTRIB_NORMAL] != -1){
859 if(tnl->render_inputs & _TNL_BIT_NORMAL){
860 reg=r300->current_vp->inputs[VERT_ATTRIB_NORMAL];
861 CONFIGURE_AOS(VB->NormalPtr, 0, i_normal, AOS_FORMAT_FLOAT);
862 }else fprintf(stderr, "vp expects normal but none was given\n");
864 if(r300->current_vp->inputs[VERT_ATTRIB_COLOR0] != -1){
865 if(tnl->render_inputs & _TNL_BIT_COLOR0){
866 reg=r300->current_vp->inputs[VERT_ATTRIB_COLOR0];
867 CONFIGURE_AOS(VB->ColorPtr[0], 0, i_color[0], AOS_FORMAT_FLOAT_COLOR);
868 }else fprintf(stderr, "vp expects primary color but none was given\n");
870 if(r300->current_vp->inputs[VERT_ATTRIB_COLOR1] != -1){
871 if(tnl->render_inputs & _TNL_BIT_COLOR1){
872 reg=r300->current_vp->inputs[VERT_ATTRIB_COLOR1];
873 CONFIGURE_AOS(VB->SecondaryColorPtr[0], 0, i_color[1], AOS_FORMAT_FLOAT_COLOR);
874 }else fprintf(stderr, "vp expects secondary color but none was given\n");
876 if(r300->current_vp->inputs[VERT_ATTRIB_FOG] != -1){
877 if(tnl->render_inputs & _TNL_BIT_FOG){
878 reg=r300->current_vp->inputs[VERT_ATTRIB_FOG];
879 CONFIGURE_AOS(VB->FogCoordPtr, 0, i_fog, AOS_FORMAT_FLOAT);
880 }else fprintf(stderr, "vp expects fog but none was given\n");
882 for(i=0;i < ctx->Const.MaxTextureUnits;i++) // tex 7 is last
883 if(r300->current_vp->inputs[VERT_ATTRIB_TEX0+i] != -1){
884 if(tnl->render_inputs & (_TNL_BIT_TEX0<<i)){
885 reg=r300->current_vp->inputs[VERT_ATTRIB_TEX0+i];
886 CONFIGURE_AOS(VB->TexCoordPtr[i], 0, i_tex[i], AOS_FORMAT_FLOAT);
887 }else fprintf(stderr, "vp expects tex%d but none was given\n", i);
890 if((tnl->render_inputs & _TNL_BIT_INDEX))
891 CONFIGURE_AOS(VB->IndexPtr[0], 0, i_index, AOS_FORMAT_FLOAT);
893 if((tnl->render_inputs & _TNL_BIT_POINTSIZE))
894 CONFIGURE_AOS(VB->PointSizePtr, 0, i_pointsize, AOS_FORMAT_FLOAT);
898 if(tnl->render_inputs & _TNL_BIT_POS)
899 CONFIGURE_AOS(VB->ObjPtr, 0, i_coords, AOS_FORMAT_FLOAT);
900 if(tnl->render_inputs & _TNL_BIT_NORMAL)
901 CONFIGURE_AOS(VB->NormalPtr, 0, i_normal, AOS_FORMAT_FLOAT);
903 if(tnl->render_inputs & _TNL_BIT_COLOR0)
904 CONFIGURE_AOS(VB->ColorPtr[0], 0, i_color[0], AOS_FORMAT_FLOAT_COLOR);
905 if(tnl->render_inputs & _TNL_BIT_COLOR1)
906 CONFIGURE_AOS(VB->SecondaryColorPtr[0], 0, i_color[1], AOS_FORMAT_FLOAT_COLOR);
908 if(tnl->render_inputs & _TNL_BIT_FOG)
909 CONFIGURE_AOS(VB->FogCoordPtr, 0, i_fog, AOS_FORMAT_FLOAT);
911 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
912 if(tnl->render_inputs & (_TNL_BIT_TEX0<<i))
913 CONFIGURE_AOS(VB->TexCoordPtr[i], 0, i_tex[i], AOS_FORMAT_FLOAT);
915 if(tnl->render_inputs & _TNL_BIT_INDEX)
916 CONFIGURE_AOS(VB->IndexPtr[0], 0, i_index, AOS_FORMAT_FLOAT);
917 if(tnl->render_inputs & _TNL_BIT_POINTSIZE)
918 CONFIGURE_AOS(VB->PointSizePtr, 0, i_pointsize, AOS_FORMAT_FLOAT);
921 r300->state.aos_count=count;
923 if (RADEON_DEBUG & DEBUG_STATE)
924 fprintf(stderr, "aos_count=%d\n", count);
926 if(count>R300_MAX_AOS_ARRAYS){
927 fprintf(stderr, "Aieee ! AOS array count exceeded !\n");
933 /* setup INPUT_ROUTE */
934 R300_STATECHANGE(r300, vir[0]);
935 for(i=0;i+1<count;i+=2){
936 dw=(r300->state.aos[i].ncomponents-1)
937 | ((r300->state.aos[i].reg)<<8)
938 | (r300->state.aos[i].format<<14)
939 | (((r300->state.aos[i+1].ncomponents-1)
940 | ((r300->state.aos[i+1].reg)<<8)
941 | (r300->state.aos[i+1].format<<14))<<16);
946 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
949 dw=(r300->state.aos[count-1].ncomponents-1)
950 | (r300->state.aos[count-1].format<<14)
951 | ((r300->state.aos[count-1].reg)<<8)
953 r300->hw.vir[0].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
954 //fprintf(stderr, "vir0 dw=%08x\n", dw);
956 /* Set the rest of INPUT_ROUTE_0 to 0 */
957 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[0].cmd[R300_VIR_CNTL_0+i]=(0x0);
958 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = (count+1)>>1;
961 /* Mesa assumes that all missing components are from (0, 0, 0, 1) */
962 #define ALL_COMPONENTS ((R300_INPUT_ROUTE_SELECT_X<<R300_INPUT_ROUTE_X_SHIFT) \
963 | (R300_INPUT_ROUTE_SELECT_Y<<R300_INPUT_ROUTE_Y_SHIFT) \
964 | (R300_INPUT_ROUTE_SELECT_Z<<R300_INPUT_ROUTE_Z_SHIFT) \
965 | (R300_INPUT_ROUTE_SELECT_W<<R300_INPUT_ROUTE_W_SHIFT))
967 #define ALL_DEFAULT ((R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_X_SHIFT) \
968 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Y_SHIFT) \
969 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Z_SHIFT) \
970 | (R300_INPUT_ROUTE_SELECT_ONE<<R300_INPUT_ROUTE_W_SHIFT))
972 R300_STATECHANGE(r300, vir[1]);
974 for(i=0;i+1<count;i+=2){
976 mask=(1<<(r300->state.aos[i].ncomponents*3))-1;
977 dw=(ALL_COMPONENTS & mask)
978 | (ALL_DEFAULT & ~mask)
979 | R300_INPUT_ROUTE_ENABLE;
982 mask=(1<<(r300->state.aos[i+1].ncomponents*3))-1;
984 (ALL_COMPONENTS & mask)
985 | (ALL_DEFAULT & ~mask)
986 | R300_INPUT_ROUTE_ENABLE
989 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(i>>1)]=dw;
992 mask=(1<<(r300->state.aos[count-1].ncomponents*3))-1;
993 dw=(ALL_COMPONENTS & mask)
994 | (ALL_DEFAULT & ~mask)
995 | R300_INPUT_ROUTE_ENABLE;
996 r300->hw.vir[1].cmd[R300_VIR_CNTL_0+(count>>1)]=dw;
997 //fprintf(stderr, "vir1 dw=%08x\n", dw);
999 /* Set the rest of INPUT_ROUTE_1 to 0 */
1000 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[1].cmd[R300_VIR_CNTL_0+i]=0x0;
1001 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = (count+1)>>1;
1003 /* Set up input_cntl */
1005 R300_STATECHANGE(r300, vic);
1006 r300->hw.vic.cmd[R300_VIC_CNTL_0]=0x5555; /* Hard coded value, no idea what it means */
1008 r300->hw.vic.cmd[R300_VIC_CNTL_1]=R300_INPUT_CNTL_POS
1009 | R300_INPUT_CNTL_COLOR;
1011 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
1012 if(ctx->Texture.Unit[i].Enabled)
1013 r300->hw.vic.cmd[R300_VIC_CNTL_1]|=(R300_INPUT_CNTL_TC0<<i);
1015 /* Stage 3: VAP output */
1016 R300_STATECHANGE(r300, vof);
1017 r300->hw.vof.cmd[R300_VOF_CNTL_0]=R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
1018 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
1020 r300->hw.vof.cmd[R300_VOF_CNTL_1]=0;
1021 for(i=0;i < ctx->Const.MaxTextureUnits;i++)
1022 if(ctx->Texture.Unit[i].Enabled)
1023 r300->hw.vof.cmd[R300_VOF_CNTL_1]|=(4<<(3*i));
1027 static r300TexObj default_tex_obj={
1028 filter:R300_TX_MAG_FILTER_LINEAR | R300_TX_MIN_FILTER_LINEAR,
1030 size: (0xff << R300_TX_WIDTHMASK_SHIFT)
1031 | (0xff << R300_TX_HEIGHTMASK_SHIFT)
1032 | (0x8 << R300_TX_SIZE_SHIFT),
1039 /* there is probably a system to these value, but, for now,
1040 we just try by hand */
1042 static int inline translate_src(int src)
1051 case GL_PRIMARY_COLOR:
1068 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1069 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1070 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1071 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1072 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1073 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1074 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1075 * combinations where only one of them is nearest.
1077 static unsigned long gen_fixed_filter(unsigned long f)
1079 unsigned long mag, min, needs_fixing=0;
1082 /* We ignore MIRROR bit so we dont have to do everything twice */
1083 if((f & ((7-1) << R300_TX_WRAP_S_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)){
1086 if((f & ((7-1) << R300_TX_WRAP_T_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)){
1089 if((f & ((7-1) << R300_TX_WRAP_Q_SHIFT)) == (R300_TX_CLAMP << R300_TX_WRAP_Q_SHIFT)){
1096 mag=f & R300_TX_MAG_FILTER_MASK;
1097 min=f & R300_TX_MIN_FILTER_MASK;
1099 /* TODO: Check for anisto filters too */
1100 if((mag != R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST))
1103 /* r300 cant handle these modes hence we force nearest to linear */
1104 if((mag == R300_TX_MAG_FILTER_NEAREST) && (min != R300_TX_MIN_FILTER_NEAREST)){
1105 f &= ~R300_TX_MAG_FILTER_NEAREST;
1106 f |= R300_TX_MAG_FILTER_LINEAR;
1110 if((min == R300_TX_MIN_FILTER_NEAREST) && (mag != R300_TX_MAG_FILTER_NEAREST)){
1111 f &= ~R300_TX_MIN_FILTER_NEAREST;
1112 f |= R300_TX_MIN_FILTER_LINEAR;
1116 /* Both are nearest */
1117 if(needs_fixing & 1){
1118 f &= ~((7-1) << R300_TX_WRAP_S_SHIFT);
1119 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1121 if(needs_fixing & 2){
1122 f &= ~((7-1) << R300_TX_WRAP_T_SHIFT);
1123 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1125 if(needs_fixing & 4){
1126 f &= ~((7-1) << R300_TX_WRAP_Q_SHIFT);
1127 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_Q_SHIFT;
1132 void r300_setup_textures(GLcontext *ctx)
1135 struct r300_tex_obj *t;
1136 r300ContextPtr r300 = R300_CONTEXT(ctx);
1137 int max_texture_unit=-1; /* -1 translates into no setup costs for fields */
1138 struct gl_texture_unit *texUnit;
1140 R300_STATECHANGE(r300, txe);
1141 R300_STATECHANGE(r300, tex.filter);
1142 R300_STATECHANGE(r300, tex.unknown1);
1143 R300_STATECHANGE(r300, tex.size);
1144 R300_STATECHANGE(r300, tex.format);
1145 R300_STATECHANGE(r300, tex.offset);
1146 R300_STATECHANGE(r300, tex.unknown4);
1147 R300_STATECHANGE(r300, tex.unknown5);
1148 //R300_STATECHANGE(r300, tex.border_color);
1150 r300->state.texture.tc_count=0;
1152 r300->hw.txe.cmd[R300_TXE_ENABLE]=0x0;
1154 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1155 if (RADEON_DEBUG & DEBUG_STATE)
1156 fprintf(stderr, "mtu=%d\n", mtu);
1158 if(mtu>R300_MAX_TEXTURE_UNITS){
1159 fprintf(stderr, "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1160 mtu, R300_MAX_TEXTURE_UNITS);
1164 if(ctx->Texture.Unit[i].Enabled){
1165 t=r300->state.texture.unit[i].texobj;
1166 //fprintf(stderr, "format=%08x\n", r300->state.texture.unit[i].format);
1167 r300->state.texture.tc_count++;
1169 fprintf(stderr, "Texture unit %d enabled, but corresponding texobj is NULL, using default object.\n", i);
1173 //fprintf(stderr, "t->format=%08x\n", t->format);
1174 if (RADEON_DEBUG & DEBUG_STATE)
1175 fprintf(stderr, "Activating texture unit %d\n", i);
1177 r300->hw.txe.cmd[R300_TXE_ENABLE]|=(1<<i);
1179 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0+i]=gen_fixed_filter(t->filter);
1180 /* No idea why linear filtered textures shake when puting random data */
1181 /*r300->hw.tex.unknown1.cmd[R300_TEX_VALUE_0+i]=(rand()%0xffffffff) & (~0x1fff);*/
1182 r300->hw.tex.size.cmd[R300_TEX_VALUE_0+i]=t->size;
1183 r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=t->format;
1184 //fprintf(stderr, "t->format=%08x\n", t->format);
1185 r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=r300->radeon.radeonScreen->fbLocation+t->offset;
1186 r300->hw.tex.unknown4.cmd[R300_TEX_VALUE_0+i]=0x0;
1187 r300->hw.tex.unknown5.cmd[R300_TEX_VALUE_0+i]=0x0;
1188 //r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
1191 ((drm_r300_cmd_header_t*)r300->hw.tex.filter.cmd)->unchecked_state.count = max_texture_unit+1;
1192 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown1.cmd)->unchecked_state.count = max_texture_unit+1;
1193 ((drm_r300_cmd_header_t*)r300->hw.tex.size.cmd)->unchecked_state.count = max_texture_unit+1;
1194 ((drm_r300_cmd_header_t*)r300->hw.tex.format.cmd)->unchecked_state.count = max_texture_unit+1;
1195 ((drm_r300_cmd_header_t*)r300->hw.tex.offset.cmd)->unchecked_state.count = max_texture_unit+1;
1196 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown4.cmd)->unchecked_state.count = max_texture_unit+1;
1197 ((drm_r300_cmd_header_t*)r300->hw.tex.unknown5.cmd)->unchecked_state.count = max_texture_unit+1;
1198 //((drm_r300_cmd_header_t*)r300->hw.tex.border_color.cmd)->unchecked_state.count = max_texture_unit+1;
1200 if (RADEON_DEBUG & DEBUG_STATE)
1201 fprintf(stderr, "TX_ENABLE: %08x max_texture_unit=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], max_texture_unit);
1204 void r300_setup_rs_unit(GLcontext *ctx)
1206 r300ContextPtr r300 = R300_CONTEXT(ctx);
1209 /* This needs to be rewritten - it is a hack at best */
1211 R300_STATECHANGE(r300, ri);
1212 R300_STATECHANGE(r300, rc);
1213 R300_STATECHANGE(r300, rr);
1215 for(i = 1; i <= 8; ++i)
1216 r300->hw.ri.cmd[i] = 0x00d10000;
1217 r300->hw.ri.cmd[R300_RI_INTERP_1] |= R300_RS_INTERP_1_UNKNOWN;
1218 r300->hw.ri.cmd[R300_RI_INTERP_2] |= R300_RS_INTERP_2_UNKNOWN;
1219 r300->hw.ri.cmd[R300_RI_INTERP_3] |= R300_RS_INTERP_3_UNKNOWN;
1222 for(i = 2; i <= 8; ++i)
1223 r300->hw.ri.cmd[i] |= 4;
1226 for(i = 1; i <= 8; ++i)
1227 r300->hw.rr.cmd[i] = 0;
1228 /* textures enabled ? */
1229 if(r300->state.texture.tc_count>0){
1231 /* This code only really works with one set of texture coordinates */
1233 /* The second constant is needed to get glxgears display anything .. */
1234 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7
1235 | R300_RS_CNTL_0_UNKNOWN_18
1236 | (r300->state.texture.tc_count<<R300_RS_CNTL_TC_CNT_SHIFT);
1237 r300->hw.rc.cmd[2] = 0xc0;
1240 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1241 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x24008;
1245 /* The second constant is needed to get glxgears display anything .. */
1246 r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7 | R300_RS_CNTL_0_UNKNOWN_18;
1247 r300->hw.rc.cmd[2] = 0;
1249 ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
1250 r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0x4000;
1255 #define vpucount(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count)
1257 #define bump_vpu_count(ptr, new_count) do{\
1258 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1259 int _nc=(new_count)/4; \
1260 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1263 void static inline setup_vertex_shader_fragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1267 if(vsf->length==0)return;
1269 if(vsf->length & 0x3){
1270 fprintf(stderr,"VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1274 switch((dest>>8) & 0xf){
1276 R300_STATECHANGE(r300, vpi);
1277 for(i=0;i<vsf->length;i++)
1278 r300->hw.vpi.cmd[R300_VPI_INSTR_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1279 bump_vpu_count(r300->hw.vpi.cmd, vsf->length+4*(dest & 0xff));
1283 R300_STATECHANGE(r300, vpp);
1284 for(i=0;i<vsf->length;i++)
1285 r300->hw.vpp.cmd[R300_VPP_PARAM_0+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1286 bump_vpu_count(r300->hw.vpp.cmd, vsf->length+4*(dest & 0xff));
1289 R300_STATECHANGE(r300, vps);
1290 for(i=0;i<vsf->length;i++)
1291 r300->hw.vps.cmd[1+i+4*(dest & 0xff)]=(vsf->body.d[i]);
1292 bump_vpu_count(r300->hw.vps.cmd, vsf->length+4*(dest & 0xff));
1295 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1300 void r300SetupVertexProgram(r300ContextPtr rmesa);
1302 void r300SetupVertexShader(r300ContextPtr rmesa)
1304 GLcontext* ctx = rmesa->radeon.glCtx;
1306 if(rmesa->current_vp){
1307 r300SetupVertexProgram(rmesa);
1310 /* Reset state, in case we don't use something */
1311 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1312 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1313 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1316 /* This needs to be replaced by vertex shader generation code */
1319 /* textures enabled ? */
1320 if(rmesa->state.texture.tc_count>0){
1321 rmesa->state.vertex_shader=SINGLE_TEXTURE_VERTEX_SHADER;
1323 rmesa->state.vertex_shader=FLAT_COLOR_VERTEX_SHADER;
1327 rmesa->state.vertex_shader.matrix[0].length=16;
1328 memcpy(rmesa->state.vertex_shader.matrix[0].body.f, ctx->_ModelProjectMatrix.m, 16*4);
1330 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->state.vertex_shader.program));
1332 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->state.vertex_shader.matrix[0]));
1334 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX1, &(rmesa->state.vertex_shader.matrix[0]));
1335 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX2, &(rmesa->state.vertex_shader.matrix[0]));
1337 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR0, &(rmesa->state.vertex_shader.vector[0]));
1338 setup_vertex_shader_fragment(rmesa, VSF_DEST_VECTOR1, &(rmesa->state.vertex_shader.vector[1]));
1342 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1343 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1346 R300_STATECHANGE(rmesa, pvs);
1347 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(rmesa->state.vertex_shader.program_start << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1348 | (rmesa->state.vertex_shader.unknown_ptr1 << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1349 | (rmesa->state.vertex_shader.program_end << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1350 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(rmesa->state.vertex_shader.param_offset << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1351 | (rmesa->state.vertex_shader.param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1352 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(rmesa->state.vertex_shader.unknown_ptr2 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1353 | (rmesa->state.vertex_shader.unknown_ptr3 << 0);
1355 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1356 so I leave it as a reminder */
1358 reg_start(R300_VAP_PVS_WAITIDLE,0);
1363 void r300SetupVertexProgram(r300ContextPtr rmesa)
1365 GLcontext* ctx = rmesa->radeon.glCtx;
1369 /* Reset state, in case we don't use something */
1370 ((drm_r300_cmd_header_t*)rmesa->hw.vpp.cmd)->vpu.count = 0;
1371 ((drm_r300_cmd_header_t*)rmesa->hw.vpi.cmd)->vpu.count = 0;
1372 ((drm_r300_cmd_header_t*)rmesa->hw.vps.cmd)->vpu.count = 0;
1374 r300VertexProgUpdateParams(ctx, rmesa->current_vp);
1376 setup_vertex_shader_fragment(rmesa, VSF_DEST_PROGRAM, &(rmesa->current_vp->program));
1378 setup_vertex_shader_fragment(rmesa, VSF_DEST_MATRIX0, &(rmesa->current_vp->params));
1381 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN1, &(rmesa->state.vertex_shader.unknown1));
1382 setup_vertex_shader_fragment(rmesa, VSF_DEST_UNKNOWN2, &(rmesa->state.vertex_shader.unknown2));
1385 inst_count=rmesa->current_vp->program.length/4 - 1;
1386 param_count=rmesa->current_vp->params.length/4;
1388 R300_STATECHANGE(rmesa, pvs);
1389 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
1390 | (inst_count/*0*/ << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
1391 | (inst_count << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
1392 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
1393 | (param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
1394 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3]=(0/*rmesa->state.vertex_shader.unknown_ptr2*/ << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT)
1395 | ((inst_count-rmesa->current_vp->t2rs) /*rmesa->state.vertex_shader.unknown_ptr3*/ << 0);
1397 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1398 so I leave it as a reminder */
1400 reg_start(R300_VAP_PVS_WAITIDLE,0);
1405 void r300SetupPixelShader(r300ContextPtr rmesa)
1409 /* This needs to be replaced by pixel shader generation code */
1411 /* textures enabled ? */
1412 if(rmesa->state.texture.tc_count>0){
1413 rmesa->state.pixel_shader=SINGLE_TEXTURE_PIXEL_SHADER;
1415 rmesa->state.pixel_shader=FLAT_COLOR_PIXEL_SHADER;
1418 R300_STATECHANGE(rmesa, fpt);
1419 for(i=0;i<rmesa->state.pixel_shader.program.tex.length;i++)
1420 rmesa->hw.fpt.cmd[R300_FPT_INSTR_0+i]=rmesa->state.pixel_shader.program.tex.inst[i];
1421 rmesa->hw.fpt.cmd[R300_FPT_CMD_0]=cmducs(R300_PFS_TEXI_0, rmesa->state.pixel_shader.program.tex.length);
1423 #define OUTPUT_FIELD(st, reg, field) \
1424 R300_STATECHANGE(rmesa, st); \
1425 for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \
1426 rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rmesa->state.pixel_shader.program.alu.inst[i].field;\
1427 rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmducs(reg, rmesa->state.pixel_shader.program.alu.length);
1429 OUTPUT_FIELD(fpi[0], R300_PFS_INSTR0_0, inst0);
1430 OUTPUT_FIELD(fpi[1], R300_PFS_INSTR1_0, inst1);
1431 OUTPUT_FIELD(fpi[2], R300_PFS_INSTR2_0, inst2);
1432 OUTPUT_FIELD(fpi[3], R300_PFS_INSTR3_0, inst3);
1435 R300_STATECHANGE(rmesa, fp);
1437 rmesa->hw.fp.cmd[R300_FP_NODE0+i]=
1438 (rmesa->state.pixel_shader.program.node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT)
1439 | (rmesa->state.pixel_shader.program.node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT)
1440 | (rmesa->state.pixel_shader.program.node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT)
1441 | (rmesa->state.pixel_shader.program.node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT)
1442 | ( (i==3) ? R300_PFS_NODE_LAST_NODE : 0);
1446 rmesa->hw.fp.cmd[R300_FP_CNTL0]=
1447 (rmesa->state.pixel_shader.program.active_nodes-1)
1448 | (rmesa->state.pixel_shader.program.first_node_has_tex<<3);
1450 rmesa->hw.fp.cmd[R300_FP_CNTL1]=rmesa->state.pixel_shader.program.temp_register_count;
1452 rmesa->hw.fp.cmd[R300_FP_CNTL2]=
1453 (rmesa->state.pixel_shader.program.alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT)
1454 | (rmesa->state.pixel_shader.program.alu_end << R300_PFS_CNTL_ALU_END_SHIFT)
1455 | (rmesa->state.pixel_shader.program.tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT)
1456 | (rmesa->state.pixel_shader.program.tex_end << R300_PFS_CNTL_TEX_END_SHIFT);
1458 R300_STATECHANGE(rmesa, fpp);
1459 for(i=0;i<rmesa->state.pixel_shader.param_length;i++){
1460 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+0]=r300PackFloat32(rmesa->state.pixel_shader.param[i].x);
1461 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+1]=r300PackFloat32(rmesa->state.pixel_shader.param[i].y);
1462 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+2]=r300PackFloat32(rmesa->state.pixel_shader.param[i].z);
1463 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0+4*i+3]=r300PackFloat32(rmesa->state.pixel_shader.param[i].w);
1465 rmesa->hw.fpp.cmd[R300_FPP_CMD_0]=cmducs(R300_PFS_PARAM_0_X, rmesa->state.pixel_shader.param_length);
1470 * Called by Mesa after an internal state update.
1472 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
1474 r300ContextPtr r300 = R300_CONTEXT(ctx);
1476 _swrast_InvalidateState(ctx, new_state);
1477 _swsetup_InvalidateState(ctx, new_state);
1478 _ac_InvalidateState(ctx, new_state);
1479 _tnl_InvalidateState(ctx, new_state);
1480 _ae_invalidate_state(ctx, new_state);
1482 /* Go inefficiency! */
1483 r300ResetHwState(r300);
1488 * Completely recalculates hardware state based on the Mesa state.
1490 void r300ResetHwState(r300ContextPtr r300)
1492 GLcontext* ctx = r300->radeon.glCtx;
1495 if (RADEON_DEBUG & DEBUG_STATE)
1496 fprintf(stderr, "%s\n", __FUNCTION__);
1498 /* This is a place to initialize registers which
1499 have bitfields accessed by different functions
1500 and not all bits are used */
1502 r300->hw.zs.cmd[R300_ZS_CNTL_0] = 0;
1503 r300->hw.zs.cmd[R300_ZS_CNTL_1] = 0;
1504 r300->hw.zs.cmd[R300_ZS_CNTL_2] = 0xffff00;
1507 /* go and compute register values from GL state */
1509 r300UpdateWindow(ctx);
1512 ctx->Color.ColorMask[RCOMP],
1513 ctx->Color.ColorMask[GCOMP],
1514 ctx->Color.ColorMask[BCOMP],
1515 ctx->Color.ColorMask[ACOMP]);
1517 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
1518 r300DepthMask(ctx, ctx->Depth.Mask);
1519 r300DepthFunc(ctx, ctx->Depth.Func);
1521 r300UpdateCulling(ctx);
1523 r300_setup_routing(ctx, GL_TRUE);
1525 r300UpdateTextureState(ctx);
1526 r300_setup_textures(ctx);
1527 r300_setup_rs_unit(ctx);
1529 r300SetupVertexShader(r300);
1530 r300SetupPixelShader(r300);
1532 r300_set_blend_state(ctx);
1533 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
1535 /* Initialize magic registers
1536 TODO : learn what they really do, or get rid of
1537 those we don't have to touch */
1538 r300->hw.unk2080.cmd[1] = 0x0030045A;
1540 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
1541 | R300_VPORT_X_OFFSET_ENA
1542 | R300_VPORT_Y_SCALE_ENA
1543 | R300_VPORT_Y_OFFSET_ENA
1544 | R300_VPORT_Z_SCALE_ENA
1545 | R300_VPORT_Z_OFFSET_ENA
1547 r300->hw.vte.cmd[2] = 0x00000008;
1549 r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
1550 r300->hw.unk2134.cmd[2] = 0x00000000;
1552 r300->hw.unk2140.cmd[1] = 0x00000000;
1554 #if 0 /* Done in setup routing */
1555 ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = 1;
1556 r300->hw.vir[0].cmd[1] = 0x21030003;
1558 ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = 1;
1559 r300->hw.vir[1].cmd[1] = 0xF688F688;
1561 r300->hw.vic.cmd[R300_VIR_CNTL_0] = 0x00000001;
1562 r300->hw.vic.cmd[R300_VIR_CNTL_1] = 0x00000405;
1565 r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA;
1567 r300->hw.unk221C.cmd[1] = R300_221C_NORMAL;
1569 r300->hw.unk2220.cmd[1] = r300PackFloat32(1.0);
1570 r300->hw.unk2220.cmd[2] = r300PackFloat32(1.0);
1571 r300->hw.unk2220.cmd[3] = r300PackFloat32(1.0);
1572 r300->hw.unk2220.cmd[4] = r300PackFloat32(1.0);
1574 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1575 r300->hw.unk2288.cmd[1] = R300_2288_R300;
1577 r300->hw.unk2288.cmd[1] = R300_2288_RV350;
1580 r300->hw.vof.cmd[R300_VOF_CNTL_0] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
1581 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
1582 r300->hw.vof.cmd[R300_VOF_CNTL_1] = 0; /* no textures */
1585 r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0;
1586 r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0;
1587 r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0;
1590 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
1591 | R300_GB_LINE_STUFF_ENABLE
1592 | R300_GB_TRIANGLE_STUFF_ENABLE;
1594 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
1595 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
1596 if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
1597 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1598 | R300_GB_TILE_PIPE_COUNT_R300
1599 | R300_GB_TILE_SIZE_16;
1601 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] = R300_GB_TILE_ENABLE
1602 | R300_GB_TILE_PIPE_COUNT_RV300
1603 | R300_GB_TILE_SIZE_16;
1604 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0x00000000;
1605 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = 0x00000000; /* No antialiasing */
1607 //r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;
1609 r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0);
1610 r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0);
1611 r300->hw.unk4200.cmd[3] = r300PackFloat32(1.0);
1612 r300->hw.unk4200.cmd[4] = r300PackFloat32(1.0);
1614 r300->hw.unk4214.cmd[1] = 0x00050005;
1616 r300->hw.ps.cmd[R300_PS_POINTSIZE] = (6 << R300_POINTSIZE_X_SHIFT) |
1617 (6 << R300_POINTSIZE_Y_SHIFT);
1619 r300->hw.unk4230.cmd[1] = 0x01800000;
1620 r300->hw.unk4230.cmd[2] = 0x00020006;
1621 r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0);
1623 r300->hw.unk4260.cmd[1] = 0;
1624 r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0);
1625 r300->hw.unk4260.cmd[3] = r300PackFloat32(1.0);
1627 r300->hw.unk4274.cmd[1] = 0x00000002;
1628 r300->hw.unk4274.cmd[2] = 0x0003AAAA;
1629 r300->hw.unk4274.cmd[3] = 0x00000000;
1630 r300->hw.unk4274.cmd[4] = 0x00000000;
1632 r300->hw.unk4288.cmd[1] = 0x00000000;
1633 r300->hw.unk4288.cmd[2] = 0x00000001;
1634 r300->hw.unk4288.cmd[3] = 0x00000000;
1635 r300->hw.unk4288.cmd[4] = 0x00000000;
1636 r300->hw.unk4288.cmd[5] = 0x00000000;
1638 r300->hw.unk42A0.cmd[1] = 0x00000000;
1640 r300->hw.unk42B4.cmd[1] = 0x00000000;
1642 r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
1643 r300->hw.unk42C0.cmd[2] = 0x00000000;
1646 r300->hw.unk43A4.cmd[1] = 0x0000001C;
1647 r300->hw.unk43A4.cmd[2] = 0x2DA49525;
1649 r300->hw.unk43E8.cmd[1] = 0x00FFFFFF;
1652 r300->hw.fp.cmd[R300_FP_CNTL0] = 0;
1653 r300->hw.fp.cmd[R300_FP_CNTL1] = 0;
1654 r300->hw.fp.cmd[R300_FP_CNTL2] = 0;
1655 r300->hw.fp.cmd[R300_FP_NODE0] = 0;
1656 r300->hw.fp.cmd[R300_FP_NODE1] = 0;
1657 r300->hw.fp.cmd[R300_FP_NODE2] = 0;
1658 r300->hw.fp.cmd[R300_FP_NODE3] = 0;
1661 r300->hw.unk46A4.cmd[1] = 0x00001B01;
1662 r300->hw.unk46A4.cmd[2] = 0x00001B0F;
1663 r300->hw.unk46A4.cmd[3] = 0x00001B0F;
1664 r300->hw.unk46A4.cmd[4] = 0x00001B0F;
1665 r300->hw.unk46A4.cmd[5] = 0x00000001;
1668 for(i = 1; i <= 64; ++i) {
1669 /* create NOP instructions */
1670 r300->hw.fpi[0].cmd[i] = FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO));
1671 r300->hw.fpi[1].cmd[i] = FP_SELC(0,XYZ,NO,FP_TMP(0),0,0);
1672 r300->hw.fpi[2].cmd[i] = FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO));
1673 r300->hw.fpi[3].cmd[i] = FP_SELA(0,W,NO,FP_TMP(0),0,0);
1677 r300->hw.unk4BC0.cmd[1] = 0;
1679 r300->hw.unk4BC8.cmd[1] = 0;
1680 r300->hw.unk4BC8.cmd[2] = 0;
1681 r300->hw.unk4BC8.cmd[3] = 0;
1684 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
1687 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
1688 r300->hw.unk4BD8.cmd[1] = 0;
1690 r300->hw.unk4E00.cmd[1] = 0;
1693 r300->hw.bld.cmd[R300_BLD_CBLEND] = 0;
1694 r300->hw.bld.cmd[R300_BLD_ABLEND] = 0;
1697 r300->hw.unk4E10.cmd[1] = 0;
1698 r300->hw.unk4E10.cmd[2] = 0;
1699 r300->hw.unk4E10.cmd[3] = 0;
1701 r300->hw.cb.cmd[R300_CB_OFFSET] =
1702 r300->radeon.radeonScreen->backOffset +
1703 r300->radeon.radeonScreen->fbLocation;
1704 r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.radeonScreen->backPitch
1705 | R300_COLOR_UNKNOWN_22_23;
1707 r300->hw.unk4E50.cmd[1] = 0;
1708 r300->hw.unk4E50.cmd[2] = 0;
1709 r300->hw.unk4E50.cmd[3] = 0;
1710 r300->hw.unk4E50.cmd[4] = 0;
1711 r300->hw.unk4E50.cmd[5] = 0;
1712 r300->hw.unk4E50.cmd[6] = 0;
1713 r300->hw.unk4E50.cmd[7] = 0;
1714 r300->hw.unk4E50.cmd[8] = 0;
1715 r300->hw.unk4E50.cmd[9] = 0;
1717 r300->hw.unk4E88.cmd[1] = 0;
1719 r300->hw.unk4EA0.cmd[1] = 0x00000000;
1720 r300->hw.unk4EA0.cmd[2] = 0xffffffff;
1722 r300->hw.unk4F10.cmd[1] = 0x00000002; // depthbuffer format?
1723 r300->hw.unk4F10.cmd[2] = 0x00000000;
1724 r300->hw.unk4F10.cmd[3] = 0x00000003;
1725 r300->hw.unk4F10.cmd[4] = 0x00000000;
1727 /* experiment a bit */
1728 r300->hw.unk4F10.cmd[2] = 0x00000001; // depthbuffer format?
1730 r300->hw.zb.cmd[R300_ZB_OFFSET] =
1731 r300->radeon.radeonScreen->depthOffset +
1732 r300->radeon.radeonScreen->fbLocation;
1733 r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
1735 r300->hw.unk4F28.cmd[1] = 0;
1737 r300->hw.unk4F30.cmd[1] = 0;
1738 r300->hw.unk4F30.cmd[2] = 0;
1740 r300->hw.unk4F44.cmd[1] = 0;
1742 r300->hw.unk4F54.cmd[1] = 0;
1745 ((drm_r300_cmd_header_t*)r300->hw.vpi.cmd)->vpu.count = 0;
1746 for(i = 1; i < R300_VPI_CMDSIZE; i += 4) {
1748 r300->hw.vpi.cmd[i+0] = VP_OUT(ADD,TMP,0,XYZW);
1749 r300->hw.vpi.cmd[i+1] = VP_IN(TMP,0);
1750 r300->hw.vpi.cmd[i+2] = VP_ZERO();
1751 r300->hw.vpi.cmd[i+3] = VP_ZERO();
1754 ((drm_r300_cmd_header_t*)r300->hw.vpp.cmd)->vpu.count = 0;
1755 for(i = 1; i < R300_VPP_CMDSIZE; ++i)
1756 r300->hw.vpp.cmd[i] = 0;
1759 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
1760 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
1761 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
1762 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
1766 r300->hw.all_dirty = GL_TRUE;
1772 * Calculate initial hardware state and register state functions.
1773 * Assumes that the command buffer and state atoms have been
1774 * initialized already.
1776 void r300InitState(r300ContextPtr r300)
1778 GLcontext *ctx = r300->radeon.glCtx;
1781 radeonInitState(&r300->radeon);
1783 switch (ctx->Visual.depthBits) {
1785 r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
1786 depth_fmt = R200_DEPTH_FORMAT_16BIT_INT_Z;
1787 //r300->state.stencil.clear = 0x00000000;
1790 r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
1791 depth_fmt = R200_DEPTH_FORMAT_24BIT_INT_Z;
1792 //r300->state.stencil.clear = 0xff000000;
1795 fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
1796 ctx->Visual.depthBits);
1800 /* Only have hw stencil when depth buffer is 24 bits deep */
1801 r300->state.hw_stencil = (ctx->Visual.stencilBits > 0 &&
1802 ctx->Visual.depthBits == 24);
1804 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
1806 r300ResetHwState(r300);
1812 * Initialize driver's state callback functions
1814 void r300InitStateFuncs(struct dd_function_table* functions)
1816 radeonInitStateFuncs(functions);
1818 functions->UpdateState = r300InvalidateState;
1819 functions->AlphaFunc = r300AlphaFunc;
1820 functions->BlendColor = r300BlendColor;
1821 functions->BlendEquationSeparate = r300BlendEquationSeparate;
1822 functions->BlendFuncSeparate = r300BlendFuncSeparate;
1823 functions->Enable = r300Enable;
1824 functions->ColorMask = r300ColorMask;
1825 functions->DepthFunc = r300DepthFunc;
1826 functions->DepthMask = r300DepthMask;
1827 functions->CullFace = r300CullFace;
1828 functions->FrontFace = r300FrontFace;
1830 /* Stencil related */
1831 functions->ClearStencil = r300ClearStencil;
1832 functions->StencilFunc = r300StencilFunc;
1833 functions->StencilMask = r300StencilMask;
1834 functions->StencilOp = r300StencilOp;
1836 /* Viewport related */
1837 functions->Viewport = r300Viewport;
1838 functions->DepthRange = r300DepthRange;
1839 functions->PointSize = r300PointSize;