src/mesa/drivers/dri/r300/r300_state.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.
   3 Copyright (C) 2004 Nicolai Haehnle.
   4 All Rights Reserved.
   5
   6 The Weather Channel (TM) funded Tungsten Graphics to develop the
   7 initial release of the Radeon 8500 driver under the XFree86 license.
   8 This notice must be preserved.
   9
  10 Permission is hereby granted, free of charge, to any person obtaining
  11 a copy of this software and associated documentation files (the
  12 "Software"), to deal in the Software without restriction, including
  13 without limitation the rights to use, copy, modify, merge, publish,
  14 distribute, sublicense, and/or sell copies of the Software, and to
  15 permit persons to whom the Software is furnished to do so, subject to
  16 the following conditions:
  17
  18 The above copyright notice and this permission notice (including the
  19 next paragraph) shall be included in all copies or substantial
  20 portions of the Software.
  21
  22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  29
  30 **************************************************************************/
  31
  32 /*
  33  * Authors:
  34  *   Nicolai Haehnle <prefect_@gmx.net>
  35  */
  36
  37 #include "glheader.h"
  38 #include "state.h"
  39 #include "imports.h"
  40 #include "macros.h"
  41 #include "context.h"
  42 #include "dd.h"
  43 #include "simple_list.h"
  44
  45 #include "api_arrayelt.h"
  46 #include "swrast/swrast.h"
  47 #include "swrast_setup/swrast_setup.h"
  48 #include "array_cache/acache.h"
  49 #include "tnl/tnl.h"
  50
  51 #include "radeon_ioctl.h"
  52 #include "r300_context.h"
  53 #include "r300_ioctl.h"
  54 #include "r300_state.h"
  55 #include "r300_reg.h"
  56 #include "r300_program.h"
  57
  58
  59 /**
  60  * Called by Mesa after an internal state update.
  61  */
  62 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
  63 {
  64         r300ContextPtr r300 = R300_CONTEXT(ctx);
  65
  66         _swrast_InvalidateState(ctx, new_state);
  67         _swsetup_InvalidateState(ctx, new_state);
  68         _ac_InvalidateState(ctx, new_state);
  69         _tnl_InvalidateState(ctx, new_state);
  70         _ae_invalidate_state(ctx, new_state);
  71
  72         /* Go inefficiency! */
  73         r300ResetHwState(r300);
  74 }
  75
  76
  77 /**
  78  * Completely recalculates hardware state based on the Mesa state.
  79  */
  80 void r300ResetHwState(r300ContextPtr r300)
  81 {
  82         int i;
  83
  84         if (RADEON_DEBUG & DEBUG_STATE)
  85                 fprintf(stderr, "%s\n", __FUNCTION__);
  86
  87         {
  88                 __DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable;
  89                 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
  90                 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
  91                 const GLfloat *v = r300->radeon.glCtx->Viewport._WindowMap.m;
  92
  93                 r300->hw.vpt.cmd[R300_VPT_XSCALE] =
  94                         r300PackFloat32(v[MAT_SX]);
  95                 r300->hw.vpt.cmd[R300_VPT_XOFFSET] =
  96                         r300PackFloat32(v[MAT_TX] + xoffset);
  97                 r300->hw.vpt.cmd[R300_VPT_YSCALE] =
  98                         r300PackFloat32(-v[MAT_SY]);
  99                 r300->hw.vpt.cmd[R300_VPT_YOFFSET] =
 100                         r300PackFloat32(-v[MAT_TY] + yoffset);
 101                 r300->hw.vpt.cmd[R300_VPT_YSCALE] =
 102                         r300PackFloat32(v[MAT_SZ]);
 103                 r300->hw.vpt.cmd[R300_VPT_YOFFSET] =
 104                         r300PackFloat32(v[MAT_TZ]);
 105         }
 106
 107 //BEGIN: TODO
 108         r300->hw.unk2080.cmd[1] = 0x0030045A;
 109
 110         r300->hw.ovf.cmd[R300_OVF_FMT_0] = 0x00000003;
 111         r300->hw.ovf.cmd[R300_OVF_FMT_1] = 0x00000000;
 112
 113         r300->hw.unk20B0.cmd[1] = 0x0000040A;
 114         r300->hw.unk20B0.cmd[2] = 0x00000008;
 115
 116         r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
 117         r300->hw.unk2134.cmd[2] = 0x00000000;
 118
 119         r300->hw.unk2140.cmd[1] = 0x00000000;
 120
 121         ((drm_r300_cmd_header_t*)r300->hw.vir[0].cmd)->unchecked_state.count = 1;
 122         r300->hw.vir[0].cmd[1] = 0x21030003;
 123
 124         ((drm_r300_cmd_header_t*)r300->hw.vir[1].cmd)->unchecked_state.count = 1;
 125         r300->hw.vir[1].cmd[1] = 0xF688F688;
 126
 127         r300->hw.vic.cmd[R300_VIR_CNTL_0] = 0x00000001;
 128         r300->hw.vic.cmd[R300_VIR_CNTL_1] = 0x00000405;
 129
 130         r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA;
 131
 132         r300->hw.unk221C.cmd[1] = R300_221C_NORMAL;
 133
 134         r300->hw.unk2220.cmd[1] = r300PackFloat32(1.0);
 135         r300->hw.unk2220.cmd[2] = r300PackFloat32(1.0);
 136         r300->hw.unk2220.cmd[3] = r300PackFloat32(1.0);
 137         r300->hw.unk2220.cmd[4] = r300PackFloat32(1.0);
 138
 139         if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
 140                 r300->hw.unk2288.cmd[1] = R300_2288_R300;
 141         else
 142                 r300->hw.unk2288.cmd[1] = R300_2288_RV350;
 143
 144         r300->hw.pvs.cmd[R300_PVS_CNTL_1] = 0;
 145         r300->hw.pvs.cmd[R300_PVS_CNTL_2] = 0;
 146         r300->hw.pvs.cmd[R300_PVS_CNTL_3] = 0;
 147
 148         r300->hw.unk4008.cmd[1] = 0x00000007;
 149
 150         r300->hw.unk4010.cmd[1] = 0x66666666;
 151         r300->hw.unk4010.cmd[2] = 0x06666666;
 152         if (GET_CHIP(r300->radeon.radeonScreen) == RADEON_CHIP_R300)
 153                 r300->hw.unk4010.cmd[3] = 0x00000017;
 154         else
 155                 r300->hw.unk4010.cmd[3] = 0x00000011;
 156         r300->hw.unk4010.cmd[4] = 0x00000000;
 157         r300->hw.unk4010.cmd[5] = 0x00000000;
 158
 159         r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;
 160
 161         r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0);
 162         r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0);
 163         r300->hw.unk4200.cmd[3] = r300PackFloat32(1.0);
 164         r300->hw.unk4200.cmd[4] = r300PackFloat32(1.0);
 165
 166         r300->hw.unk4214.cmd[1] = 0x00050005;
 167
 168         r300->hw.ps.cmd[R300_PS_POINTSIZE] = (6 << R300_POINTSIZE_X_SHIFT) |
 169                                              (6 << R300_POINTSIZE_Y_SHIFT);
 170
 171         r300->hw.unk4230.cmd[1] = 0x01800000;
 172         r300->hw.unk4230.cmd[2] = 0x00020006;
 173         r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0);
 174
 175         r300->hw.unk4260.cmd[1] = 0;
 176         r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0);
 177         r300->hw.unk4260.cmd[3] = r300PackFloat32(1.0);
 178
 179         r300->hw.unk4274.cmd[1] = 0x00000002;
 180         r300->hw.unk4274.cmd[2] = 0x0003AAAA;
 181         r300->hw.unk4274.cmd[3] = 0x00000000;
 182         r300->hw.unk4274.cmd[4] = 0x00000000;
 183
 184         r300->hw.unk4288.cmd[1] = 0x00000000;
 185         r300->hw.unk4288.cmd[2] = 0x00000001;
 186         r300->hw.unk4288.cmd[3] = 0x00000000;
 187         r300->hw.unk4288.cmd[4] = 0x00000000;
 188         r300->hw.unk4288.cmd[5] = 0x00000000;
 189
 190         r300->hw.unk42A0.cmd[1] = 0x00000000;
 191
 192         r300->hw.unk42B4.cmd[1] = 0x00000000;
 193         r300->hw.unk42B4.cmd[2] = 0x00000000;
 194
 195         r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
 196         r300->hw.unk42C0.cmd[2] = 0x00000000;
 197
 198         r300->hw.rc.cmd[1] = R300_RS_CNTL_0_UNKNOWN_7;
 199         r300->hw.rc.cmd[2] = 0;
 200
 201         for(i = 1; i <= 8; ++i)
 202                 r300->hw.ri.cmd[i] = 0;
 203
 204         ((drm_r300_cmd_header_t*)r300->hw.rr.cmd)->unchecked_state.count = 1;
 205         for(i = 1; i <= 8; ++i)
 206                 r300->hw.rr.cmd[1] = 0;
 207
 208         r300->hw.unk43A4.cmd[1] = 0x0000001C;
 209         r300->hw.unk43A4.cmd[2] = 0x2DA49525;
 210
 211         r300->hw.unk43E8.cmd[1] = 0x00FFFFFF;
 212
 213         r300->hw.fp.cmd[R300_FP_CNTL0] = 0;
 214         r300->hw.fp.cmd[R300_FP_CNTL1] = 0;
 215         r300->hw.fp.cmd[R300_FP_CNTL2] = 0;
 216         r300->hw.fp.cmd[R300_FP_NODE0] = 0;
 217         r300->hw.fp.cmd[R300_FP_NODE1] = 0;
 218         r300->hw.fp.cmd[R300_FP_NODE2] = 0;
 219         r300->hw.fp.cmd[R300_FP_NODE3] = 0;
 220
 221         r300->hw.unk46A4.cmd[1] = 0x00001B01;
 222         r300->hw.unk46A4.cmd[2] = 0x00001B0F;
 223         r300->hw.unk46A4.cmd[3] = 0x00001B0F;
 224         r300->hw.unk46A4.cmd[4] = 0x00001B0F;
 225         r300->hw.unk46A4.cmd[5] = 0x00000001;
 226
 227         for(i = 1; i <= 64; ++i) {
 228                 /* create NOP instructions */
 229                 r300->hw.fpi[0].cmd[i] = FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO));
 230                 r300->hw.fpi[1].cmd[i] = FP_SELC(0,XYZ,NO,FP_TMP(0),0,0);
 231                 r300->hw.fpi[2].cmd[i] = FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO));
 232                 r300->hw.fpi[3].cmd[i] = FP_SELA(0,W,NO,FP_TMP(0),0,0);
 233         }
 234
 235         r300->hw.unk4BC0.cmd[1] = 0;
 236
 237         r300->hw.unk4BC8.cmd[1] = 0;
 238         r300->hw.unk4BC8.cmd[2] = 0;
 239         r300->hw.unk4BC8.cmd[3] = 0;
 240
 241         r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
 242
 243         r300->hw.unk4BD8.cmd[1] = 0;
 244
 245         r300->hw.unk4E00.cmd[1] = 0;
 246
 247         r300->hw.bld.cmd[R300_BLD_CBLEND] = 0;
 248         r300->hw.bld.cmd[R300_BLD_ABLEND] = 0;
 249
 250         r300->hw.cmk.cmd[R300_CMK_COLORMASK] = 0xF;
 251
 252         r300->hw.unk4E10.cmd[1] = 0;
 253         r300->hw.unk4E10.cmd[2] = 0;
 254         r300->hw.unk4E10.cmd[3] = 0;
 255
 256         r300->hw.cb.cmd[R300_CB_OFFSET] =
 257                 r300->radeon.radeonScreen->backOffset +
 258                 r300->radeon.radeonScreen->fbLocation;
 259         r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.radeonScreen->backPitch
 260                 | R300_COLOR_UNKNOWN_22_23;
 261
 262         r300->hw.unk4E50.cmd[1] = 0;
 263         r300->hw.unk4E50.cmd[2] = 0;
 264         r300->hw.unk4E50.cmd[3] = 0;
 265         r300->hw.unk4E50.cmd[4] = 0;
 266         r300->hw.unk4E50.cmd[5] = 0;
 267         r300->hw.unk4E50.cmd[6] = 0;
 268         r300->hw.unk4E50.cmd[7] = 0;
 269         r300->hw.unk4E50.cmd[8] = 0;
 270         r300->hw.unk4E50.cmd[9] = 0;
 271
 272         r300->hw.unk4E88.cmd[1] = 0;
 273
 274         r300->hw.zc.cmd[R300_ZC_CNTL_0] = 0;
 275         r300->hw.zc.cmd[R300_ZC_CNTL_1] = 0;
 276
 277         r300->hw.unk4F08.cmd[1] = 0x00FFFF00;
 278         r300->hw.unk4F08.cmd[2] = 0x00000002;
 279         r300->hw.unk4F08.cmd[3] = 0x00000000;
 280         r300->hw.unk4F08.cmd[4] = 0x00000003;
 281         r300->hw.unk4F08.cmd[5] = 0x00000000;
 282
 283         r300->hw.zb.cmd[R300_ZB_OFFSET] =
 284                 r300->radeon.radeonScreen->depthOffset +
 285                 r300->radeon.radeonScreen->fbLocation;
 286         r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
 287
 288         r300->hw.unk4F28.cmd[1] = 0;
 289
 290         r300->hw.unk4F30.cmd[1] = 0;
 291         r300->hw.unk4F30.cmd[2] = 0;
 292
 293         r300->hw.unk4F44.cmd[1] = 0;
 294
 295         r300->hw.unk4F54.cmd[1] = 0;
 296
 297         ((drm_r300_cmd_header_t*)r300->hw.vpi.cmd)->vpu.count = 0;
 298         for(i = 1; i < R300_VPI_CMDSIZE; i += 4) {
 299                 /* MOV t0, t0 */
 300                 r300->hw.vpi.cmd[i+0] = VP_OUT(ADD,TMP,0,XYZW);
 301                 r300->hw.vpi.cmd[i+1] = VP_IN(TMP,0);
 302                 r300->hw.vpi.cmd[i+2] = VP_ZERO();
 303                 r300->hw.vpi.cmd[i+3] = VP_ZERO();
 304         }
 305
 306         ((drm_r300_cmd_header_t*)r300->hw.vpp.cmd)->vpu.count = 0;
 307         for(i = 1; i < R300_VPP_CMDSIZE; ++i)
 308                 r300->hw.vpp.cmd[i] = 0;
 309
 310         r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
 311         r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
 312         r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
 313         r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
 314 //END: TODO
 315
 316         r300->hw.all_dirty = GL_TRUE;
 317 }
 318
 319
 320 /**
 321  * Calculate initial hardware state and register state functions.
 322  * Assumes that the command buffer and state atoms have been
 323  * initialized already.
 324  */
 325 void r300InitState(r300ContextPtr r300)
 326 {
 327         struct dd_function_table* functions;
 328
 329         r300ResetHwState(r300);
 330
 331         /* Setup state functions */
 332         functions = &r300->radeon.glCtx->Driver;
 333         functions->UpdateState = r300InvalidateState;
 334 }
 335