src/mesa/drivers/dri/r300/r300_emit.h

   1 /*
   2  * Copyright (C) 2005 Vladimir Dergachev.
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 /*
  29  * Authors:
  30  *   Vladimir Dergachev <volodya@mindspring.com>
  31  *   Nicolai Haehnle <prefect_@gmx.net>
  32  *   Aapo Tahkola <aet@rasterburn.org>
  33  *   Ben Skeggs <darktama@iinet.net.au>
  34  *   Jerome Glisse <j.glisse@gmail.com>
  35  */
  36
  37 /* This files defines functions for accessing R300 hardware.
  38  */
  39 #ifndef __R300_EMIT_H__
  40 #define __R300_EMIT_H__
  41
  42 #include "main/glheader.h"
  43 #include "r300_context.h"
  44 #include "r300_cmdbuf.h"
  45
  46 static INLINE uint32_t cmdpacket0(struct radeon_screen *rscrn,
  47                                   int reg, int count)
  48 {
  49     if (!rscrn->kernel_mm) {
  50             drm_r300_cmd_header_t cmd;
  51
  52         cmd.u = 0;
  53         cmd.packet0.cmd_type = R300_CMD_PACKET0;
  54             cmd.packet0.count = count;
  55         cmd.packet0.reghi = ((unsigned int)reg & 0xFF00) >> 8;
  56             cmd.packet0.reglo = ((unsigned int)reg & 0x00FF);
  57
  58         return cmd.u;
  59     }
  60     if (count) {
  61         return CP_PACKET0(reg, count - 1);
  62     }
  63     return CP_PACKET2;
  64 }
  65
  66 static INLINE uint32_t cmdvpu(struct radeon_screen *rscrn, int addr, int count)
  67 {
  68         drm_r300_cmd_header_t cmd;
  69
  70         cmd.u = 0;
  71         cmd.vpu.cmd_type = R300_CMD_VPU;
  72         cmd.vpu.count = count;
  73         cmd.vpu.adrhi = ((unsigned int)addr & 0xFF00) >> 8;
  74         cmd.vpu.adrlo = ((unsigned int)addr & 0x00FF);
  75
  76         return cmd.u;
  77 }
  78
  79 static INLINE uint32_t cmdr500fp(struct radeon_screen *rscrn,
  80                                  int addr, int count, int type, int clamp)
  81 {
  82         drm_r300_cmd_header_t cmd;
  83
  84         cmd.u = 0;
  85         cmd.r500fp.cmd_type = R300_CMD_R500FP;
  86         cmd.r500fp.count = count;
  87         cmd.r500fp.adrhi_flags = ((unsigned int)addr & 0x100) >> 8;
  88         cmd.r500fp.adrhi_flags |= type ? R500FP_CONSTANT_TYPE : 0;
  89         cmd.r500fp.adrhi_flags |= clamp ? R500FP_CONSTANT_CLAMP : 0;
  90         cmd.r500fp.adrlo = ((unsigned int)addr & 0x00FF);
  91
  92         return cmd.u;
  93 }
  94
  95 static INLINE uint32_t cmdpacket3(struct radeon_screen *rscrn, int packet)
  96 {
  97         drm_r300_cmd_header_t cmd;
  98
  99         cmd.u = 0;
 100         cmd.packet3.cmd_type = R300_CMD_PACKET3;
 101         cmd.packet3.packet = packet;
 102
 103         return cmd.u;
 104 }
 105
 106 static INLINE uint32_t cmdcpdelay(struct radeon_screen *rscrn,
 107                                   unsigned short count)
 108 {
 109         drm_r300_cmd_header_t cmd;
 110
 111         cmd.u = 0;
 112
 113         cmd.delay.cmd_type = R300_CMD_CP_DELAY;
 114         cmd.delay.count = count;
 115
 116         return cmd.u;
 117 }
 118
 119 static INLINE uint32_t cmdwait(struct radeon_screen *rscrn,
 120                                unsigned char flags)
 121 {
 122         drm_r300_cmd_header_t cmd;
 123
 124         cmd.u = 0;
 125         cmd.wait.cmd_type = R300_CMD_WAIT;
 126         cmd.wait.flags = flags;
 127
 128         return cmd.u;
 129 }
 130
 131 static INLINE uint32_t cmdpacify(struct radeon_screen *rscrn)
 132 {
 133         drm_r300_cmd_header_t cmd;
 134
 135         cmd.u = 0;
 136         cmd.header.cmd_type = R300_CMD_END3D;
 137
 138         return cmd.u;
 139 }
 140
 141 /**
 142  * Write the header of a packet3 to the command buffer.
 143  * Outputs 2 dwords and expects (num_extra+1) additional dwords afterwards.
 144  */
 145 #define OUT_BATCH_PACKET3(packet, num_extra) do {\
 146     if (!b_l_rmesa->radeonScreen->kernel_mm) {          \
 147         OUT_BATCH(cmdpacket3(b_l_rmesa->radeonScreen,\
 148                   R300_CMD_PACKET3_RAW)); \
 149     } else b_l_rmesa->cmdbuf.cs->section_cdw++;\
 150         OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
 151         } while(0)
 152
 153 /**
 154  * Must be sent to switch to 2d commands
 155  */
 156 void static INLINE end_3d(radeonContextPtr radeon)
 157 {
 158         BATCH_LOCALS(radeon);
 159
 160         if (!radeon->radeonScreen->kernel_mm) {
 161                 BEGIN_BATCH_NO_AUTOSTATE(1);
 162                 OUT_BATCH(cmdpacify(radeon->radeonScreen));
 163                 END_BATCH();
 164         }
 165 }
 166
 167 void static INLINE cp_delay(r300ContextPtr rmesa, unsigned short count)
 168 {
 169         BATCH_LOCALS(&rmesa->radeon);
 170
 171         if (!rmesa->radeon.radeonScreen->kernel_mm) {
 172                 BEGIN_BATCH_NO_AUTOSTATE(1);
 173                 OUT_BATCH(cmdcpdelay(rmesa->radeon.radeonScreen, count));
 174                 END_BATCH();
 175         }
 176 }
 177
 178 void static INLINE cp_wait(radeonContextPtr radeon, unsigned char flags)
 179 {
 180         BATCH_LOCALS(radeon);
 181         uint32_t wait_until;
 182
 183         if (!radeon->radeonScreen->kernel_mm) {
 184                 BEGIN_BATCH_NO_AUTOSTATE(1);
 185                 OUT_BATCH(cmdwait(radeon->radeonScreen, flags));
 186                 END_BATCH();
 187         } else {
 188                 switch(flags) {
 189                 case R300_WAIT_2D:
 190                         wait_until = (1 << 14);
 191                         break;
 192                 case R300_WAIT_3D:
 193                         wait_until = (1 << 15);
 194                         break;
 195                 case R300_NEW_WAIT_2D_3D:
 196                         wait_until = (1 << 14) | (1 << 15);
 197                         break;
 198                 case R300_NEW_WAIT_2D_2D_CLEAN:
 199                         wait_until = (1 << 14) | (1 << 16) | (1 << 18);
 200                         break;
 201                 case R300_NEW_WAIT_3D_3D_CLEAN:
 202                         wait_until = (1 << 15) | (1 << 17) | (1 << 18);
 203                         break;
 204                 case R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN:
 205                         wait_until  = (1 << 14) | (1 << 16) | (1 << 18);
 206                         wait_until |= (1 << 15) | (1 << 17) | (1 << 18);
 207                         break;
 208                 default:
 209                         return;
 210                 }
 211                 BEGIN_BATCH_NO_AUTOSTATE(2);
 212                 OUT_BATCH(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
 213                 OUT_BATCH(wait_until);
 214                 END_BATCH();
 215         }
 216 }
 217
 218 extern int r300PrimitiveType(r300ContextPtr rmesa, int prim);
 219 extern int r300NumVerts(r300ContextPtr rmesa, int num_verts, int prim);
 220
 221 extern void r300EmitCacheFlush(r300ContextPtr rmesa);
 222
 223 extern GLuint r300VAPInputCntl0(struct gl_context * ctx, GLuint InputsRead);
 224 extern GLuint r300VAPInputCntl1(struct gl_context * ctx, GLuint InputsRead);
 225 extern GLuint r300VAPOutputCntl0(struct gl_context * ctx, GLuint vp_writes);
 226 extern GLuint r300VAPOutputCntl1(struct gl_context * ctx, GLuint vp_writes);
 227
 228 #endif