src/mesa/drivers/dri/r128/server/r128_macros.h

   1 /**
   2  * \file server/R128_macros.h
   3  * \brief Macros for R128 MMIO operation.
   4  *
   5  * \authors Kevin E. Martin <martin@xfree86.org>
   6  * \authors Rickard E. Faith <faith@valinux.com>
   7  * \authors Alan Hourihane <alanh@fairlite.demon.co.uk>
   8  */
   9
  10 /*
  11  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  12  *                VA Linux Systems Inc., Fremont, California.
  13  *
  14  * All Rights Reserved.
  15  *
  16  * Permission is hereby granted, free of charge, to any person obtaining
  17  * a copy of this software and associated documentation files (the
  18  * "Software"), to deal in the Software without restriction, including
  19  * without limitation on the rights to use, copy, modify, merge,
  20  * publish, distribute, sublicense, and/or sell copies of the Software,
  21  * and to permit persons to whom the Software is furnished to do so,
  22  * subject to the following conditions:
  23  *
  24  * The above copyright notice and this permission notice (including the
  25  * next paragraph) shall be included in all copies or substantial
  26  * portions of the Software.
  27  *
  28  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  29  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  30  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  31  * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
  32  * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  33  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  34  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  35  * DEALINGS IN THE SOFTWARE.
  36  */
  37
  38
  39 #ifndef _R128_MACROS_H_
  40 #define _R128_MACROS_H_
  41
  42
  43
  44 #  define MMIO_IN8(base, offset) \
  45         *(volatile unsigned char *)(((unsigned char*)(base)) + (offset))
  46 #  define MMIO_IN16(base, offset) \
  47         *(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset))
  48 #  define MMIO_IN32(base, offset) \
  49         *(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset))
  50 #  define MMIO_OUT8(base, offset, val) \
  51         *(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) = (val)
  52 #  define MMIO_OUT16(base, offset, val) \
  53         *(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset)) = (val)
  54 #  define MMIO_OUT32(base, offset, val) \
  55         *(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) = (val)
  56
  57
  58                                 /* Memory mapped register access macros */
  59 #define INREG8(addr)        MMIO_IN8(R128MMIO, addr)
  60 #define INREG16(addr)       MMIO_IN16(R128MMIO, addr)
  61 #define INREG(addr)         MMIO_IN32(R128MMIO, addr)
  62 #define OUTREG8(addr, val)  MMIO_OUT8(R128MMIO, addr, val)
  63 #define OUTREG16(addr, val) MMIO_OUT16(R128MMIO, addr, val)
  64 #define OUTREG(addr, val)   MMIO_OUT32(R128MMIO, addr, val)
  65
  66 #define ADDRREG(addr)       ((volatile GLuint *)(pointer)(R128MMIO + (addr)))
  67
  68
  69 #define OUTREGP(addr, val, mask)                                        \
  70 do {                                                                    \
  71     GLuint tmp = INREG(addr);                                           \
  72     tmp &= (mask);                                                      \
  73     tmp |= (val);                                                       \
  74     OUTREG(addr, tmp);                                                  \
  75 } while (0)
  76
  77 #define INPLL(dpy, addr) r128INPLL(dpy, addr)
  78
  79 #define OUTPLL(addr, val)                                               \
  80 do {                                                                    \
  81     OUTREG8(R128_CLOCK_CNTL_INDEX, (((addr) & 0x3f) |                   \
  82                                       R128_PLL_WR_EN));         \
  83     OUTREG(R128_CLOCK_CNTL_DATA, val);                          \
  84 } while (0)
  85
  86 #define OUTPLLP(dpy, addr, val, mask)                                   \
  87 do {                                                                    \
  88     GLuint tmp = INPLL(dpy, addr);                                      \
  89     tmp &= (mask);                                                      \
  90     tmp |= (val);                                                       \
  91     OUTPLL(addr, tmp);                                                  \
  92 } while (0)
  93
  94 #define OUTPAL_START(idx)                                               \
  95 do {                                                                    \
  96     OUTREG8(R128_PALETTE_INDEX, (idx));                         \
  97 } while (0)
  98
  99 #define OUTPAL_NEXT(r, g, b)                                            \
 100 do {                                                                    \
 101     OUTREG(R128_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b));  \
 102 } while (0)
 103
 104 #define OUTPAL_NEXT_CARD32(v)                                           \
 105 do {                                                                    \
 106     OUTREG(R128_PALETTE_DATA, (v & 0x00ffffff));                        \
 107 } while (0)
 108
 109 #define OUTPAL(idx, r, g, b)                                            \
 110 do {                                                                    \
 111     OUTPAL_START((idx));                                                \
 112     OUTPAL_NEXT((r), (g), (b));                                         \
 113 } while (0)
 114
 115 #define INPAL_START(idx)                                                \
 116 do {                                                                    \
 117     OUTREG(R128_PALETTE_INDEX, (idx) << 16);                            \
 118 } while (0)
 119
 120 #define INPAL_NEXT() INREG(R128_PALETTE_DATA)
 121
 122 #define PAL_SELECT(idx)                                                 \
 123 do {                                                                    \
 124     if (!idx) {                                                         \
 125         OUTREG(R128_DAC_CNTL2, INREG(R128_DAC_CNTL2) &          \
 126                (GLuint)~R128_DAC2_PALETTE_ACC_CTL);                     \
 127     } else {                                                            \
 128         OUTREG(R128_DAC_CNTL2, INREG(R128_DAC_CNTL2) |          \
 129                R128_DAC2_PALETTE_ACC_CTL);                              \
 130     }                                                                   \
 131 } while (0)
 132
 133
 134 #endif