1 /* -*- mode: c; c-basic-offset: 3 -*- */
3 * Copyright 2000 Gareth Hughes
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Gareth Hughes <gareth@valinux.com>
28 * Leif Delgass <ldelgass@retinalburn.net>
29 * Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
33 #include "mach64_context.h"
34 #include "mach64_state.h"
35 #include "mach64_ioctl.h"
36 #include "mach64_tex.h"
38 #include "main/imports.h"
39 #include "main/macros.h"
41 #include "swrast/swrast.h"
45 #define MACH64_TIMEOUT 10 /* the DRM already has a timeout, so keep this small */
48 /* =============================================================
49 * Hardware vertex buffer handling
52 /* Get a new VB from the pool of vertex buffers in AGP space.
54 drmBufPtr mach64GetBufferLocked( mach64ContextPtr mmesa )
56 int fd = mmesa->mach64Screen->driScreen->fd;
64 dma.context = mmesa->hHWContext;
67 dma.send_sizes = NULL;
69 dma.request_count = 1;
70 dma.request_size = MACH64_BUFFER_SIZE;
71 dma.request_list = &index;
72 dma.request_sizes = &size;
73 dma.granted_count = 0;
75 while ( !buf && ( to++ < MACH64_TIMEOUT ) ) {
76 ret = drmDMA( fd, &dma );
79 buf = &mmesa->mach64Screen->buffers->list[index];
82 /* Bump the performance counter */
83 mmesa->c_vertexBuffers++;
90 drmCommandNone( fd, DRM_MACH64_RESET );
91 UNLOCK_HARDWARE( mmesa );
92 fprintf( stderr, "Error: Could not get new VB... exiting\n" );
99 void mach64FlushVerticesLocked( mach64ContextPtr mmesa )
101 drm_clip_rect_t *pbox = mmesa->pClipRects;
102 int nbox = mmesa->numClipRects;
103 void *buffer = mmesa->vert_buf;
104 int count = mmesa->vert_used;
105 int prim = mmesa->hw_primitive;
106 int fd = mmesa->driScreen->fd;
107 drm_mach64_vertex_t vertex;
110 mmesa->num_verts = 0;
111 mmesa->vert_used = 0;
116 if ( mmesa->dirty & ~MACH64_UPLOAD_CLIPRECTS )
117 mach64EmitHwStateLocked( mmesa );
122 if ( nbox > MACH64_NR_SAREA_CLIPRECTS )
123 mmesa->dirty |= MACH64_UPLOAD_CLIPRECTS;
125 if ( !count || !(mmesa->dirty & MACH64_UPLOAD_CLIPRECTS) ) {
129 /* FIXME: Is this really necessary */
131 mmesa->sarea->nbox = 0;
133 mmesa->sarea->nbox = nbox;
140 ret = drmCommandWrite( fd, DRM_MACH64_VERTEX,
141 &vertex, sizeof(drm_mach64_vertex_t) );
142 } while ( ( ret == -EAGAIN ) && ( to++ < MACH64_TIMEOUT ) );
144 UNLOCK_HARDWARE( mmesa );
145 fprintf( stderr, "Error flushing vertex buffer: return = %d\n", ret );
151 for ( i = 0 ; i < nbox ; ) {
152 int nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS, nbox );
153 drm_clip_rect_t *b = mmesa->sarea->boxes;
158 mmesa->sarea->nbox = nr - i;
159 for ( ; i < nr ; i++ ) {
163 /* Finished with the buffer?
169 mmesa->sarea->dirty |= MACH64_UPLOAD_CLIPRECTS;
174 vertex.discard = discard;
176 ret = drmCommandWrite( fd, DRM_MACH64_VERTEX,
177 &vertex, sizeof(drm_mach64_vertex_t) );
178 } while ( ( ret == -EAGAIN ) && ( to++ < MACH64_TIMEOUT ) );
180 UNLOCK_HARDWARE( mmesa );
181 fprintf( stderr, "Error flushing vertex buffer: return = %d\n", ret );
187 mmesa->dirty &= ~MACH64_UPLOAD_CLIPRECTS;
190 /* ================================================================
194 void mach64FireBlitLocked( mach64ContextPtr mmesa, void *buffer,
195 GLint offset, GLint pitch, GLint format,
196 GLint x, GLint y, GLint width, GLint height )
198 drm_mach64_blit_t blit;
203 blit.offset = offset;
205 blit.format = format;
209 blit.height = height;
212 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_BLIT,
213 &blit, sizeof(drm_mach64_blit_t) );
214 } while ( ( ret == -EAGAIN ) && ( to++ < MACH64_TIMEOUT ) );
217 UNLOCK_HARDWARE( mmesa );
218 fprintf( stderr, "DRM_MACH64_BLIT: return = %d\n", ret );
224 /* ================================================================
225 * SwapBuffers with client-side throttling
227 static void delay( void ) {
228 /* Prevent an optimizing compiler from removing a spin loop */
231 /* Throttle the frame rate -- only allow MACH64_MAX_QUEUED_FRAMES
232 * pending swap buffers requests at a time.
234 * GH: We probably don't want a timeout here, as we can wait as
235 * long as we want for a frame to complete. If it never does, then
236 * the card has locked.
238 static int mach64WaitForFrameCompletion( mach64ContextPtr mmesa )
240 int fd = mmesa->driFd;
246 drm_mach64_getparam_t gp;
249 if ( mmesa->sarea->frames_queued < MACH64_MAX_QUEUED_FRAMES ) {
253 if (MACH64_DEBUG & DEBUG_NOWAIT) {
257 gp.param = MACH64_PARAM_FRAMES_QUEUED;
258 gp.value = &frames; /* also copied into sarea->frames_queued by DRM */
260 ret = drmCommandWriteRead( fd, DRM_MACH64_GETPARAM, &gp, sizeof(gp) );
263 UNLOCK_HARDWARE( mmesa );
264 fprintf( stderr, "DRM_MACH64_GETPARAM: return = %d\n", ret );
268 /* Spin in place a bit so we aren't hammering the register */
271 for ( i = 0 ; i < 1024 ; i++ ) {
280 /* Copy the back color buffer to the front color buffer.
282 void mach64CopyBuffer( __DRIdrawable *dPriv )
284 mach64ContextPtr mmesa;
286 drm_clip_rect_t *pbox;
287 GLboolean missed_target;
290 assert(dPriv->driContextPriv);
291 assert(dPriv->driContextPriv->driverPrivate);
293 mmesa = (mach64ContextPtr) dPriv->driContextPriv->driverPrivate;
295 if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
296 fprintf( stderr, "\n********************************\n" );
297 fprintf( stderr, "\n%s( %p )\n\n",
298 __FUNCTION__, mmesa->glCtx );
302 /* Flush any outstanding vertex buffers */
303 FLUSH_BATCH( mmesa );
305 LOCK_HARDWARE( mmesa );
307 /* Throttle the frame rate -- only allow one pending swap buffers
310 if ( !mach64WaitForFrameCompletion( mmesa ) ) {
311 mmesa->hardwareWentIdle = 1;
313 mmesa->hardwareWentIdle = 0;
316 #if ENABLE_PERF_BOXES
317 if ( mmesa->boxes ) {
318 mach64PerformanceBoxesLocked( mmesa );
322 UNLOCK_HARDWARE( mmesa );
323 driWaitForVBlank( dPriv, &missed_target );
324 LOCK_HARDWARE( mmesa );
326 /* use front buffer cliprects */
327 nbox = dPriv->numClipRects;
328 pbox = dPriv->pClipRects;
330 for ( i = 0 ; i < nbox ; ) {
331 GLint nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS , nbox );
332 drm_clip_rect_t *b = mmesa->sarea->boxes;
335 for ( ; i < nr ; i++ ) {
339 mmesa->sarea->nbox = n;
341 ret = drmCommandNone( mmesa->driFd, DRM_MACH64_SWAP );
344 UNLOCK_HARDWARE( mmesa );
345 fprintf( stderr, "DRM_MACH64_SWAP: return = %d\n", ret );
350 if ( MACH64_DEBUG & DEBUG_ALWAYS_SYNC ) {
351 mach64WaitForIdleLocked( mmesa );
354 UNLOCK_HARDWARE( mmesa );
356 mmesa->dirty |= (MACH64_UPLOAD_CONTEXT |
358 MACH64_UPLOAD_CLIPRECTS);
360 #if ENABLE_PERF_BOXES
361 /* Log the performance counters if necessary */
362 mach64PerformanceCounters( mmesa );
366 #if ENABLE_PERF_BOXES
367 /* ================================================================
368 * Performance monitoring
371 void mach64PerformanceCounters( mach64ContextPtr mmesa )
374 if (MACH64_DEBUG & DEBUG_VERBOSE_COUNT) {
375 /* report performance counters */
376 fprintf( stderr, "mach64CopyBuffer: vertexBuffers:%i drawWaits:%i clears:%i\n",
377 mmesa->c_vertexBuffers, mmesa->c_drawWaits, mmesa->c_clears );
380 mmesa->c_vertexBuffers = 0;
381 mmesa->c_drawWaits = 0;
384 if ( mmesa->c_textureSwaps || mmesa->c_textureBytes || mmesa->c_agpTextureBytes ) {
385 if (MACH64_DEBUG & DEBUG_VERBOSE_COUNT) {
386 fprintf( stderr, " textureSwaps:%i textureBytes:%i agpTextureBytes:%i\n",
387 mmesa->c_textureSwaps, mmesa->c_textureBytes, mmesa->c_agpTextureBytes );
389 mmesa->c_textureSwaps = 0;
390 mmesa->c_textureBytes = 0;
391 mmesa->c_agpTextureBytes = 0;
394 mmesa->c_texsrc_agp = 0;
395 mmesa->c_texsrc_card = 0;
397 if (MACH64_DEBUG & DEBUG_VERBOSE_COUNT)
398 fprintf( stderr, "---------------------------------------------------------\n" );
402 void mach64PerformanceBoxesLocked( mach64ContextPtr mmesa )
405 drm_mach64_clear_t clear;
409 GLint x1, y1, x2, y2;
410 drm_clip_rect_t *b = mmesa->sarea->boxes;
413 nbox = mmesa->sarea->nbox;
419 /* setup a single cliprect and call the clear ioctl for each box */
420 mmesa->sarea->nbox = 1;
430 clear.flags = MACH64_BACK;
431 clear.clear_depth = 0;
433 /* Red box if DDFinish was called to wait for rendering to complete */
434 if ( mmesa->c_drawWaits ) {
435 color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 0, 0, 0 );
441 clear.clear_color = color;
443 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
444 &clear, sizeof(drm_mach64_clear_t) );
447 UNLOCK_HARDWARE( mmesa );
448 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
458 /* draw a green box if we had to wait for previous frame(s) to complete */
459 if ( !mmesa->hardwareWentIdle ) {
460 color = mach64PackColor( mmesa->mach64Screen->cpp, 0, 255, 0, 0 );
466 clear.clear_color = color;
468 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
469 &clear, sizeof(drm_mach64_clear_t) );
472 UNLOCK_HARDWARE( mmesa );
473 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
483 /* show approx. ratio of AGP/card textures used - Blue = AGP, Purple = Card */
484 if ( mmesa->c_texsrc_agp || mmesa->c_texsrc_card ) {
485 color = mach64PackColor( mmesa->mach64Screen->cpp, 0, 0, 255, 0 );
486 w = ((GLfloat)mmesa->c_texsrc_agp / (GLfloat)(mmesa->c_texsrc_agp + mmesa->c_texsrc_card))*20;
495 clear.clear_color = color;
497 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
498 &clear, sizeof(drm_mach64_clear_t) );
501 UNLOCK_HARDWARE( mmesa );
502 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
514 color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 0, 255, 0 );
520 clear.clear_color = color;
522 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
523 &clear, sizeof(drm_mach64_clear_t) );
526 UNLOCK_HARDWARE( mmesa );
527 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
538 /* Yellow box if we swapped textures */
539 if ( mmesa->c_textureSwaps ) {
540 color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 255, 0, 0 );
546 clear.clear_color = color;
548 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
549 &clear, sizeof(drm_mach64_clear_t) );
552 UNLOCK_HARDWARE( mmesa );
553 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
564 /* Purple bar for card memory texture blits/uploads */
565 if ( mmesa->c_textureBytes ) {
566 color = mach64PackColor( mmesa->mach64Screen->cpp, 255, 0, 255, 0 );
567 w = mmesa->c_textureBytes / 16384;
570 if (w > (mmesa->driDrawable->w - 44))
571 w = mmesa->driDrawable->w - 44;
579 clear.clear_color = color;
581 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
582 &clear, sizeof(drm_mach64_clear_t) );
585 UNLOCK_HARDWARE( mmesa );
586 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
591 /* Blue bar for AGP memory texture blits/uploads */
592 if ( mmesa->c_agpTextureBytes ) {
593 color = mach64PackColor( mmesa->mach64Screen->cpp, 0, 0, 255, 0 );
594 w = mmesa->c_agpTextureBytes / 16384;
597 if (w > (mmesa->driDrawable->w - 44))
598 w = mmesa->driDrawable->w - 44;
609 clear.clear_color = color;
611 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
612 &clear, sizeof(drm_mach64_clear_t) );
615 UNLOCK_HARDWARE( mmesa );
616 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
621 /* Pink bar for number of vertex buffers used */
622 if ( mmesa->c_vertexBuffers ) {
623 color = mach64PackColor( mmesa->mach64Screen->cpp, 196, 128, 128, 0 );
625 w = mmesa->c_vertexBuffers;
626 if (w > (mmesa->driDrawable->w))
627 w = mmesa->driDrawable->w;
631 y = mmesa->drawY + 8;
641 clear.clear_color = color;
643 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
644 &clear, sizeof(drm_mach64_clear_t) );
647 UNLOCK_HARDWARE( mmesa );
648 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
653 /* restore cliprects */
654 mmesa->sarea->nbox = nbox;
664 /* ================================================================
668 static void mach64DDClear( struct gl_context *ctx, GLbitfield mask )
670 mach64ContextPtr mmesa = MACH64_CONTEXT( ctx );
671 __DRIdrawable *dPriv = mmesa->driDrawable;
672 drm_mach64_clear_t clear;
676 GLint cx, cy, cw, ch;
678 if ( MACH64_DEBUG & DEBUG_VERBOSE_API ) {
679 fprintf( stderr, "mach64DDClear\n");
682 #if ENABLE_PERF_BOXES
683 /* Bump the performance counter */
687 FLUSH_BATCH( mmesa );
689 /* The only state changes we care about here are the RGBA colormask
690 * and scissor/clipping. We'll just update that state, if needed.
692 if ( mmesa->new_state & (MACH64_NEW_MASKS | MACH64_NEW_CLIP) ) {
693 const GLuint save_state = mmesa->new_state;
694 mmesa->new_state &= (MACH64_NEW_MASKS | MACH64_NEW_CLIP);
695 mach64DDUpdateHWState( ctx );
696 mmesa->new_state = save_state & ~(MACH64_NEW_MASKS | MACH64_NEW_CLIP);
699 if ( mask & BUFFER_BIT_FRONT_LEFT ) {
700 flags |= MACH64_FRONT;
701 mask &= ~BUFFER_BIT_FRONT_LEFT;
704 if ( mask & BUFFER_BIT_BACK_LEFT ) {
705 flags |= MACH64_BACK;
706 mask &= ~BUFFER_BIT_BACK_LEFT;
709 if ( ( mask & BUFFER_BIT_DEPTH ) && ctx->Depth.Mask ) {
710 flags |= MACH64_DEPTH;
711 mask &= ~BUFFER_BIT_DEPTH;
715 _swrast_Clear( ctx, mask );
720 LOCK_HARDWARE( mmesa );
722 /* compute region after locking: */
723 cx = ctx->DrawBuffer->_Xmin;
724 cy = ctx->DrawBuffer->_Ymin;
725 cw = ctx->DrawBuffer->_Xmax - cx;
726 ch = ctx->DrawBuffer->_Ymax - cy;
728 /* Flip top to bottom */
730 cy = mmesa->drawY + dPriv->h - cy - ch;
734 if ( mmesa->dirty & ~MACH64_UPLOAD_CLIPRECTS ) {
735 mach64EmitHwStateLocked( mmesa );
738 for ( i = 0 ; i < mmesa->numClipRects ; ) {
739 int nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS, mmesa->numClipRects );
740 drm_clip_rect_t *box = mmesa->pClipRects;
741 drm_clip_rect_t *b = mmesa->sarea->boxes;
744 if (cw != dPriv->w || ch != dPriv->h) {
745 /* clear subregion */
746 for ( ; i < nr ; i++ ) {
749 GLint w = box[i].x2 - x;
750 GLint h = box[i].y2 - y;
752 if ( x < cx ) w -= cx - x, x = cx;
753 if ( y < cy ) h -= cy - y, y = cy;
754 if ( x + w > cx + cw ) w = cx + cw - x;
755 if ( y + h > cy + ch ) h = cy + ch - y;
756 if ( w <= 0 ) continue;
757 if ( h <= 0 ) continue;
767 /* clear whole window */
768 for ( ; i < nr ; i++ ) {
774 mmesa->sarea->nbox = n;
776 if ( MACH64_DEBUG & DEBUG_VERBOSE_IOCTL ) {
778 "DRM_MACH64_CLEAR: flag 0x%x color %x depth %x nbox %d\n",
780 (GLuint)mmesa->ClearColor,
781 (GLuint)mmesa->ClearDepth,
782 mmesa->sarea->nbox );
790 clear.clear_color = mmesa->ClearColor;
791 clear.clear_depth = mmesa->ClearDepth;
793 ret = drmCommandWrite( mmesa->driFd, DRM_MACH64_CLEAR,
794 &clear, sizeof(drm_mach64_clear_t) );
797 UNLOCK_HARDWARE( mmesa );
798 fprintf( stderr, "DRM_MACH64_CLEAR: return = %d\n", ret );
803 UNLOCK_HARDWARE( mmesa );
805 mmesa->dirty |= (MACH64_UPLOAD_CONTEXT |
807 MACH64_UPLOAD_CLIPRECTS);
812 void mach64WaitForIdleLocked( mach64ContextPtr mmesa )
814 int fd = mmesa->driFd;
819 ret = drmCommandNone( fd, DRM_MACH64_IDLE );
820 } while ( ( ret == -EBUSY ) && ( to++ < MACH64_TIMEOUT ) );
823 drmCommandNone( fd, DRM_MACH64_RESET );
824 UNLOCK_HARDWARE( mmesa );
825 fprintf( stderr, "Error: Mach64 timed out... exiting\n" );
830 /* Flush the DMA queue to the hardware */
831 void mach64FlushDMALocked( mach64ContextPtr mmesa )
833 int fd = mmesa->driFd;
836 ret = drmCommandNone( fd, DRM_MACH64_FLUSH );
839 drmCommandNone( fd, DRM_MACH64_RESET );
840 UNLOCK_HARDWARE( mmesa );
841 fprintf( stderr, "Error flushing DMA... exiting\n" );
845 mmesa->dirty |= (MACH64_UPLOAD_CONTEXT |
847 MACH64_UPLOAD_CLIPRECTS);
851 /* For client-side state emits - currently unused */
852 void mach64UploadHwStateLocked( mach64ContextPtr mmesa )
854 drm_mach64_sarea_t *sarea = mmesa->sarea;
856 drm_mach64_context_regs_t *regs = &sarea->context_state;
857 unsigned int dirty = sarea->dirty;
858 CARD32 offset = ((regs->tex_size_pitch & 0xf0) >> 2);
864 if ( dirty & MACH64_UPLOAD_MISC ) {
865 DMAOUTREG( MACH64_DP_MIX, regs->dp_mix );
866 DMAOUTREG( MACH64_DP_SRC, regs->dp_src );
867 DMAOUTREG( MACH64_CLR_CMP_CNTL, regs->clr_cmp_cntl );
868 DMAOUTREG( MACH64_GUI_TRAJ_CNTL, regs->gui_traj_cntl );
869 DMAOUTREG( MACH64_SC_LEFT_RIGHT, regs->sc_left_right );
870 DMAOUTREG( MACH64_SC_TOP_BOTTOM, regs->sc_top_bottom );
871 sarea->dirty &= ~MACH64_UPLOAD_MISC;
874 if ( dirty & MACH64_UPLOAD_DST_OFF_PITCH ) {
875 DMAOUTREG( MACH64_DST_OFF_PITCH, regs->dst_off_pitch );
876 sarea->dirty &= ~MACH64_UPLOAD_DST_OFF_PITCH;
878 if ( dirty & MACH64_UPLOAD_Z_OFF_PITCH ) {
879 DMAOUTREG( MACH64_Z_OFF_PITCH, regs->z_off_pitch );
880 sarea->dirty &= ~MACH64_UPLOAD_Z_OFF_PITCH;
882 if ( dirty & MACH64_UPLOAD_Z_ALPHA_CNTL ) {
883 DMAOUTREG( MACH64_Z_CNTL, regs->z_cntl );
884 DMAOUTREG( MACH64_ALPHA_TST_CNTL, regs->alpha_tst_cntl );
885 sarea->dirty &= ~MACH64_UPLOAD_Z_ALPHA_CNTL;
887 if ( dirty & MACH64_UPLOAD_SCALE_3D_CNTL ) {
888 DMAOUTREG( MACH64_SCALE_3D_CNTL, regs->scale_3d_cntl );
889 sarea->dirty &= ~MACH64_UPLOAD_SCALE_3D_CNTL;
891 if ( dirty & MACH64_UPLOAD_DP_FOG_CLR ) {
892 DMAOUTREG( MACH64_DP_FOG_CLR, regs->dp_fog_clr );
893 sarea->dirty &= ~MACH64_UPLOAD_DP_FOG_CLR;
895 if ( dirty & MACH64_UPLOAD_DP_WRITE_MASK ) {
896 DMAOUTREG( MACH64_DP_WRITE_MASK, regs->dp_write_mask );
897 sarea->dirty &= ~MACH64_UPLOAD_DP_WRITE_MASK;
899 if ( dirty & MACH64_UPLOAD_DP_PIX_WIDTH ) {
900 DMAOUTREG( MACH64_DP_PIX_WIDTH, regs->dp_pix_width );
901 sarea->dirty &= ~MACH64_UPLOAD_DP_PIX_WIDTH;
903 if ( dirty & MACH64_UPLOAD_SETUP_CNTL ) {
904 DMAOUTREG( MACH64_SETUP_CNTL, regs->setup_cntl );
905 sarea->dirty &= ~MACH64_UPLOAD_SETUP_CNTL;
908 if ( dirty & MACH64_UPLOAD_TEXTURE ) {
909 DMAOUTREG( MACH64_TEX_SIZE_PITCH, regs->tex_size_pitch );
910 DMAOUTREG( MACH64_TEX_CNTL, regs->tex_cntl );
911 DMAOUTREG( MACH64_SECONDARY_TEX_OFF, regs->secondary_tex_off );
912 DMAOUTREG( MACH64_TEX_0_OFF + offset, regs->tex_offset );
913 sarea->dirty &= ~MACH64_UPLOAD_TEXTURE;
917 if ( dirty & MACH64_UPLOAD_CLIPRECTS ) {
918 DMAOUTREG( MACH64_SC_LEFT_RIGHT, regs->sc_left_right );
919 DMAOUTREG( MACH64_SC_TOP_BOTTOM, regs->sc_top_bottom );
920 sarea->dirty &= ~MACH64_UPLOAD_CLIPRECTS;
929 void mach64InitIoctlFuncs( struct dd_function_table *functions )
931 functions->Clear = mach64DDClear;