1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/hash.h"
35 #include "main/fbobject.h"
36 #include "main/mfeatures.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
43 PUBLIC const char __driConfigOptions[] =
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
50 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
57 DRI_CONF_OPT_BEGIN(texture_tiling, bool, true)
58 DRI_CONF_DESC(en, "Enable texture tiling")
61 DRI_CONF_OPT_BEGIN(hiz, bool, true)
62 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
65 DRI_CONF_OPT_BEGIN(early_z, bool, false)
66 DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
69 DRI_CONF_OPT_BEGIN(fragment_shader, bool, true)
70 DRI_CONF_DESC(en, "Enable limited ARB_fragment_shader support on 915/945.")
74 DRI_CONF_SECTION_QUALITY
75 DRI_CONF_FORCE_S3TC_ENABLE(false)
76 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
78 DRI_CONF_SECTION_DEBUG
79 DRI_CONF_NO_RAST(false)
80 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
81 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
82 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
83 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
85 DRI_CONF_OPT_BEGIN(stub_occlusion_query, bool, false)
86 DRI_CONF_DESC(en, "Enable stub ARB_occlusion_query support on 915/945.")
89 DRI_CONF_OPT_BEGIN(shader_precompile, bool, true)
90 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
95 const GLuint __driNConfigOptions = 15;
97 #include "intel_batchbuffer.h"
98 #include "intel_buffers.h"
99 #include "intel_bufmgr.h"
100 #include "intel_chipset.h"
101 #include "intel_fbo.h"
102 #include "intel_mipmap_tree.h"
103 #include "intel_screen.h"
104 #include "intel_tex.h"
105 #include "intel_regions.h"
107 #include "i915_drm.h"
109 #ifdef USE_NEW_INTERFACE
110 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
111 #endif /*USE_NEW_INTERFACE */
114 * For debugging purposes, this returns a time in seconds.
121 clock_gettime(CLOCK_MONOTONIC, &tp);
123 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
127 aub_dump_bmp(struct gl_context *ctx)
129 struct gl_framebuffer *fb = ctx->DrawBuffer;
131 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
132 struct intel_renderbuffer *irb =
133 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
135 if (irb && irb->mt) {
136 enum aub_dump_bmp_format format;
138 switch (irb->Base.Base.Format) {
139 case MESA_FORMAT_ARGB8888:
140 case MESA_FORMAT_XRGB8888:
141 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
147 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
150 irb->Base.Base.Width,
151 irb->Base.Base.Height,
153 irb->mt->region->pitch *
154 irb->mt->region->cpp,
160 static const __DRItexBufferExtension intelTexBufferExtension = {
161 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
167 intelDRI2Flush(__DRIdrawable *drawable)
169 GET_CURRENT_CONTEXT(ctx);
170 struct intel_context *intel = intel_context(ctx);
175 INTEL_FIREVERTICES(intel);
177 intel_downsample_for_dri2_flush(intel, drawable);
178 intel->need_throttle = true;
180 if (intel->batch.used)
181 intel_batchbuffer_flush(intel);
183 if (INTEL_DEBUG & DEBUG_AUB) {
188 static const struct __DRI2flushExtensionRec intelFlushExtension = {
189 { __DRI2_FLUSH, __DRI2_FLUSH_VERSION },
191 dri2InvalidateDrawable,
194 struct intel_image_format intel_image_formats[] = {
195 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
196 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
198 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
199 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
201 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
202 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
203 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
204 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
206 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
207 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
208 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
209 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
211 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
212 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
213 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
214 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
216 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
217 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
218 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
219 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
221 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
222 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
223 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
224 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
226 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
227 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
228 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
230 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
231 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
232 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
234 /* For YUYV buffers, we set up two overlapping DRI images and treat
235 * them as planar buffers in the compositors. Plane 0 is GR88 and
236 * samples YU or YV pairs and places Y into the R component, while
237 * plane 1 is ARGB and samples YUYV clusters and places pairs and
238 * places U into the G component and V into A. This lets the
239 * texture sampler interpolate the Y components correctly when
240 * sampling from plane 0, and interpolate U and V correctly when
241 * sampling from plane 1. */
242 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
243 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
244 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
248 intel_allocate_image(int dri_format, void *loaderPrivate)
252 image = CALLOC(sizeof *image);
256 image->dri_format = dri_format;
259 switch (dri_format) {
260 case __DRI_IMAGE_FORMAT_RGB565:
261 image->format = MESA_FORMAT_RGB565;
263 case __DRI_IMAGE_FORMAT_XRGB8888:
264 image->format = MESA_FORMAT_XRGB8888;
266 case __DRI_IMAGE_FORMAT_ARGB8888:
267 image->format = MESA_FORMAT_ARGB8888;
269 case __DRI_IMAGE_FORMAT_ABGR8888:
270 image->format = MESA_FORMAT_RGBA8888_REV;
272 case __DRI_IMAGE_FORMAT_XBGR8888:
273 image->format = MESA_FORMAT_RGBX8888_REV;
275 case __DRI_IMAGE_FORMAT_R8:
276 image->format = MESA_FORMAT_R8;
278 case __DRI_IMAGE_FORMAT_GR88:
279 image->format = MESA_FORMAT_GR88;
281 case __DRI_IMAGE_FORMAT_NONE:
282 image->format = MESA_FORMAT_NONE;
289 image->internal_format = _mesa_get_format_base_format(image->format);
290 image->data = loaderPrivate;
296 intel_create_image_from_name(__DRIscreen *screen,
297 int width, int height, int format,
298 int name, int pitch, void *loaderPrivate)
300 struct intel_screen *intelScreen = screen->driverPrivate;
304 image = intel_allocate_image(format, loaderPrivate);
305 if (image->format == MESA_FORMAT_NONE)
308 cpp = _mesa_get_format_bytes(image->format);
309 image->region = intel_region_alloc_for_handle(intelScreen,
311 pitch, name, "image");
312 if (image->region == NULL) {
321 intel_create_image_from_renderbuffer(__DRIcontext *context,
322 int renderbuffer, void *loaderPrivate)
325 struct intel_context *intel = context->driverPrivate;
326 struct gl_renderbuffer *rb;
327 struct intel_renderbuffer *irb;
329 rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
331 _mesa_error(&intel->ctx,
332 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
336 irb = intel_renderbuffer(rb);
337 image = CALLOC(sizeof *image);
341 image->internal_format = rb->InternalFormat;
342 image->format = rb->Format;
344 image->data = loaderPrivate;
345 intel_region_reference(&image->region, irb->mt->region);
347 switch (image->format) {
348 case MESA_FORMAT_RGB565:
349 image->dri_format = __DRI_IMAGE_FORMAT_RGB565;
351 case MESA_FORMAT_XRGB8888:
352 image->dri_format = __DRI_IMAGE_FORMAT_XRGB8888;
354 case MESA_FORMAT_ARGB8888:
355 image->dri_format = __DRI_IMAGE_FORMAT_ARGB8888;
357 case MESA_FORMAT_RGBA8888_REV:
358 image->dri_format = __DRI_IMAGE_FORMAT_ABGR8888;
361 image->dri_format = __DRI_IMAGE_FORMAT_R8;
363 case MESA_FORMAT_RG88:
364 image->dri_format = __DRI_IMAGE_FORMAT_GR88;
372 intel_destroy_image(__DRIimage *image)
374 intel_region_release(&image->region);
379 intel_create_image(__DRIscreen *screen,
380 int width, int height, int format,
385 struct intel_screen *intelScreen = screen->driverPrivate;
389 tiling = I915_TILING_X;
390 if (use & __DRI_IMAGE_USE_CURSOR) {
391 if (width != 64 || height != 64)
393 tiling = I915_TILING_NONE;
396 image = intel_allocate_image(format, loaderPrivate);
397 cpp = _mesa_get_format_bytes(image->format);
399 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
400 if (image->region == NULL) {
409 intel_query_image(__DRIimage *image, int attrib, int *value)
412 case __DRI_IMAGE_ATTRIB_STRIDE:
413 *value = image->region->pitch * image->region->cpp;
415 case __DRI_IMAGE_ATTRIB_HANDLE:
416 *value = image->region->bo->handle;
418 case __DRI_IMAGE_ATTRIB_NAME:
419 return intel_region_flink(image->region, (uint32_t *) value);
420 case __DRI_IMAGE_ATTRIB_FORMAT:
421 *value = image->dri_format;
423 case __DRI_IMAGE_ATTRIB_WIDTH:
424 *value = image->region->width;
426 case __DRI_IMAGE_ATTRIB_HEIGHT:
427 *value = image->region->height;
429 case __DRI_IMAGE_ATTRIB_COMPONENTS:
430 if (image->planar_format == NULL)
432 *value = image->planar_format->components;
440 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
444 image = CALLOC(sizeof *image);
448 intel_region_reference(&image->region, orig_image->region);
449 if (image->region == NULL) {
454 image->internal_format = orig_image->internal_format;
455 image->planar_format = orig_image->planar_format;
456 image->dri_format = orig_image->dri_format;
457 image->format = orig_image->format;
458 image->offset = orig_image->offset;
459 image->data = loaderPrivate;
461 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
462 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
468 intel_validate_usage(__DRIimage *image, unsigned int use)
470 if (use & __DRI_IMAGE_USE_CURSOR) {
471 if (image->region->width != 64 || image->region->height != 64)
479 intel_create_image_from_names(__DRIscreen *screen,
480 int width, int height, int fourcc,
481 int *names, int num_names,
482 int *strides, int *offsets,
485 struct intel_image_format *f = NULL;
489 if (screen == NULL || names == NULL || num_names != 1)
492 for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
493 if (intel_image_formats[i].fourcc == fourcc) {
494 f = &intel_image_formats[i];
501 image = intel_create_image_from_name(screen, width, height,
502 __DRI_IMAGE_FORMAT_NONE,
503 names[0], strides[0],
509 image->planar_format = f;
510 for (i = 0; i < f->nplanes; i++) {
511 index = f->planes[i].buffer_index;
512 image->offsets[index] = offsets[index];
513 image->strides[index] = strides[index];
520 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
522 int width, height, offset, stride, dri_format, cpp, index, pitch;
523 struct intel_image_format *f;
524 uint32_t mask_x, mask_y;
527 if (parent == NULL || parent->planar_format == NULL)
530 f = parent->planar_format;
532 if (plane >= f->nplanes)
535 width = parent->region->width >> f->planes[plane].width_shift;
536 height = parent->region->height >> f->planes[plane].height_shift;
537 dri_format = f->planes[plane].dri_format;
538 index = f->planes[plane].buffer_index;
539 offset = parent->offsets[index];
540 stride = parent->strides[index];
542 image = intel_allocate_image(dri_format, loaderPrivate);
543 cpp = _mesa_get_format_bytes(image->format); /* safe since no none format */
544 pitch = stride / cpp;
545 if (offset + height * cpp * pitch > parent->region->bo->size) {
546 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
551 image->region = calloc(sizeof(*image->region), 1);
552 if (image->region == NULL) {
557 image->region->cpp = _mesa_get_format_bytes(image->format);
558 image->region->width = width;
559 image->region->height = height;
560 image->region->pitch = pitch;
561 image->region->refcount = 1;
562 image->region->bo = parent->region->bo;
563 drm_intel_bo_reference(image->region->bo);
564 image->region->tiling = parent->region->tiling;
565 image->region->screen = parent->region->screen;
566 image->offset = offset;
568 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
571 "intel_create_sub_image: offset not on tile boundary");
576 static struct __DRIimageExtensionRec intelImageExtension = {
578 intel_create_image_from_name,
579 intel_create_image_from_renderbuffer,
584 intel_validate_usage,
585 intel_create_image_from_names,
589 static const __DRIextension *intelScreenExtensions[] = {
590 &intelTexBufferExtension.base,
591 &intelFlushExtension.base,
592 &intelImageExtension.base,
593 &dri2ConfigQueryExtension.base,
598 intel_get_param(__DRIscreen *psp, int param, int *value)
601 struct drm_i915_getparam gp;
603 memset(&gp, 0, sizeof(gp));
607 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
610 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
618 intel_get_boolean(__DRIscreen *psp, int param)
621 return intel_get_param(psp, param, &value) && value;
625 nop_callback(GLuint key, void *data, void *userData)
630 intelDestroyScreen(__DRIscreen * sPriv)
632 struct intel_screen *intelScreen = sPriv->driverPrivate;
634 dri_bufmgr_destroy(intelScreen->bufmgr);
635 driDestroyOptionInfo(&intelScreen->optionCache);
637 /* Some regions may still have references to them at this point, so
638 * flush the hash table to prevent _mesa_DeleteHashTable() from
639 * complaining about the hash not being empty; */
640 _mesa_HashDeleteAll(intelScreen->named_regions, nop_callback, NULL);
641 _mesa_DeleteHashTable(intelScreen->named_regions);
644 sPriv->driverPrivate = NULL;
649 * This is called when we need to set up GL rendering to a new X window.
652 intelCreateBuffer(__DRIscreen * driScrnPriv,
653 __DRIdrawable * driDrawPriv,
654 const struct gl_config * mesaVis, GLboolean isPixmap)
656 struct intel_renderbuffer *rb;
657 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
659 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
660 struct gl_framebuffer *fb;
665 fb = CALLOC_STRUCT(gl_framebuffer);
669 _mesa_initialize_window_framebuffer(fb, mesaVis);
671 if (mesaVis->redBits == 5)
672 rgbFormat = MESA_FORMAT_RGB565;
673 else if (mesaVis->alphaBits == 0)
674 rgbFormat = MESA_FORMAT_XRGB8888;
676 rgbFormat = MESA_FORMAT_ARGB8888;
678 /* setup the hardware-based renderbuffers */
679 rb = intel_create_renderbuffer(rgbFormat, num_samples);
680 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
682 if (mesaVis->doubleBufferMode) {
683 rb = intel_create_renderbuffer(rgbFormat, num_samples);
684 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
688 * Assert here that the gl_config has an expected depth/stencil bit
689 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
690 * which constructs the advertised configs.)
692 if (mesaVis->depthBits == 24) {
693 assert(mesaVis->stencilBits == 8);
695 if (screen->hw_has_separate_stencil) {
696 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
698 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
699 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
701 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
704 * Use combined depth/stencil. Note that the renderbuffer is
705 * attached to two attachment points.
707 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
709 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
710 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
713 else if (mesaVis->depthBits == 16) {
714 assert(mesaVis->stencilBits == 0);
715 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
717 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
720 assert(mesaVis->depthBits == 0);
721 assert(mesaVis->stencilBits == 0);
724 /* now add any/all software-based renderbuffers we may need */
725 _swrast_add_soft_renderbuffers(fb,
726 false, /* never sw color */
727 false, /* never sw depth */
728 false, /* never sw stencil */
729 mesaVis->accumRedBits > 0,
730 false, /* never sw alpha */
731 false /* never sw aux */ );
732 driDrawPriv->driverPrivate = fb;
738 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
740 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
742 _mesa_reference_framebuffer(&fb, NULL);
745 /* There are probably better ways to do this, such as an
746 * init-designated function to register chipids and createcontext
750 i830CreateContext(const struct gl_config *mesaVis,
751 __DRIcontext *driContextPriv,
752 void *sharedContextPrivate);
755 i915CreateContext(int api,
756 const struct gl_config *mesaVis,
757 __DRIcontext *driContextPriv,
758 unsigned major_version,
759 unsigned minor_version,
761 void *sharedContextPrivate);
763 brwCreateContext(int api,
764 const struct gl_config *mesaVis,
765 __DRIcontext *driContextPriv,
766 unsigned major_version,
767 unsigned minor_version,
770 void *sharedContextPrivate);
773 intelCreateContext(gl_api api,
774 const struct gl_config * mesaVis,
775 __DRIcontext * driContextPriv,
776 unsigned major_version,
777 unsigned minor_version,
780 void *sharedContextPrivate)
782 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
783 struct intel_screen *intelScreen = sPriv->driverPrivate;
784 bool success = false;
787 if (IS_9XX(intelScreen->deviceID)) {
788 success = i915CreateContext(api, mesaVis, driContextPriv,
789 major_version, minor_version, error,
790 sharedContextPrivate);
794 if (major_version > 1 || minor_version > 3) {
795 *error = __DRI_CTX_ERROR_BAD_VERSION;
802 *error = __DRI_CTX_ERROR_BAD_API;
807 intelScreen->no_vbo = true;
808 success = i830CreateContext(mesaVis, driContextPriv,
809 sharedContextPrivate);
811 *error = __DRI_CTX_ERROR_NO_MEMORY;
815 success = brwCreateContext(api, mesaVis,
817 major_version, minor_version, flags,
818 error, sharedContextPrivate);
824 if (driContextPriv->driverPrivate != NULL)
825 intelDestroyContext(driContextPriv);
831 intel_init_bufmgr(struct intel_screen *intelScreen)
833 __DRIscreen *spriv = intelScreen->driScrnPriv;
836 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
838 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
839 if (intelScreen->bufmgr == NULL) {
840 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
845 if (!intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences) ||
847 fprintf(stderr, "[%s: %u] Kernel 2.6.29 required.\n", __func__, __LINE__);
851 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
853 intelScreen->named_regions = _mesa_NewHashTable();
855 intelScreen->relaxed_relocations = 0;
856 intelScreen->relaxed_relocations |=
857 intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA) << 0;
863 * Override intel_screen.hw_has_separate_stencil with environment variable
864 * INTEL_SEPARATE_STENCIL.
866 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
867 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
871 intel_override_separate_stencil(struct intel_screen *screen)
873 const char *s = getenv("INTEL_SEPARATE_STENCIL");
876 } else if (!strncmp("0", s, 2)) {
877 screen->hw_has_separate_stencil = false;
878 } else if (!strncmp("1", s, 2)) {
879 screen->hw_has_separate_stencil = true;
882 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
883 "invalid value and is ignored", s);
888 intel_detect_swizzling(struct intel_screen *screen)
890 drm_intel_bo *buffer;
891 unsigned long flags = 0;
892 unsigned long aligned_pitch;
893 uint32_t tiling = I915_TILING_X;
894 uint32_t swizzle_mode = 0;
896 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
898 &tiling, &aligned_pitch, flags);
902 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
903 drm_intel_bo_unreference(buffer);
905 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
912 intel_screen_make_configs(__DRIscreen *dri_screen)
914 static const GLenum back_buffer_modes[] = {
915 GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
918 static const uint8_t singlesample_samples[1] = {0};
919 static const uint8_t multisample_samples[2] = {4, 8};
921 struct intel_screen *screen = dri_screen->driverPrivate;
924 uint8_t depth_bits[4], stencil_bits[4];
925 __DRIconfig **configs = NULL;
927 fb_format[0] = GL_RGB;
928 fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
930 fb_format[1] = GL_BGR;
931 fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
933 fb_format[2] = GL_BGRA;
934 fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
936 /* Generate singlesample configs without accumulation buffer. */
937 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
938 __DRIconfig **new_configs;
939 const int num_depth_stencil_bits = 2;
941 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
942 * buffer that has a different number of bits per pixel than the color
943 * buffer. This isn't yet supported here.
948 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
956 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
959 num_depth_stencil_bits,
961 ARRAY_SIZE(back_buffer_modes),
962 singlesample_samples, 1,
964 configs = driConcatConfigs(configs, new_configs);
967 /* Generate the minimum possible set of configs that include an
968 * accumulation buffer.
970 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
971 __DRIconfig **new_configs;
973 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
981 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
982 depth_bits, stencil_bits, 1,
983 back_buffer_modes + 1, 1,
984 singlesample_samples, 1,
986 configs = driConcatConfigs(configs, new_configs);
989 /* Generate multisample configs.
991 * This loop breaks early, and hence is a no-op, on gen < 6.
993 * Multisample configs must follow the singlesample configs in order to
994 * work around an X server bug present in 1.12. The X server chooses to
995 * associate the first listed RGBA888-Z24S8 config, regardless of its
996 * sample count, with the 32-bit depth visual used for compositing.
998 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
999 * supported. Singlebuffer configs are not supported because no one wants
1000 * them. GLX_SWAP_COPY_OML is not supported due to page flipping.
1002 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
1003 if (screen->gen < 6)
1006 __DRIconfig **new_configs;
1007 const int num_depth_stencil_bits = 2;
1008 int num_msaa_modes = 0;
1011 stencil_bits[0] = 0;
1013 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
1015 stencil_bits[1] = 0;
1018 stencil_bits[1] = 8;
1021 if (screen->gen >= 7)
1023 else if (screen->gen == 6)
1026 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
1029 num_depth_stencil_bits,
1030 back_buffer_modes + 1, 1,
1031 multisample_samples,
1034 configs = driConcatConfigs(configs, new_configs);
1037 if (configs == NULL) {
1038 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1047 * This is the driver specific part of the createNewScreen entry point.
1048 * Called when using DRI2.
1050 * \return the struct gl_config supported by this driver
1053 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1055 struct intel_screen *intelScreen;
1056 unsigned int api_mask;
1058 if (psp->dri2.loader->base.version <= 2 ||
1059 psp->dri2.loader->getBuffersWithFormat == NULL) {
1061 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1062 "support required\n");
1066 /* Allocate the private area */
1067 intelScreen = CALLOC(sizeof *intelScreen);
1069 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1072 /* parse information in __driConfigOptions */
1073 driParseOptionInfo(&intelScreen->optionCache,
1074 __driConfigOptions, __driNConfigOptions);
1076 intelScreen->driScrnPriv = psp;
1077 psp->driverPrivate = (void *) intelScreen;
1079 if (!intel_init_bufmgr(intelScreen))
1082 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1084 intelScreen->kernel_has_gen7_sol_reset =
1085 intel_get_boolean(intelScreen->driScrnPriv,
1086 I915_PARAM_HAS_GEN7_SOL_RESET);
1088 if (IS_GEN7(intelScreen->deviceID)) {
1089 intelScreen->gen = 7;
1090 } else if (IS_GEN6(intelScreen->deviceID)) {
1091 intelScreen->gen = 6;
1092 } else if (IS_GEN5(intelScreen->deviceID)) {
1093 intelScreen->gen = 5;
1094 } else if (IS_965(intelScreen->deviceID)) {
1095 intelScreen->gen = 4;
1096 } else if (IS_9XX(intelScreen->deviceID)) {
1097 intelScreen->gen = 3;
1099 intelScreen->gen = 2;
1102 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1103 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1106 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1108 if (success && has_llc)
1109 intelScreen->hw_has_llc = true;
1110 else if (!success && intelScreen->gen >= 6)
1111 intelScreen->hw_has_llc = true;
1113 intel_override_separate_stencil(intelScreen);
1115 api_mask = (1 << __DRI_API_OPENGL);
1117 api_mask |= (1 << __DRI_API_GLES);
1120 api_mask |= (1 << __DRI_API_GLES2);
1123 if (IS_9XX(intelScreen->deviceID) || IS_965(intelScreen->deviceID))
1124 psp->api_mask = api_mask;
1126 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1128 psp->extensions = intelScreenExtensions;
1130 return (const __DRIconfig**) intel_screen_make_configs(psp);
1133 struct intel_buffer {
1135 struct intel_region *region;
1138 static __DRIbuffer *
1139 intelAllocateBuffer(__DRIscreen *screen,
1140 unsigned attachment, unsigned format,
1141 int width, int height)
1143 struct intel_buffer *intelBuffer;
1144 struct intel_screen *intelScreen = screen->driverPrivate;
1146 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1147 attachment == __DRI_BUFFER_BACK_LEFT);
1149 intelBuffer = CALLOC(sizeof *intelBuffer);
1150 if (intelBuffer == NULL)
1153 /* The front and back buffers are color buffers, which are X tiled. */
1154 intelBuffer->region = intel_region_alloc(intelScreen,
1161 if (intelBuffer->region == NULL) {
1166 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1168 intelBuffer->base.attachment = attachment;
1169 intelBuffer->base.cpp = intelBuffer->region->cpp;
1170 intelBuffer->base.pitch =
1171 intelBuffer->region->pitch * intelBuffer->region->cpp;
1173 return &intelBuffer->base;
1177 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1179 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1181 intel_region_release(&intelBuffer->region);
1186 const struct __DriverAPIRec driDriverAPI = {
1187 .InitScreen = intelInitScreen2,
1188 .DestroyScreen = intelDestroyScreen,
1189 .CreateContext = intelCreateContext,
1190 .DestroyContext = intelDestroyContext,
1191 .CreateBuffer = intelCreateBuffer,
1192 .DestroyBuffer = intelDestroyBuffer,
1193 .MakeCurrent = intelMakeCurrent,
1194 .UnbindContext = intelUnbindContext,
1195 .AllocateBuffer = intelAllocateBuffer,
1196 .ReleaseBuffer = intelReleaseBuffer
1199 /* This is the table of extensions that the loader will dlsym() for. */
1200 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1201 &driCoreExtension.base,
1202 &driDRI2Extension.base,