1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/framebuffer.h"
32 #include "main/renderbuffer.h"
33 #include "main/hash.h"
34 #include "main/fbobject.h"
35 #include "main/mfeatures.h"
36 #include "main/version.h"
37 #include "swrast/s_renderbuffer.h"
42 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_SECTION_PERFORMANCE
45 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
46 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
47 * DRI_CONF_BO_REUSE_ALL
49 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
50 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
51 DRI_CONF_ENUM(0, "Disable buffer object reuse")
52 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
56 DRI_CONF_OPT_BEGIN(texture_tiling, bool, true)
57 DRI_CONF_DESC(en, "Enable texture tiling")
60 DRI_CONF_OPT_BEGIN(hiz, bool, true)
61 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
64 DRI_CONF_OPT_BEGIN(early_z, bool, false)
65 DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
68 DRI_CONF_OPT_BEGIN(fragment_shader, bool, true)
69 DRI_CONF_DESC(en, "Enable limited ARB_fragment_shader support on 915/945.")
73 DRI_CONF_SECTION_QUALITY
74 DRI_CONF_FORCE_S3TC_ENABLE(false)
75 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
77 DRI_CONF_SECTION_DEBUG
78 DRI_CONF_NO_RAST(false)
79 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
80 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
81 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
82 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
84 DRI_CONF_OPT_BEGIN(stub_occlusion_query, bool, false)
85 DRI_CONF_DESC(en, "Enable stub ARB_occlusion_query support on 915/945.")
88 DRI_CONF_OPT_BEGIN(shader_precompile, bool, false)
89 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
94 const GLuint __driNConfigOptions = 15;
96 #include "intel_batchbuffer.h"
97 #include "intel_buffers.h"
98 #include "intel_bufmgr.h"
99 #include "intel_chipset.h"
100 #include "intel_fbo.h"
101 #include "intel_mipmap_tree.h"
102 #include "intel_screen.h"
103 #include "intel_tex.h"
104 #include "intel_regions.h"
106 #include "i915_drm.h"
108 #ifdef USE_NEW_INTERFACE
109 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
110 #endif /*USE_NEW_INTERFACE */
113 * For debugging purposes, this returns a time in seconds.
120 clock_gettime(CLOCK_MONOTONIC, &tp);
122 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
126 aub_dump_bmp(struct gl_context *ctx)
128 struct gl_framebuffer *fb = ctx->DrawBuffer;
130 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
131 struct intel_renderbuffer *irb =
132 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
134 if (irb && irb->mt) {
135 enum aub_dump_bmp_format format;
137 switch (irb->Base.Base.Format) {
138 case MESA_FORMAT_ARGB8888:
139 case MESA_FORMAT_XRGB8888:
140 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
146 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
149 irb->Base.Base.Width,
150 irb->Base.Base.Height,
152 irb->mt->region->pitch *
153 irb->mt->region->cpp,
159 static const __DRItexBufferExtension intelTexBufferExtension = {
160 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
166 intelDRI2Flush(__DRIdrawable *drawable)
168 GET_CURRENT_CONTEXT(ctx);
169 struct intel_context *intel = intel_context(ctx);
174 INTEL_FIREVERTICES(intel);
176 intel_downsample_for_dri2_flush(intel, drawable);
177 intel->need_throttle = true;
179 if (intel->batch.used)
180 intel_batchbuffer_flush(intel);
182 if (INTEL_DEBUG & DEBUG_AUB) {
187 static const struct __DRI2flushExtensionRec intelFlushExtension = {
188 { __DRI2_FLUSH, __DRI2_FLUSH_VERSION },
190 dri2InvalidateDrawable,
194 intel_allocate_image(int dri_format, void *loaderPrivate)
198 image = CALLOC(sizeof *image);
202 image->dri_format = dri_format;
205 switch (dri_format) {
206 case __DRI_IMAGE_FORMAT_RGB565:
207 image->format = MESA_FORMAT_RGB565;
209 case __DRI_IMAGE_FORMAT_XRGB8888:
210 image->format = MESA_FORMAT_XRGB8888;
212 case __DRI_IMAGE_FORMAT_ARGB8888:
213 image->format = MESA_FORMAT_ARGB8888;
215 case __DRI_IMAGE_FORMAT_ABGR8888:
216 image->format = MESA_FORMAT_RGBA8888_REV;
218 case __DRI_IMAGE_FORMAT_XBGR8888:
219 image->format = MESA_FORMAT_RGBX8888_REV;
221 case __DRI_IMAGE_FORMAT_R8:
222 image->format = MESA_FORMAT_R8;
224 case __DRI_IMAGE_FORMAT_GR88:
225 image->format = MESA_FORMAT_GR88;
227 case __DRI_IMAGE_FORMAT_NONE:
228 image->format = MESA_FORMAT_NONE;
235 image->internal_format = _mesa_get_format_base_format(image->format);
236 image->data = loaderPrivate;
242 intel_create_image_from_name(__DRIscreen *screen,
243 int width, int height, int format,
244 int name, int pitch, void *loaderPrivate)
246 struct intel_screen *intelScreen = screen->driverPrivate;
250 image = intel_allocate_image(format, loaderPrivate);
251 if (image->format == MESA_FORMAT_NONE)
254 cpp = _mesa_get_format_bytes(image->format);
255 image->region = intel_region_alloc_for_handle(intelScreen,
257 pitch, name, "image");
258 if (image->region == NULL) {
267 intel_create_image_from_renderbuffer(__DRIcontext *context,
268 int renderbuffer, void *loaderPrivate)
271 struct intel_context *intel = context->driverPrivate;
272 struct gl_renderbuffer *rb;
273 struct intel_renderbuffer *irb;
275 rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
277 _mesa_error(&intel->ctx,
278 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
282 irb = intel_renderbuffer(rb);
283 image = CALLOC(sizeof *image);
287 image->internal_format = rb->InternalFormat;
288 image->format = rb->Format;
290 image->data = loaderPrivate;
291 intel_region_reference(&image->region, irb->mt->region);
293 switch (image->format) {
294 case MESA_FORMAT_RGB565:
295 image->dri_format = __DRI_IMAGE_FORMAT_RGB565;
297 case MESA_FORMAT_XRGB8888:
298 image->dri_format = __DRI_IMAGE_FORMAT_XRGB8888;
300 case MESA_FORMAT_ARGB8888:
301 image->dri_format = __DRI_IMAGE_FORMAT_ARGB8888;
303 case MESA_FORMAT_RGBA8888_REV:
304 image->dri_format = __DRI_IMAGE_FORMAT_ABGR8888;
307 image->dri_format = __DRI_IMAGE_FORMAT_R8;
309 case MESA_FORMAT_RG88:
310 image->dri_format = __DRI_IMAGE_FORMAT_GR88;
318 intel_destroy_image(__DRIimage *image)
320 intel_region_release(&image->region);
325 intel_create_image(__DRIscreen *screen,
326 int width, int height, int format,
331 struct intel_screen *intelScreen = screen->driverPrivate;
335 tiling = I915_TILING_X;
336 if (use & __DRI_IMAGE_USE_CURSOR) {
337 if (width != 64 || height != 64)
339 tiling = I915_TILING_NONE;
342 /* We only support write for cursor drm images */
343 if ((use & __DRI_IMAGE_USE_WRITE) &&
344 use != (__DRI_IMAGE_USE_WRITE | __DRI_IMAGE_USE_CURSOR))
347 image = intel_allocate_image(format, loaderPrivate);
349 cpp = _mesa_get_format_bytes(image->format);
351 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
352 if (image->region == NULL) {
361 intel_query_image(__DRIimage *image, int attrib, int *value)
364 case __DRI_IMAGE_ATTRIB_STRIDE:
365 *value = image->region->pitch * image->region->cpp;
367 case __DRI_IMAGE_ATTRIB_HANDLE:
368 *value = image->region->bo->handle;
370 case __DRI_IMAGE_ATTRIB_NAME:
371 return intel_region_flink(image->region, (uint32_t *) value);
372 case __DRI_IMAGE_ATTRIB_FORMAT:
373 *value = image->dri_format;
375 case __DRI_IMAGE_ATTRIB_WIDTH:
376 *value = image->region->width;
378 case __DRI_IMAGE_ATTRIB_HEIGHT:
379 *value = image->region->height;
387 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
391 image = CALLOC(sizeof *image);
395 intel_region_reference(&image->region, orig_image->region);
396 if (image->region == NULL) {
401 image->internal_format = orig_image->internal_format;
402 image->usage = orig_image->usage;
403 image->dri_format = orig_image->dri_format;
404 image->format = orig_image->format;
405 image->offset = orig_image->offset;
406 image->data = loaderPrivate;
412 intel_validate_usage(__DRIimage *image, unsigned int use)
414 if (use & __DRI_IMAGE_USE_CURSOR) {
415 if (image->region->width != 64 || image->region->height != 64)
419 /* We only support write for cursor drm images */
420 if ((use & __DRI_IMAGE_USE_WRITE) &&
421 use != (__DRI_IMAGE_USE_WRITE | __DRI_IMAGE_USE_CURSOR))
428 intel_image_write(__DRIimage *image, const void *buf, size_t count)
430 if (image->region->map_refcount)
432 if (!(image->usage & __DRI_IMAGE_USE_WRITE))
435 drm_intel_bo_map(image->region->bo, true);
436 memcpy(image->region->bo->virtual, buf, count);
437 drm_intel_bo_unmap(image->region->bo);
443 intel_create_sub_image(__DRIimage *parent,
444 int width, int height, int dri_format,
445 int offset, int pitch, void *loaderPrivate)
449 uint32_t mask_x, mask_y;
451 image = intel_allocate_image(dri_format, loaderPrivate);
452 cpp = _mesa_get_format_bytes(image->format);
453 if (offset + height * cpp * pitch > parent->region->bo->size) {
454 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
459 image->region = calloc(sizeof(*image->region), 1);
460 if (image->region == NULL) {
465 image->region->cpp = _mesa_get_format_bytes(image->format);
466 image->region->width = width;
467 image->region->height = height;
468 image->region->pitch = pitch;
469 image->region->refcount = 1;
470 image->region->bo = parent->region->bo;
471 drm_intel_bo_reference(image->region->bo);
472 image->region->tiling = parent->region->tiling;
473 image->region->screen = parent->region->screen;
474 image->offset = offset;
476 intel_region_get_tile_masks(image->region, &mask_x, &mask_y);
479 "intel_create_sub_image: offset not on tile boundary");
484 static struct __DRIimageExtensionRec intelImageExtension = {
486 intel_create_image_from_name,
487 intel_create_image_from_renderbuffer,
492 intel_validate_usage,
494 intel_create_sub_image
497 static const __DRIextension *intelScreenExtensions[] = {
498 &intelTexBufferExtension.base,
499 &intelFlushExtension.base,
500 &intelImageExtension.base,
501 &dri2ConfigQueryExtension.base,
506 intel_get_param(__DRIscreen *psp, int param, int *value)
509 struct drm_i915_getparam gp;
511 memset(&gp, 0, sizeof(gp));
515 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
518 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
526 intel_get_boolean(__DRIscreen *psp, int param)
529 return intel_get_param(psp, param, &value) && value;
533 nop_callback(GLuint key, void *data, void *userData)
538 intelDestroyScreen(__DRIscreen * sPriv)
540 struct intel_screen *intelScreen = sPriv->driverPrivate;
542 dri_bufmgr_destroy(intelScreen->bufmgr);
543 driDestroyOptionInfo(&intelScreen->optionCache);
545 /* Some regions may still have references to them at this point, so
546 * flush the hash table to prevent _mesa_DeleteHashTable() from
547 * complaining about the hash not being empty; */
548 _mesa_HashDeleteAll(intelScreen->named_regions, nop_callback, NULL);
549 _mesa_DeleteHashTable(intelScreen->named_regions);
552 sPriv->driverPrivate = NULL;
557 * This is called when we need to set up GL rendering to a new X window.
560 intelCreateBuffer(__DRIscreen * driScrnPriv,
561 __DRIdrawable * driDrawPriv,
562 const struct gl_config * mesaVis, GLboolean isPixmap)
564 struct intel_renderbuffer *rb;
565 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
567 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
568 struct gl_framebuffer *fb;
573 fb = CALLOC_STRUCT(gl_framebuffer);
577 _mesa_initialize_window_framebuffer(fb, mesaVis);
579 if (mesaVis->redBits == 5)
580 rgbFormat = MESA_FORMAT_RGB565;
581 else if (mesaVis->alphaBits == 0)
582 rgbFormat = MESA_FORMAT_XRGB8888;
584 rgbFormat = MESA_FORMAT_ARGB8888;
586 /* setup the hardware-based renderbuffers */
587 rb = intel_create_renderbuffer(rgbFormat, num_samples);
588 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
590 if (mesaVis->doubleBufferMode) {
591 rb = intel_create_renderbuffer(rgbFormat, num_samples);
592 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
596 * Assert here that the gl_config has an expected depth/stencil bit
597 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
598 * which constructs the advertised configs.)
600 if (mesaVis->depthBits == 24) {
601 assert(mesaVis->stencilBits == 8);
603 if (screen->hw_has_separate_stencil) {
604 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
606 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
607 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
609 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
612 * Use combined depth/stencil. Note that the renderbuffer is
613 * attached to two attachment points.
615 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
617 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
618 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
621 else if (mesaVis->depthBits == 16) {
622 assert(mesaVis->stencilBits == 0);
623 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
625 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
628 assert(mesaVis->depthBits == 0);
629 assert(mesaVis->stencilBits == 0);
632 /* now add any/all software-based renderbuffers we may need */
633 _swrast_add_soft_renderbuffers(fb,
634 false, /* never sw color */
635 false, /* never sw depth */
636 false, /* never sw stencil */
637 mesaVis->accumRedBits > 0,
638 false, /* never sw alpha */
639 false /* never sw aux */ );
640 driDrawPriv->driverPrivate = fb;
646 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
648 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
650 _mesa_reference_framebuffer(&fb, NULL);
653 /* There are probably better ways to do this, such as an
654 * init-designated function to register chipids and createcontext
658 i830CreateContext(const struct gl_config *mesaVis,
659 __DRIcontext *driContextPriv,
660 void *sharedContextPrivate);
663 i915CreateContext(int api,
664 const struct gl_config *mesaVis,
665 __DRIcontext *driContextPriv,
666 unsigned major_version,
667 unsigned minor_version,
669 void *sharedContextPrivate);
671 brwCreateContext(int api,
672 const struct gl_config *mesaVis,
673 __DRIcontext *driContextPriv,
674 unsigned major_version,
675 unsigned minor_version,
677 void *sharedContextPrivate);
680 intelCreateContext(gl_api api,
681 const struct gl_config * mesaVis,
682 __DRIcontext * driContextPriv,
683 unsigned major_version,
684 unsigned minor_version,
687 void *sharedContextPrivate)
689 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
690 struct intel_screen *intelScreen = sPriv->driverPrivate;
691 bool success = false;
699 if (!IS_9XX(intelScreen->deviceID)) {
700 *error = __DRI_CTX_ERROR_BAD_API;
705 case API_OPENGL_CORE:
706 *error = __DRI_CTX_ERROR_BAD_API;
711 if (IS_9XX(intelScreen->deviceID)) {
712 success = i915CreateContext(api, mesaVis, driContextPriv,
713 major_version, minor_version, error,
714 sharedContextPrivate);
718 if (major_version > 1 || minor_version > 3) {
719 *error = __DRI_CTX_ERROR_BAD_VERSION;
726 *error = __DRI_CTX_ERROR_BAD_API;
730 intelScreen->no_vbo = true;
731 success = i830CreateContext(mesaVis, driContextPriv,
732 sharedContextPrivate);
734 *error = __DRI_CTX_ERROR_NO_MEMORY;
739 success = brwCreateContext(api, mesaVis,
741 major_version, minor_version, error,
742 sharedContextPrivate);
746 struct gl_context *ctx =
747 (struct gl_context *) driContextPriv->driverPrivate;
749 _mesa_compute_version(ctx);
750 if (ctx->Version >= major_version * 10 + minor_version) {
754 *error = __DRI_CTX_ERROR_BAD_VERSION;
755 intelDestroyContext(driContextPriv);
757 *error = __DRI_CTX_ERROR_NO_MEMORY;
758 fprintf(stderr, "Unrecognized deviceID 0x%x\n", intelScreen->deviceID);
765 intel_init_bufmgr(struct intel_screen *intelScreen)
767 __DRIscreen *spriv = intelScreen->driScrnPriv;
770 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
772 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
773 if (intelScreen->bufmgr == NULL) {
774 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
779 if (!intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences) ||
781 fprintf(stderr, "[%s: %u] Kernel 2.6.29 required.\n", __func__, __LINE__);
785 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
787 intelScreen->named_regions = _mesa_NewHashTable();
789 intelScreen->relaxed_relocations = 0;
790 intelScreen->relaxed_relocations |=
791 intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA) << 0;
797 * Override intel_screen.hw_has_separate_stencil with environment variable
798 * INTEL_SEPARATE_STENCIL.
800 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
801 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
805 intel_override_separate_stencil(struct intel_screen *screen)
807 const char *s = getenv("INTEL_SEPARATE_STENCIL");
810 } else if (!strncmp("0", s, 2)) {
811 screen->hw_has_separate_stencil = false;
812 } else if (!strncmp("1", s, 2)) {
813 screen->hw_has_separate_stencil = true;
816 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
817 "invalid value and is ignored", s);
822 intel_detect_swizzling(struct intel_screen *screen)
824 drm_intel_bo *buffer;
825 unsigned long flags = 0;
826 unsigned long aligned_pitch;
827 uint32_t tiling = I915_TILING_X;
828 uint32_t swizzle_mode = 0;
830 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
832 &tiling, &aligned_pitch, flags);
836 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
837 drm_intel_bo_unreference(buffer);
839 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
846 intel_screen_make_configs(__DRIscreen *dri_screen)
848 static const GLenum back_buffer_modes[] = {
849 GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
852 static const uint8_t singlesample_samples[1] = {0};
853 static const uint8_t multisample_samples[2] = {4, 8};
855 struct intel_screen *screen = dri_screen->driverPrivate;
858 uint8_t depth_bits[4], stencil_bits[4];
859 __DRIconfig **configs = NULL;
861 fb_format[0] = GL_RGB;
862 fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
864 fb_format[1] = GL_BGR;
865 fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
867 fb_format[2] = GL_BGRA;
868 fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
870 /* Generate singlesample configs without accumulation buffer. */
871 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
872 __DRIconfig **new_configs;
873 const int num_depth_stencil_bits = 2;
875 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
876 * buffer that has a different number of bits per pixel than the color
877 * buffer. This isn't yet supported here.
882 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
890 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
893 num_depth_stencil_bits,
895 ARRAY_SIZE(back_buffer_modes),
896 singlesample_samples, 1,
898 configs = driConcatConfigs(configs, new_configs);
901 /* Generate the minimum possible set of configs that include an
902 * accumulation buffer.
904 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
905 __DRIconfig **new_configs;
907 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
915 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
916 depth_bits, stencil_bits, 1,
917 back_buffer_modes + 1, 1,
918 singlesample_samples, 1,
920 configs = driConcatConfigs(configs, new_configs);
923 /* Generate multisample configs.
925 * This loop breaks early, and hence is a no-op, on gen < 6.
927 * Multisample configs must follow the singlesample configs in order to
928 * work around an X server bug present in 1.12. The X server chooses to
929 * associate the first listed RGBA888-Z24S8 config, regardless of its
930 * sample count, with the 32-bit depth visual used for compositing.
932 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
933 * supported. Singlebuffer configs are not supported because no one wants
934 * them. GLX_SWAP_COPY_OML is not supported due to page flipping.
936 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
940 __DRIconfig **new_configs;
941 const int num_depth_stencil_bits = 2;
942 int num_msaa_modes = 0;
947 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
955 if (screen->gen >= 7)
957 else if (screen->gen == 6)
960 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
963 num_depth_stencil_bits,
964 back_buffer_modes + 1, 1,
968 configs = driConcatConfigs(configs, new_configs);
971 if (configs == NULL) {
972 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
981 * This is the driver specific part of the createNewScreen entry point.
982 * Called when using DRI2.
984 * \return the struct gl_config supported by this driver
987 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
989 struct intel_screen *intelScreen;
990 unsigned int api_mask;
992 if (psp->dri2.loader->base.version <= 2 ||
993 psp->dri2.loader->getBuffersWithFormat == NULL) {
995 "\nERROR! DRI2 loader with getBuffersWithFormat() "
996 "support required\n");
1000 /* Allocate the private area */
1001 intelScreen = CALLOC(sizeof *intelScreen);
1003 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1006 /* parse information in __driConfigOptions */
1007 driParseOptionInfo(&intelScreen->optionCache,
1008 __driConfigOptions, __driNConfigOptions);
1010 intelScreen->driScrnPriv = psp;
1011 psp->driverPrivate = (void *) intelScreen;
1013 if (!intel_init_bufmgr(intelScreen))
1016 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1018 intelScreen->kernel_has_gen7_sol_reset =
1019 intel_get_boolean(intelScreen->driScrnPriv,
1020 I915_PARAM_HAS_GEN7_SOL_RESET);
1022 if (IS_GEN7(intelScreen->deviceID)) {
1023 intelScreen->gen = 7;
1024 } else if (IS_GEN6(intelScreen->deviceID)) {
1025 intelScreen->gen = 6;
1026 } else if (IS_GEN5(intelScreen->deviceID)) {
1027 intelScreen->gen = 5;
1028 } else if (IS_965(intelScreen->deviceID)) {
1029 intelScreen->gen = 4;
1030 } else if (IS_9XX(intelScreen->deviceID)) {
1031 intelScreen->gen = 3;
1033 intelScreen->gen = 2;
1036 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1037 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1040 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1042 if (success && has_llc)
1043 intelScreen->hw_has_llc = true;
1044 else if (!success && intelScreen->gen >= 6)
1045 intelScreen->hw_has_llc = true;
1047 intel_override_separate_stencil(intelScreen);
1049 api_mask = (1 << __DRI_API_OPENGL);
1051 api_mask |= (1 << __DRI_API_GLES);
1054 api_mask |= (1 << __DRI_API_GLES2);
1057 if (IS_9XX(intelScreen->deviceID) || IS_965(intelScreen->deviceID))
1058 psp->api_mask = api_mask;
1060 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1062 psp->extensions = intelScreenExtensions;
1064 return (const __DRIconfig**) intel_screen_make_configs(psp);
1067 struct intel_buffer {
1069 struct intel_region *region;
1072 static __DRIbuffer *
1073 intelAllocateBuffer(__DRIscreen *screen,
1074 unsigned attachment, unsigned format,
1075 int width, int height)
1077 struct intel_buffer *intelBuffer;
1078 struct intel_screen *intelScreen = screen->driverPrivate;
1080 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1081 attachment == __DRI_BUFFER_BACK_LEFT);
1083 intelBuffer = CALLOC(sizeof *intelBuffer);
1084 if (intelBuffer == NULL)
1087 /* The front and back buffers are color buffers, which are X tiled. */
1088 intelBuffer->region = intel_region_alloc(intelScreen,
1095 if (intelBuffer->region == NULL) {
1100 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1102 intelBuffer->base.attachment = attachment;
1103 intelBuffer->base.cpp = intelBuffer->region->cpp;
1104 intelBuffer->base.pitch =
1105 intelBuffer->region->pitch * intelBuffer->region->cpp;
1107 return &intelBuffer->base;
1111 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1113 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1115 intel_region_release(&intelBuffer->region);
1120 const struct __DriverAPIRec driDriverAPI = {
1121 .InitScreen = intelInitScreen2,
1122 .DestroyScreen = intelDestroyScreen,
1123 .CreateContext = intelCreateContext,
1124 .DestroyContext = intelDestroyContext,
1125 .CreateBuffer = intelCreateBuffer,
1126 .DestroyBuffer = intelDestroyBuffer,
1127 .MakeCurrent = intelMakeCurrent,
1128 .UnbindContext = intelUnbindContext,
1129 .AllocateBuffer = intelAllocateBuffer,
1130 .ReleaseBuffer = intelReleaseBuffer
1133 /* This is the table of extensions that the loader will dlsym() for. */
1134 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1135 &driCoreExtension.base,
1136 &driDRI2Extension.base,