Tizen 2.0 Release
[profile/ivi/osmesa.git] / src / mesa / drivers / dri / intel / intel_context.c
1 /**************************************************************************
2  * 
3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4  * All Rights Reserved.
5  * 
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  * 
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  * 
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  * 
26  **************************************************************************/
27
28
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/extensions.h"
32 #include "main/fbobject.h"
33 #include "main/framebuffer.h"
34 #include "main/imports.h"
35 #include "main/points.h"
36 #include "main/renderbuffer.h"
37
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "tnl/tnl.h"
41 #include "drivers/common/driverfuncs.h"
42 #include "drivers/common/meta.h"
43
44 #include "intel_chipset.h"
45 #include "intel_buffers.h"
46 #include "intel_tex.h"
47 #include "intel_batchbuffer.h"
48 #include "intel_clear.h"
49 #include "intel_extensions.h"
50 #include "intel_pixel.h"
51 #include "intel_regions.h"
52 #include "intel_buffer_objects.h"
53 #include "intel_fbo.h"
54 #include "intel_bufmgr.h"
55 #include "intel_screen.h"
56
57 #include "drirenderbuffer.h"
58 #include "utils.h"
59
60
61 #ifndef INTEL_DEBUG
62 int INTEL_DEBUG = (0);
63 #endif
64
65
66 static const GLubyte *
67 intelGetString(struct gl_context * ctx, GLenum name)
68 {
69    const struct intel_context *const intel = intel_context(ctx);
70    const char *chipset;
71    static char buffer[128];
72
73    switch (name) {
74    case GL_VENDOR:
75       return (GLubyte *) "Tungsten Graphics, Inc";
76       break;
77
78    case GL_RENDERER:
79       switch (intel->intelScreen->deviceID) {
80       case PCI_CHIP_845_G:
81          chipset = "Intel(R) 845G";
82          break;
83       case PCI_CHIP_I830_M:
84          chipset = "Intel(R) 830M";
85          break;
86       case PCI_CHIP_I855_GM:
87          chipset = "Intel(R) 852GM/855GM";
88          break;
89       case PCI_CHIP_I865_G:
90          chipset = "Intel(R) 865G";
91          break;
92       case PCI_CHIP_I915_G:
93          chipset = "Intel(R) 915G";
94          break;
95       case PCI_CHIP_E7221_G:
96          chipset = "Intel (R) E7221G (i915)";
97          break;
98       case PCI_CHIP_I915_GM:
99          chipset = "Intel(R) 915GM";
100          break;
101       case PCI_CHIP_I945_G:
102          chipset = "Intel(R) 945G";
103          break;
104       case PCI_CHIP_I945_GM:
105          chipset = "Intel(R) 945GM";
106          break;
107       case PCI_CHIP_I945_GME:
108          chipset = "Intel(R) 945GME";
109          break;
110       case PCI_CHIP_G33_G:
111          chipset = "Intel(R) G33";
112          break;
113       case PCI_CHIP_Q35_G:
114          chipset = "Intel(R) Q35";
115          break;
116       case PCI_CHIP_Q33_G:
117          chipset = "Intel(R) Q33";
118          break;
119       case PCI_CHIP_IGD_GM:
120       case PCI_CHIP_IGD_G:
121          chipset = "Intel(R) IGD";
122          break;
123       case PCI_CHIP_I965_Q:
124          chipset = "Intel(R) 965Q";
125          break;
126       case PCI_CHIP_I965_G:
127       case PCI_CHIP_I965_G_1:
128          chipset = "Intel(R) 965G";
129          break;
130       case PCI_CHIP_I946_GZ:
131          chipset = "Intel(R) 946GZ";
132          break;
133       case PCI_CHIP_I965_GM:
134          chipset = "Intel(R) 965GM";
135          break;
136       case PCI_CHIP_I965_GME:
137          chipset = "Intel(R) 965GME/GLE";
138          break;
139       case PCI_CHIP_GM45_GM:
140          chipset = "Mobile IntelĀ® GM45 Express Chipset";
141          break; 
142       case PCI_CHIP_IGD_E_G:
143          chipset = "Intel(R) Integrated Graphics Device";
144          break;
145       case PCI_CHIP_G45_G:
146          chipset = "Intel(R) G45/G43";
147          break;
148       case PCI_CHIP_Q45_G:
149          chipset = "Intel(R) Q45/Q43";
150          break;
151       case PCI_CHIP_G41_G:
152          chipset = "Intel(R) G41";
153          break;
154       case PCI_CHIP_B43_G:
155       case PCI_CHIP_B43_G1:
156          chipset = "Intel(R) B43";
157          break;
158       case PCI_CHIP_ILD_G:
159          chipset = "Intel(R) Ironlake Desktop";
160          break;
161       case PCI_CHIP_ILM_G:
162          chipset = "Intel(R) Ironlake Mobile";
163          break;
164       case PCI_CHIP_SANDYBRIDGE_GT1:
165       case PCI_CHIP_SANDYBRIDGE_GT2:
166       case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
167          chipset = "Intel(R) Sandybridge Desktop";
168          break;
169       case PCI_CHIP_SANDYBRIDGE_M_GT1:
170       case PCI_CHIP_SANDYBRIDGE_M_GT2:
171       case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
172          chipset = "Intel(R) Sandybridge Mobile";
173          break;
174       case PCI_CHIP_SANDYBRIDGE_S:
175          chipset = "Intel(R) Sandybridge Server";
176          break;
177       case PCI_CHIP_IVYBRIDGE_GT1:
178       case PCI_CHIP_IVYBRIDGE_GT2:
179          chipset = "Intel(R) Ivybridge Desktop";
180          break;
181       case PCI_CHIP_IVYBRIDGE_M_GT1:
182       case PCI_CHIP_IVYBRIDGE_M_GT2:
183          chipset = "Intel(R) Ivybridge Mobile";
184          break;
185       case PCI_CHIP_IVYBRIDGE_S_GT1:
186          chipset = "Intel(R) Ivybridge Server";
187          break;
188       default:
189          chipset = "Unknown Intel Chipset";
190          break;
191       }
192
193       (void) driGetRendererString(buffer, chipset, 0);
194       return (GLubyte *) buffer;
195
196    default:
197       return NULL;
198    }
199 }
200
201 static void
202 intel_flush_front(struct gl_context *ctx)
203 {
204    struct intel_context *intel = intel_context(ctx);
205     __DRIcontext *driContext = intel->driContext;
206     __DRIscreen *const screen = intel->intelScreen->driScrnPriv;
207
208    if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) {
209       if (screen->dri2.loader &&
210           (screen->dri2.loader->base.version >= 2)
211           && (screen->dri2.loader->flushFrontBuffer != NULL) &&
212           driContext->driDrawablePriv &&
213           driContext->driDrawablePriv->loaderPrivate) {
214          (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
215                                                   driContext->driDrawablePriv->loaderPrivate);
216
217          /* We set the dirty bit in intel_prepare_render() if we're
218           * front buffer rendering once we get there.
219           */
220          intel->front_buffer_dirty = GL_FALSE;
221       }
222    }
223 }
224
225 static unsigned
226 intel_bits_per_pixel(const struct intel_renderbuffer *rb)
227 {
228    return _mesa_get_format_bytes(rb->Base.Format) * 8;
229 }
230
231 static void
232 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
233                                              __DRIdrawable *drawable,
234                                              __DRIbuffer **buffers,
235                                              int *count);
236
237 static void
238 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
239                                               __DRIdrawable *drawable,
240                                               __DRIbuffer *buffer,
241                                               struct intel_renderbuffer *rb,
242                                               const char *buffer_name);
243
244 static void
245 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
246                                                __DRIdrawable *drawable,
247                                                __DRIbuffer **buffers,
248                                                unsigned **attachments,
249                                                int *count);
250
251 static void
252 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
253                                                 __DRIdrawable *drawable,
254                                                 __DRIbuffer *buffer,
255                                                 struct intel_renderbuffer *rb,
256                                                 const char *buffer_name);
257 static void
258 intel_verify_dri2_has_hiz(struct intel_context *intel,
259                           __DRIdrawable *drawable,
260                           __DRIbuffer **buffers,
261                           unsigned **attachments,
262                           int *count);
263
264 void
265 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
266 {
267    struct gl_framebuffer *fb = drawable->driverPrivate;
268    struct intel_renderbuffer *rb;
269    struct intel_context *intel = context->driverPrivate;
270    __DRIbuffer *buffers = NULL;
271    unsigned *attachments = NULL;
272    int i, count;
273    const char *region_name;
274
275    bool try_separate_stencil =
276       intel->has_separate_stencil &&
277       intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE &&
278       intel->intelScreen->driScrnPriv->dri2.loader != NULL &&
279       intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 &&
280       intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL;
281
282    assert(!intel->must_use_separate_stencil || try_separate_stencil);
283
284    /* If we're rendering to the fake front buffer, make sure all the
285     * pending drawing has landed on the real front buffer.  Otherwise
286     * when we eventually get to DRI2GetBuffersWithFormat the stale
287     * real front buffer contents will get copied to the new fake front
288     * buffer.
289     */
290    if (intel->is_front_buffer_rendering) {
291       intel_flush(&intel->ctx);
292       intel_flush_front(&intel->ctx);
293    }
294
295    /* Set this up front, so that in case our buffers get invalidated
296     * while we're getting new buffers, we don't clobber the stamp and
297     * thus ignore the invalidate. */
298    drawable->lastStamp = drawable->dri2.stamp;
299
300    if (unlikely(INTEL_DEBUG & DEBUG_DRI))
301       fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
302
303    if (try_separate_stencil) {
304       intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers,
305                                                      &attachments, &count);
306    } else {
307       intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers,
308                                                    &count);
309    }
310
311    if (buffers == NULL)
312       return;
313
314    drawable->x = 0;
315    drawable->y = 0;
316    drawable->backX = 0;
317    drawable->backY = 0;
318    drawable->numClipRects = 1;
319    drawable->pClipRects[0].x1 = 0;
320    drawable->pClipRects[0].y1 = 0;
321    drawable->pClipRects[0].x2 = drawable->w;
322    drawable->pClipRects[0].y2 = drawable->h;
323    drawable->numBackClipRects = 1;
324    drawable->pBackClipRects[0].x1 = 0;
325    drawable->pBackClipRects[0].y1 = 0;
326    drawable->pBackClipRects[0].x2 = drawable->w;
327    drawable->pBackClipRects[0].y2 = drawable->h;
328
329    for (i = 0; i < count; i++) {
330        switch (buffers[i].attachment) {
331        case __DRI_BUFFER_FRONT_LEFT:
332            rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
333            region_name = "dri2 front buffer";
334            break;
335
336        case __DRI_BUFFER_FAKE_FRONT_LEFT:
337            rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
338            region_name = "dri2 fake front buffer";
339            break;
340
341        case __DRI_BUFFER_BACK_LEFT:
342            rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
343            region_name = "dri2 back buffer";
344            break;
345
346        case __DRI_BUFFER_DEPTH:
347            rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
348            region_name = "dri2 depth buffer";
349            break;
350
351        case __DRI_BUFFER_HIZ:
352            /* The hiz region resides in the depth renderbuffer. */
353            rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
354            region_name = "dri2 hiz buffer";
355            break;
356
357        case __DRI_BUFFER_DEPTH_STENCIL:
358            rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
359            region_name = "dri2 depth / stencil buffer";
360            break;
361
362        case __DRI_BUFFER_STENCIL:
363            rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
364            region_name = "dri2 stencil buffer";
365            break;
366
367        case __DRI_BUFFER_ACCUM:
368        default:
369            fprintf(stderr,
370                    "unhandled buffer attach event, attachment type %d\n",
371                    buffers[i].attachment);
372            return;
373        }
374
375        if (try_separate_stencil) {
376          intel_process_dri2_buffer_with_separate_stencil(intel, drawable,
377                                                          &buffers[i], rb,
378                                                          region_name);
379        } else {
380          intel_process_dri2_buffer_no_separate_stencil(intel, drawable,
381                                                        &buffers[i], rb,
382                                                        region_name);
383        }
384    }
385
386    if (try_separate_stencil
387        && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) {
388       intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments,
389                                 &count);
390    }
391
392    if (attachments)
393       free(attachments);
394
395    driUpdateFramebufferSize(&intel->ctx, drawable);
396 }
397
398 /**
399  * intel_prepare_render should be called anywhere that curent read/drawbuffer
400  * state is required.
401  */
402 void
403 intel_prepare_render(struct intel_context *intel)
404 {
405    __DRIcontext *driContext = intel->driContext;
406    __DRIdrawable *drawable;
407
408    drawable = driContext->driDrawablePriv;
409    if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
410       if (drawable->lastStamp != drawable->dri2.stamp)
411          intel_update_renderbuffers(driContext, drawable);
412       intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
413       driContext->dri2.draw_stamp = drawable->dri2.stamp;
414    }
415
416    drawable = driContext->driReadablePriv;
417    if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
418       if (drawable->lastStamp != drawable->dri2.stamp)
419          intel_update_renderbuffers(driContext, drawable);
420       driContext->dri2.read_stamp = drawable->dri2.stamp;
421    }
422
423    /* If we're currently rendering to the front buffer, the rendering
424     * that will happen next will probably dirty the front buffer.  So
425     * mark it as dirty here.
426     */
427    if (intel->is_front_buffer_rendering)
428       intel->front_buffer_dirty = GL_TRUE;
429
430    /* Wait for the swapbuffers before the one we just emitted, so we
431     * don't get too many swaps outstanding for apps that are GPU-heavy
432     * but not CPU-heavy.
433     *
434     * We're using intelDRI2Flush (called from the loader before
435     * swapbuffer) and glFlush (for front buffer rendering) as the
436     * indicator that a frame is done and then throttle when we get
437     * here as we prepare to render the next frame.  At this point for
438     * round trips for swap/copy and getting new buffers are done and
439     * we'll spend less time waiting on the GPU.
440     *
441     * Unfortunately, we don't have a handle to the batch containing
442     * the swap, and getting our hands on that doesn't seem worth it,
443     * so we just us the first batch we emitted after the last swap.
444     */
445    if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
446       drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
447       drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
448       intel->first_post_swapbuffers_batch = NULL;
449       intel->need_throttle = GL_FALSE;
450    }
451 }
452
453 static void
454 intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
455 {
456     struct intel_context *intel = intel_context(ctx);
457     __DRIcontext *driContext = intel->driContext;
458
459     if (intel->saved_viewport)
460         intel->saved_viewport(ctx, x, y, w, h);
461
462     if (ctx->DrawBuffer->Name == 0) {
463        dri2InvalidateDrawable(driContext->driDrawablePriv);
464        dri2InvalidateDrawable(driContext->driReadablePriv);
465     }
466 }
467
468 static const struct dri_debug_control debug_control[] = {
469    { "tex",   DEBUG_TEXTURE},
470    { "state", DEBUG_STATE},
471    { "ioctl", DEBUG_IOCTL},
472    { "blit",  DEBUG_BLIT},
473    { "mip",   DEBUG_MIPTREE},
474    { "fall",  DEBUG_FALLBACKS},
475    { "verb",  DEBUG_VERBOSE},
476    { "bat",   DEBUG_BATCH},
477    { "pix",   DEBUG_PIXEL},
478    { "buf",   DEBUG_BUFMGR},
479    { "reg",   DEBUG_REGION},
480    { "fbo",   DEBUG_FBO},
481    { "gs",    DEBUG_GS},
482    { "sync",  DEBUG_SYNC},
483    { "prim",  DEBUG_PRIMS },
484    { "vert",  DEBUG_VERTS },
485    { "dri",   DEBUG_DRI },
486    { "sf",    DEBUG_SF },
487    { "san",   DEBUG_SANITY },
488    { "sleep", DEBUG_SLEEP },
489    { "stats", DEBUG_STATS },
490    { "tile",  DEBUG_TILE },
491    { "sing",  DEBUG_SINGLE_THREAD },
492    { "thre",  DEBUG_SINGLE_THREAD },
493    { "wm",    DEBUG_WM },
494    { "urb",   DEBUG_URB },
495    { "vs",    DEBUG_VS },
496    { "clip",  DEBUG_CLIP },
497    { NULL,    0 }
498 };
499
500
501 static void
502 intelInvalidateState(struct gl_context * ctx, GLuint new_state)
503 {
504     struct intel_context *intel = intel_context(ctx);
505
506    _swrast_InvalidateState(ctx, new_state);
507    _vbo_InvalidateState(ctx, new_state);
508
509    intel->NewGLState |= new_state;
510
511    if (intel->vtbl.invalidate_state)
512       intel->vtbl.invalidate_state( intel, new_state );
513 }
514
515 void
516 intel_flush(struct gl_context *ctx)
517 {
518    struct intel_context *intel = intel_context(ctx);
519
520    if (intel->Fallback)
521       _swrast_flush(ctx);
522
523    if (intel->gen < 4)
524       INTEL_FIREVERTICES(intel);
525
526    if (intel->batch.used)
527       intel_batchbuffer_flush(intel);
528 }
529
530 static void
531 intel_glFlush(struct gl_context *ctx)
532 {
533    struct intel_context *intel = intel_context(ctx);
534
535    intel_flush(ctx);
536    intel_flush_front(ctx);
537    if (intel->is_front_buffer_rendering)
538       intel->need_throttle = GL_TRUE;
539 }
540
541 void
542 intelFinish(struct gl_context * ctx)
543 {
544    struct intel_context *intel = intel_context(ctx);
545
546    intel_flush(ctx);
547    intel_flush_front(ctx);
548
549    if (intel->batch.last_bo)
550       drm_intel_bo_wait_rendering(intel->batch.last_bo);
551 }
552
553 void
554 intelInitDriverFunctions(struct dd_function_table *functions)
555 {
556    _mesa_init_driver_functions(functions);
557
558    functions->Flush = intel_glFlush;
559    functions->Finish = intelFinish;
560    functions->GetString = intelGetString;
561    functions->UpdateState = intelInvalidateState;
562
563    intelInitTextureFuncs(functions);
564    intelInitTextureImageFuncs(functions);
565    intelInitTextureSubImageFuncs(functions);
566    intelInitTextureCopyImageFuncs(functions);
567    intelInitStateFuncs(functions);
568    intelInitClearFuncs(functions);
569    intelInitBufferFuncs(functions);
570    intelInitPixelFuncs(functions);
571    intelInitBufferObjectFuncs(functions);
572    intel_init_syncobj_functions(functions);
573 }
574
575 GLboolean
576 intelInitContext(struct intel_context *intel,
577                  int api,
578                  const struct gl_config * mesaVis,
579                  __DRIcontext * driContextPriv,
580                  void *sharedContextPrivate,
581                  struct dd_function_table *functions)
582 {
583    struct gl_context *ctx = &intel->ctx;
584    struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
585    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
586    struct intel_screen *intelScreen = sPriv->private;
587    int bo_reuse_mode;
588    struct gl_config visual;
589
590    /* we can't do anything without a connection to the device */
591    if (intelScreen->bufmgr == NULL)
592       return GL_FALSE;
593
594    /* Can't rely on invalidate events, fall back to glViewport hack */
595    if (!driContextPriv->driScreenPriv->dri2.useInvalidate) {
596       intel->saved_viewport = functions->Viewport;
597       functions->Viewport = intel_viewport;
598    }
599
600    if (mesaVis == NULL) {
601       memset(&visual, 0, sizeof visual);
602       mesaVis = &visual;
603    }
604
605    if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx,
606                                  functions, (void *) intel)) {
607       printf("%s: failed to init mesa context\n", __FUNCTION__);
608       return GL_FALSE;
609    }
610
611    driContextPriv->driverPrivate = intel;
612    intel->intelScreen = intelScreen;
613    intel->driContext = driContextPriv;
614    intel->driFd = sPriv->fd;
615
616    intel->has_xrgb_textures = GL_TRUE;
617    intel->gen = intelScreen->gen;
618    if (IS_GEN7(intel->intelScreen->deviceID)) {
619       intel->needs_ff_sync = GL_TRUE;
620       intel->has_luminance_srgb = GL_TRUE;
621    } else if (IS_GEN6(intel->intelScreen->deviceID)) {
622       intel->needs_ff_sync = GL_TRUE;
623       intel->has_luminance_srgb = GL_TRUE;
624    } else if (IS_GEN5(intel->intelScreen->deviceID)) {
625       intel->needs_ff_sync = GL_TRUE;
626       intel->has_luminance_srgb = GL_TRUE;
627    } else if (IS_965(intel->intelScreen->deviceID)) {
628       if (IS_G4X(intel->intelScreen->deviceID)) {
629           intel->has_luminance_srgb = GL_TRUE;
630           intel->is_g4x = GL_TRUE;
631       }
632    } else if (IS_9XX(intel->intelScreen->deviceID)) {
633       if (IS_945(intel->intelScreen->deviceID)) {
634          intel->is_945 = GL_TRUE;
635       }
636    } else {
637       if (intel->intelScreen->deviceID == PCI_CHIP_I830_M ||
638           intel->intelScreen->deviceID == PCI_CHIP_845_G) {
639          intel->has_xrgb_textures = GL_FALSE;
640       }
641    }
642
643    intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil;
644    intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil;
645    intel->has_hiz = intel->intelScreen->hw_has_hiz;
646
647    memset(&ctx->TextureFormatSupported, 0,
648           sizeof(ctx->TextureFormatSupported));
649    ctx->TextureFormatSupported[MESA_FORMAT_ARGB8888] = GL_TRUE;
650    if (intel->has_xrgb_textures)
651       ctx->TextureFormatSupported[MESA_FORMAT_XRGB8888] = GL_TRUE;
652    ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = GL_TRUE;
653    ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = GL_TRUE;
654    ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = GL_TRUE;
655    ctx->TextureFormatSupported[MESA_FORMAT_L8] = GL_TRUE;
656    ctx->TextureFormatSupported[MESA_FORMAT_A8] = GL_TRUE;
657    ctx->TextureFormatSupported[MESA_FORMAT_I8] = GL_TRUE;
658    ctx->TextureFormatSupported[MESA_FORMAT_AL88] = GL_TRUE;
659    if (intel->gen >= 4)
660       ctx->TextureFormatSupported[MESA_FORMAT_AL1616] = GL_TRUE;
661
662    /* Depth and stencil */
663    ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = GL_TRUE;
664    ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = GL_TRUE;
665    ctx->TextureFormatSupported[MESA_FORMAT_S8] = intel->has_separate_stencil;
666
667    /*
668     * This was disabled in initial FBO enabling to avoid combinations
669     * of depth+stencil that wouldn't work together.  We since decided
670     * that it was OK, since it's up to the app to come up with the
671     * combo that actually works, so this can probably be re-enabled.
672     */
673    /*
674    ctx->TextureFormatSupported[MESA_FORMAT_Z16] = GL_TRUE;
675    ctx->TextureFormatSupported[MESA_FORMAT_Z24] = GL_TRUE;
676    */
677
678    /* ctx->Extensions.MESA_ycbcr_texture */
679    ctx->TextureFormatSupported[MESA_FORMAT_YCBCR] = GL_TRUE;
680    ctx->TextureFormatSupported[MESA_FORMAT_YCBCR_REV] = GL_TRUE;
681
682    /* GL_3DFX_texture_compression_FXT1 */
683    ctx->TextureFormatSupported[MESA_FORMAT_RGB_FXT1] = GL_TRUE;
684    ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FXT1] = GL_TRUE;
685
686    /* GL_EXT_texture_compression_s3tc */
687    ctx->TextureFormatSupported[MESA_FORMAT_RGB_DXT1] = GL_TRUE;
688    ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT1] = GL_TRUE;
689    ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT3] = GL_TRUE;
690    ctx->TextureFormatSupported[MESA_FORMAT_RGBA_DXT5] = GL_TRUE;
691
692 #ifndef I915
693    /* GL_ARB_texture_compression_rgtc */
694    ctx->TextureFormatSupported[MESA_FORMAT_RED_RGTC1] = GL_TRUE;
695    ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RED_RGTC1] = GL_TRUE;
696    ctx->TextureFormatSupported[MESA_FORMAT_RG_RGTC2] = GL_TRUE;
697    ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG_RGTC2] = GL_TRUE;
698
699    /* GL_ARB_texture_rg */
700    ctx->TextureFormatSupported[MESA_FORMAT_R8] = GL_TRUE;
701    ctx->TextureFormatSupported[MESA_FORMAT_R16] = GL_TRUE;
702    ctx->TextureFormatSupported[MESA_FORMAT_RG88] = GL_TRUE;
703    ctx->TextureFormatSupported[MESA_FORMAT_RG1616] = GL_TRUE;
704
705    /* GL_MESA_texture_signed_rgba / GL_EXT_texture_snorm */
706    ctx->TextureFormatSupported[MESA_FORMAT_DUDV8] = GL_TRUE;
707    ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RGBA8888_REV] = GL_TRUE;
708    ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R8] = GL_TRUE;
709    ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_RG88_REV] = GL_TRUE;
710    ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_R16] = GL_TRUE;
711    ctx->TextureFormatSupported[MESA_FORMAT_SIGNED_GR1616] = GL_TRUE;
712
713    /* GL_EXT_texture_sRGB */
714    ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = GL_TRUE;
715    if (intel->gen >= 5 || intel->is_g4x)
716       ctx->TextureFormatSupported[MESA_FORMAT_SRGB_DXT1] = GL_TRUE;
717    ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT1] = GL_TRUE;
718    ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT3] = GL_TRUE;
719    ctx->TextureFormatSupported[MESA_FORMAT_SRGBA_DXT5] = GL_TRUE;
720    if (intel->has_luminance_srgb) {
721       ctx->TextureFormatSupported[MESA_FORMAT_SL8] = GL_TRUE;
722       ctx->TextureFormatSupported[MESA_FORMAT_SLA8] = GL_TRUE;
723    }
724
725 #ifdef TEXTURE_FLOAT_ENABLED
726    ctx->TextureFormatSupported[MESA_FORMAT_RGBA_FLOAT32] = GL_TRUE;
727    ctx->TextureFormatSupported[MESA_FORMAT_RG_FLOAT32] = GL_TRUE;
728    ctx->TextureFormatSupported[MESA_FORMAT_R_FLOAT32] = GL_TRUE;
729    ctx->TextureFormatSupported[MESA_FORMAT_INTENSITY_FLOAT32] = GL_TRUE;
730    ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_FLOAT32] = GL_TRUE;
731    ctx->TextureFormatSupported[MESA_FORMAT_ALPHA_FLOAT32] = GL_TRUE;
732    ctx->TextureFormatSupported[MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32] = GL_TRUE;
733 #endif
734
735 #endif /* !I915 */
736
737    driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
738                        sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
739    if (intel->gen < 4)
740       intel->maxBatchSize = 4096;
741    else
742       intel->maxBatchSize = sizeof(intel->batch.map);
743
744    intel->bufmgr = intelScreen->bufmgr;
745
746    bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
747    switch (bo_reuse_mode) {
748    case DRI_CONF_BO_REUSE_DISABLED:
749       break;
750    case DRI_CONF_BO_REUSE_ALL:
751       intel_bufmgr_gem_enable_reuse(intel->bufmgr);
752       break;
753    }
754
755    /* This doesn't yet catch all non-conformant rendering, but it's a
756     * start.
757     */
758    if (getenv("INTEL_STRICT_CONFORMANCE")) {
759       unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE"));
760       if (value > 0) {
761          intel->conformance_mode = value;
762       }
763       else {
764          intel->conformance_mode = 1;
765       }
766    }
767
768    if (intel->conformance_mode > 0) {
769       ctx->Const.MinLineWidth = 1.0;
770       ctx->Const.MinLineWidthAA = 1.0;
771       ctx->Const.MaxLineWidth = 1.0;
772       ctx->Const.MaxLineWidthAA = 1.0;
773       ctx->Const.LineWidthGranularity = 1.0;
774    }
775    else {
776       ctx->Const.MinLineWidth = 1.0;
777       ctx->Const.MinLineWidthAA = 1.0;
778       ctx->Const.MaxLineWidth = 5.0;
779       ctx->Const.MaxLineWidthAA = 5.0;
780       ctx->Const.LineWidthGranularity = 0.5;
781    }
782
783    ctx->Const.MinPointSize = 1.0;
784    ctx->Const.MinPointSizeAA = 1.0;
785    ctx->Const.MaxPointSize = 255.0;
786    ctx->Const.MaxPointSizeAA = 3.0;
787    ctx->Const.PointSizeGranularity = 1.0;
788
789    ctx->Const.MaxSamples = 1.0;
790
791    /* reinitialize the context point state.
792     * It depend on constants in __struct gl_contextRec::Const
793     */
794    _mesa_init_point(ctx);
795
796    if (intel->gen >= 4) {
797       ctx->Const.sRGBCapable = GL_TRUE;
798       if (MAX_WIDTH > 8192)
799          ctx->Const.MaxRenderbufferSize = 8192;
800    } else {
801       if (MAX_WIDTH > 2048)
802          ctx->Const.MaxRenderbufferSize = 2048;
803    }
804
805    /* Initialize the software rasterizer and helper modules. */
806    _swrast_CreateContext(ctx);
807    _vbo_CreateContext(ctx);
808    _tnl_CreateContext(ctx);
809    _swsetup_CreateContext(ctx);
810  
811    /* Configure swrast to match hardware characteristics: */
812    _swrast_allow_pixel_fog(ctx, GL_FALSE);
813    _swrast_allow_vertex_fog(ctx, GL_TRUE);
814
815    _mesa_meta_init(ctx);
816
817    intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
818    intel->hw_stipple = 1;
819
820    /* XXX FBO: this doesn't seem to be used anywhere */
821    switch (mesaVis->depthBits) {
822    case 0:                     /* what to do in this case? */
823    case 16:
824       intel->polygon_offset_scale = 1.0;
825       break;
826    case 24:
827       intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
828       break;
829    default:
830       assert(0);
831       break;
832    }
833
834    if (intel->gen >= 4)
835       intel->polygon_offset_scale /= 0xffff;
836
837    intel->RenderIndex = ~0;
838
839    switch (ctx->API) {
840    case API_OPENGL:
841       intelInitExtensions(ctx);
842       break;
843    case API_OPENGLES:
844       intelInitExtensionsES1(ctx);
845       break;
846    case API_OPENGLES2:
847       intelInitExtensionsES2(ctx);
848       break;
849    }
850
851    INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
852    if (INTEL_DEBUG & DEBUG_BUFMGR)
853       dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
854
855    intel_batchbuffer_init(intel);
856
857    intel_fbo_init(intel);
858
859    if (intel->ctx.Mesa_DXTn) {
860       _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
861       _mesa_enable_extension(ctx, "GL_S3_s3tc");
862    }
863    else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
864       _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
865    }
866    intel->use_texture_tiling = driQueryOptionb(&intel->optionCache,
867                                                "texture_tiling");
868    intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z");
869
870    intel->prim.primitive = ~0;
871
872    /* Force all software fallbacks */
873    if (driQueryOptionb(&intel->optionCache, "no_rast")) {
874       fprintf(stderr, "disabling 3D rasterization\n");
875       intel->no_rast = 1;
876    }
877
878    if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
879       fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
880       intel->always_flush_batch = 1;
881    }
882
883    if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) {
884       fprintf(stderr, "flushing GPU caches before/after each draw call\n");
885       intel->always_flush_cache = 1;
886    }
887
888    return GL_TRUE;
889 }
890
891 void
892 intelDestroyContext(__DRIcontext * driContextPriv)
893 {
894    struct intel_context *intel =
895       (struct intel_context *) driContextPriv->driverPrivate;
896
897    assert(intel);               /* should never be null */
898    if (intel) {
899       INTEL_FIREVERTICES(intel);
900
901       _mesa_meta_free(&intel->ctx);
902
903       intel->vtbl.destroy(intel);
904
905       _swsetup_DestroyContext(&intel->ctx);
906       _tnl_DestroyContext(&intel->ctx);
907       _vbo_DestroyContext(&intel->ctx);
908
909       _swrast_DestroyContext(&intel->ctx);
910       intel->Fallback = 0x0;      /* don't call _swrast_Flush later */
911
912       intel_batchbuffer_free(intel);
913
914       free(intel->prim.vb);
915       intel->prim.vb = NULL;
916       drm_intel_bo_unreference(intel->prim.vb_bo);
917       intel->prim.vb_bo = NULL;
918       drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
919       intel->first_post_swapbuffers_batch = NULL;
920
921       driDestroyOptionCache(&intel->optionCache);
922
923       /* free the Mesa context */
924       _mesa_free_context_data(&intel->ctx);
925
926       FREE(intel);
927       driContextPriv->driverPrivate = NULL;
928    }
929 }
930
931 GLboolean
932 intelUnbindContext(__DRIcontext * driContextPriv)
933 {
934    /* Unset current context and dispath table */
935    _mesa_make_current(NULL, NULL, NULL);
936
937    return GL_TRUE;
938 }
939
940 GLboolean
941 intelMakeCurrent(__DRIcontext * driContextPriv,
942                  __DRIdrawable * driDrawPriv,
943                  __DRIdrawable * driReadPriv)
944 {
945    struct intel_context *intel;
946    GET_CURRENT_CONTEXT(curCtx);
947
948    if (driContextPriv)
949       intel = (struct intel_context *) driContextPriv->driverPrivate;
950    else
951       intel = NULL;
952
953    /* According to the glXMakeCurrent() man page: "Pending commands to
954     * the previous context, if any, are flushed before it is released."
955     * But only flush if we're actually changing contexts.
956     */
957    if (intel_context(curCtx) && intel_context(curCtx) != intel) {
958       _mesa_flush(curCtx);
959    }
960
961    if (driContextPriv) {
962       struct gl_framebuffer *fb, *readFb;
963       
964       if (driDrawPriv == NULL && driReadPriv == NULL) {
965          fb = _mesa_get_incomplete_framebuffer();
966          readFb = _mesa_get_incomplete_framebuffer();
967       } else {
968          fb = driDrawPriv->driverPrivate;
969          readFb = driReadPriv->driverPrivate;
970          driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
971          driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
972       }
973
974       intel_prepare_render(intel);
975       _mesa_make_current(&intel->ctx, fb, readFb);
976       
977       /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
978        * is NULL at that point.  We can't call _mesa_makecurrent()
979        * first, since we need the buffer size for the initial
980        * viewport.  So just call intel_draw_buffer() again here. */
981       intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
982    }
983    else {
984       _mesa_make_current(NULL, NULL, NULL);
985    }
986
987    return GL_TRUE;
988 }
989
990 /**
991  * \brief Query DRI2 to obtain a DRIdrawable's buffers.
992  *
993  * To determine which DRI buffers to request, examine the renderbuffers
994  * attached to the drawable's framebuffer. Then request the buffers with
995  * DRI2GetBuffers() or DRI2GetBuffersWithFormat().
996  *
997  * This is called from intel_update_renderbuffers(). It is used only if either
998  * the hardware or the X driver lacks separate stencil support.
999  *
1000  * \param drawable      Drawable whose buffers are queried.
1001  * \param buffers       [out] List of buffers returned by DRI2 query.
1002  * \param buffer_count  [out] Number of buffers returned.
1003  *
1004  * \see intel_update_renderbuffers()
1005  * \see DRI2GetBuffers()
1006  * \see DRI2GetBuffersWithFormat()
1007  */
1008 static void
1009 intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel,
1010                                              __DRIdrawable *drawable,
1011                                              __DRIbuffer **buffers,
1012                                              int *buffer_count)
1013 {
1014    assert(!intel->must_use_separate_stencil);
1015
1016    __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1017    struct gl_framebuffer *fb = drawable->driverPrivate;
1018
1019    if (screen->dri2.loader
1020        && screen->dri2.loader->base.version > 2
1021        && screen->dri2.loader->getBuffersWithFormat != NULL) {
1022
1023       int i = 0;
1024       const int max_attachments = 4;
1025       unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1026
1027       struct intel_renderbuffer *front_rb;
1028       struct intel_renderbuffer *back_rb;
1029       struct intel_renderbuffer *depth_rb;
1030       struct intel_renderbuffer *stencil_rb;
1031
1032       front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1033       back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1034       depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1035       stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1036
1037       if ((intel->is_front_buffer_rendering ||
1038            intel->is_front_buffer_reading ||
1039            !back_rb) && front_rb) {
1040          attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1041          attachments[i++] = intel_bits_per_pixel(front_rb);
1042       }
1043
1044       if (back_rb) {
1045          attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1046          attachments[i++] = intel_bits_per_pixel(back_rb);
1047       }
1048
1049       if (depth_rb && stencil_rb) {
1050          attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
1051          attachments[i++] = intel_bits_per_pixel(depth_rb);
1052       } else if (depth_rb) {
1053          attachments[i++] = __DRI_BUFFER_DEPTH;
1054          attachments[i++] = intel_bits_per_pixel(depth_rb);
1055       } else if (stencil_rb) {
1056          attachments[i++] = __DRI_BUFFER_STENCIL;
1057          attachments[i++] = intel_bits_per_pixel(stencil_rb);
1058       }
1059
1060       assert(i <= 2 * max_attachments);
1061
1062       *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1063                                                            &drawable->w,
1064                                                            &drawable->h,
1065                                                            attachments, i / 2,
1066                                                            buffer_count,
1067                                                            drawable->loaderPrivate);
1068       free(attachments);
1069
1070    } else if (screen->dri2.loader) {
1071
1072       int i = 0;
1073       const int max_attachments = 4;
1074       unsigned *attachments = calloc(max_attachments, sizeof(unsigned));
1075
1076       if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT))
1077          attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
1078       if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT))
1079          attachments[i++] = __DRI_BUFFER_BACK_LEFT;
1080       if (intel_get_renderbuffer(fb, BUFFER_DEPTH))
1081          attachments[i++] = __DRI_BUFFER_DEPTH;
1082       if (intel_get_renderbuffer(fb, BUFFER_STENCIL))
1083          attachments[i++] = __DRI_BUFFER_STENCIL;
1084
1085       assert(i <= max_attachments);
1086
1087       *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1088                                                            &drawable->w,
1089                                                            &drawable->h,
1090                                                            attachments, i,
1091                                                            buffer_count,
1092                                                            drawable->loaderPrivate);
1093       free(attachments);
1094
1095    } else {
1096       *buffers = NULL;
1097       *buffer_count = 0;
1098    }
1099 }
1100
1101 /**
1102  * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1103  *
1104  * This is called from intel_update_renderbuffers().  It is used only if
1105  * either the hardware or the X driver lacks separate stencil support.
1106  *
1107  * \par Note:
1108  *    DRI buffers whose attachment point is DRI2BufferStencil or
1109  *    DRI2BufferDepthStencil are handled as special cases.
1110  *
1111  * \param buffer_name is a human readable name, such as "dri2 front buffer",
1112  *        that is passed to intel_region_alloc_for_handle().
1113  *
1114  * \see intel_update_renderbuffers()
1115  * \see intel_region_alloc_for_handle()
1116  * \see intel_renderbuffer_set_region()
1117  */
1118 static void
1119 intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel,
1120                                               __DRIdrawable *drawable,
1121                                               __DRIbuffer *buffer,
1122                                               struct intel_renderbuffer *rb,
1123                                               const char *buffer_name)
1124 {
1125    assert(!intel->must_use_separate_stencil);
1126
1127    struct gl_framebuffer *fb = drawable->driverPrivate;
1128    struct intel_region *region = NULL;
1129    struct intel_renderbuffer *depth_rb = NULL;
1130
1131    if (!rb)
1132       return;
1133
1134    if (rb->region && rb->region->name == buffer->name)
1135       return;
1136
1137    if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1138       fprintf(stderr,
1139               "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1140               buffer->name, buffer->attachment,
1141               buffer->cpp, buffer->pitch);
1142    }
1143
1144    bool identify_depth_and_stencil = false;
1145    if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1146       struct intel_renderbuffer *depth_rb =
1147          intel_get_renderbuffer(fb, BUFFER_DEPTH);
1148       identify_depth_and_stencil = depth_rb && depth_rb->region;
1149    }
1150
1151    if (identify_depth_and_stencil) {
1152       if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1153          fprintf(stderr, "(reusing depth buffer as stencil)\n");
1154       }
1155       intel_region_reference(&region, depth_rb->region);
1156    } else {
1157       region = intel_region_alloc_for_handle(intel->intelScreen,
1158                                              buffer->cpp,
1159                                              drawable->w,
1160                                              drawable->h,
1161                                              buffer->pitch / buffer->cpp,
1162                                              buffer->name,
1163                                              buffer_name);
1164    }
1165
1166    intel_renderbuffer_set_region(intel, rb, region);
1167    intel_region_release(&region);
1168
1169    if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1170       struct intel_renderbuffer *stencil_rb =
1171          intel_get_renderbuffer(fb, BUFFER_STENCIL);
1172
1173       if (!stencil_rb)
1174          return;
1175
1176       if (stencil_rb->region && stencil_rb->region->name == buffer->name)
1177          return;
1178
1179       intel_renderbuffer_set_region(intel, stencil_rb, region);
1180    }
1181 }
1182
1183 /**
1184  * \brief Query DRI2 to obtain a DRIdrawable's buffers.
1185  *
1186  * To determine which DRI buffers to request, examine the renderbuffers
1187  * attached to the drawable's framebuffer. Then request the buffers with
1188  * DRI2GetBuffersWithFormat().
1189  *
1190  * This is called from intel_update_renderbuffers(). It is used when 1) the
1191  * hardware supports separate stencil and 2) the X driver's separate stencil
1192  * support has been verified to work or is still unknown.
1193  *
1194  * \param drawable      Drawable whose buffers are queried.
1195  * \param buffers       [out] List of buffers returned by DRI2 query.
1196  * \param buffer_count  [out] Number of buffers returned.
1197  * \param attachments   [out] List of pairs (attachment_point, bits_per_pixel)
1198  *                      that were submitted in the DRI2 query. Number of pairs
1199  *                      is same as buffer_count.
1200  *
1201  * \see intel_update_renderbuffers()
1202  * \see DRI2GetBuffersWithFormat()
1203  * \see enum intel_dri2_has_hiz
1204  */
1205 static void
1206 intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel,
1207                                                __DRIdrawable *drawable,
1208                                                __DRIbuffer **buffers,
1209                                                unsigned **attachments,
1210                                                int *count)
1211 {
1212    assert(intel->has_separate_stencil);
1213
1214    __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1215    struct gl_framebuffer *fb = drawable->driverPrivate;
1216
1217    const int max_attachments = 5;
1218    int i = 0;
1219
1220    *attachments = calloc(2 * max_attachments, sizeof(unsigned));
1221    if (!*attachments) {
1222       *buffers = NULL;
1223       *count = 0;
1224       return;
1225    }
1226
1227    struct intel_renderbuffer *front_rb;
1228    struct intel_renderbuffer *back_rb;
1229    struct intel_renderbuffer *depth_rb;
1230    struct intel_renderbuffer *stencil_rb;
1231
1232    front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
1233    back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
1234    depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
1235    stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
1236
1237    if ((intel->is_front_buffer_rendering ||
1238         intel->is_front_buffer_reading ||
1239         !back_rb) && front_rb) {
1240       (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT;
1241       (*attachments)[i++] = intel_bits_per_pixel(front_rb);
1242    }
1243
1244    if (back_rb) {
1245       (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT;
1246       (*attachments)[i++] = intel_bits_per_pixel(back_rb);
1247    }
1248
1249    /*
1250     * We request a separate stencil buffer, and perhaps a hiz buffer too, even
1251     * if we do not yet know if the X driver supports it. See the comments for
1252     * 'enum intel_dri2_has_hiz'.
1253     */
1254
1255    if (depth_rb) {
1256       (*attachments)[i++] = __DRI_BUFFER_DEPTH;
1257       (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1258
1259       if (intel->vtbl.is_hiz_depth_format(intel, depth_rb->Base.Format)) {
1260          /* Depth and hiz buffer have same bpp. */
1261          (*attachments)[i++] = __DRI_BUFFER_HIZ;
1262          (*attachments)[i++] = intel_bits_per_pixel(depth_rb);
1263       }
1264    }
1265
1266    if (stencil_rb) {
1267       assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1268       (*attachments)[i++] = __DRI_BUFFER_STENCIL;
1269       (*attachments)[i++] = intel_bits_per_pixel(stencil_rb);
1270    }
1271
1272    assert(i <= 2 * max_attachments);
1273
1274    *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1275                                                         &drawable->w,
1276                                                         &drawable->h,
1277                                                         *attachments, i / 2,
1278                                                         count,
1279                                                         drawable->loaderPrivate);
1280
1281    if (!*buffers) {
1282       free(*attachments);
1283       *attachments = NULL;
1284       *count = 0;
1285    }
1286 }
1287
1288 /**
1289  * \brief Assign a DRI buffer's DRM region to a renderbuffer.
1290  *
1291  * This is called from intel_update_renderbuffers().  It is used when 1) the
1292  * hardware supports separate stencil and 2) the X driver's separate stencil
1293  * support has been verified to work or is still unknown.
1294  *
1295  * \par Note:
1296  *    DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz
1297  *    are handled as special cases.
1298  *
1299  * \param buffer_name is a human readable name, such as "dri2 front buffer",
1300  *        that is passed to intel_region_alloc_for_handle().
1301  *
1302  * \see intel_update_renderbuffers()
1303  * \see intel_region_alloc_for_handle()
1304  * \see intel_renderbuffer_set_region()
1305  * \see enum intel_dri2_has_hiz
1306  */
1307 static void
1308 intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
1309                                                 __DRIdrawable *drawable,
1310                                                 __DRIbuffer *buffer,
1311                                                 struct intel_renderbuffer *rb,
1312                                                 const char *buffer_name)
1313 {
1314    assert(intel->has_separate_stencil);
1315    assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL);
1316
1317    if (!rb)
1318       return;
1319
1320    /* If the renderbuffer's and DRIbuffer's regions match, then continue. */
1321    if ((buffer->attachment != __DRI_BUFFER_HIZ &&
1322         rb->region &&
1323         rb->region->name == buffer->name) ||
1324        (buffer->attachment == __DRI_BUFFER_HIZ &&
1325         rb->hiz_region &&
1326         rb->hiz_region->name == buffer->name)) {
1327       return;
1328    }
1329
1330    if (unlikely(INTEL_DEBUG & DEBUG_DRI)) {
1331       fprintf(stderr,
1332               "attaching buffer %d, at %d, cpp %d, pitch %d\n",
1333               buffer->name, buffer->attachment,
1334               buffer->cpp, buffer->pitch);
1335    }
1336
1337    int buffer_width;
1338    int buffer_height;
1339    if (buffer->attachment == __DRI_BUFFER_STENCIL) {
1340       /* The stencil buffer has quirky pitch requirements.  From Section
1341        * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch":
1342        *    The pitch must be set to 2x the value computed based on width, as
1343        *    the stencil buffer is stored with two rows interleaved.
1344        *
1345        * To satisfy the pitch requirement, the X driver allocated the region
1346        * with the following dimensions.
1347        */
1348        buffer_width = ALIGN(drawable->w, 64);
1349        buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64);
1350    } else {
1351        buffer_width = drawable->w;
1352        buffer_height = drawable->h;
1353    }
1354
1355    struct intel_region *region =
1356       intel_region_alloc_for_handle(intel->intelScreen,
1357                                     buffer->cpp,
1358                                     buffer_width,
1359                                     buffer_height,
1360                                     buffer->pitch / buffer->cpp,
1361                                     buffer->name,
1362                                     buffer_name);
1363
1364    if (buffer->attachment == __DRI_BUFFER_HIZ) {
1365       intel_renderbuffer_set_hiz_region(intel, rb, region);
1366    } else {
1367       intel_renderbuffer_set_region(intel, rb, region);
1368    }
1369
1370    intel_region_release(&region);
1371 }
1372
1373 /**
1374  * \brief Verify that the X driver supports hiz and separate stencil.
1375  *
1376  * This implements the cleanup stage of the handshake described in the
1377  * comments for 'enum intel_dri2_has_hiz'.
1378  *
1379  * This should be called from intel_update_renderbuffers() after 1) the
1380  * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat()
1381  * and 2) the DRM region of each returned DRIbuffer has been assigned to the
1382  * appropriate intel_renderbuffer. Furthermore, this should be called *only*
1383  * when 1) intel_update_renderbuffers() tried to used the X driver's separate
1384  * stencil functionality and 2) it has not yet been determined if the X driver
1385  * supports separate stencil.
1386  *
1387  * If we determine that the X driver does have support, then we set
1388  * intel_screen.dri2_has_hiz to true and return.
1389  *
1390  * If we determine that the X driver lacks support, and we requested
1391  * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by
1392  * taking the following actions:
1393  *    1. Discard the framebuffer's stencil and depth renderbuffers.
1394  *    2. Create a combined depth/stencil renderbuffer and attach
1395  *       it to the framebuffer's depth and stencil attachment points.
1396  *    3. Query the drawable for a new set of buffers, which consists of the
1397  *       originally requested set plus DRI2BufferDepthStencil.
1398  *    4. Assign the DRI2BufferDepthStencil's DRM region to the new
1399  *       depth/stencil renderbuffer.
1400  *
1401  * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN
1402  *
1403  * \param drawable      Drawable whose buffers were queried.
1404  *
1405  * \param buffers       [in/out] As input, the buffer list returned by the
1406  *                      original DRI2 query. As output, the current buffer
1407  *                      list, which may have been altered by a new DRI2 query.
1408  *
1409  * \param attachments   [in/out] As input, the attachment list submitted
1410  *                      in the original DRI2 query. As output, the attachment
1411  *                      list that was submitted in the DRI2 query that
1412  *                      obtained the current buffer list, as returned in the
1413  *                      output parameter \c buffers.  (Note: If no new query
1414  *                      was made, then the list remains unaltered).
1415  *
1416  * \param count         [out] Number of buffers in the current buffer list, as
1417  *                      returned in the output parameter \c buffers.
1418  *
1419  * \see enum intel_dri2_has_hiz
1420  * \see struct intel_screen::dri2_has_hiz
1421  * \see intel_update_renderbuffers
1422  */
1423 static void
1424 intel_verify_dri2_has_hiz(struct intel_context *intel,
1425                           __DRIdrawable *drawable,
1426                           __DRIbuffer **buffers,
1427                           unsigned **attachments,
1428                           int *count)
1429 {
1430    assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN);
1431
1432    struct gl_framebuffer *fb = drawable->driverPrivate;
1433    struct intel_renderbuffer *stencil_rb =
1434       intel_get_renderbuffer(fb, BUFFER_STENCIL);
1435
1436    if (stencil_rb) {
1437       /*
1438        * We requested a DRI2BufferStencil without knowing if the X driver
1439        * supports it. Now, check if X handled the request correctly and clean
1440        * up if it did not. (See comments for 'enum intel_dri2_has_hiz').
1441        */
1442       struct intel_renderbuffer *depth_rb =
1443          intel_get_renderbuffer(fb, BUFFER_DEPTH);
1444       assert(stencil_rb->Base.Format == MESA_FORMAT_S8);
1445       assert(depth_rb && depth_rb->Base.Format == MESA_FORMAT_X8_Z24);
1446
1447       if (stencil_rb->region->tiling == I915_TILING_NONE) {
1448          /*
1449           * The stencil buffer is actually W tiled. The region's tiling is
1450           * I915_TILING_NONE, however, because the GTT is incapable of W
1451           * fencing.
1452           */
1453          intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE;
1454          return;
1455       } else {
1456          /*
1457           * Oops... the screen doesn't support separate stencil. Discard the
1458           * separate depth and stencil buffers and replace them with
1459           * a combined depth/stencil buffer. Discard the hiz buffer too.
1460           */
1461          intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE;
1462
1463          /* 1. Discard depth and stencil renderbuffers. */
1464          _mesa_remove_renderbuffer(fb, BUFFER_DEPTH);
1465          depth_rb = NULL;
1466          _mesa_remove_renderbuffer(fb, BUFFER_STENCIL);
1467          stencil_rb = NULL;
1468
1469          /* 2. Create new depth/stencil renderbuffer. */
1470          struct intel_renderbuffer *depth_stencil_rb =
1471             intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
1472          _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base);
1473          _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base);
1474
1475          /* 3. Append DRI2BufferDepthStencil to attachment list. */
1476          int old_count = *count;
1477          unsigned int *old_attachments = *attachments;
1478          *count = old_count + 1;
1479          *attachments = malloc(2 * (*count) * sizeof(unsigned));
1480          memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned));
1481          free(old_attachments);
1482          (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL;
1483          (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb);
1484
1485          /* 4. Request new set of DRI2 attachments. */
1486          __DRIscreen *screen = intel->intelScreen->driScrnPriv;
1487          *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
1488                                                               &drawable->w,
1489                                                               &drawable->h,
1490                                                               *attachments,
1491                                                               *count,
1492                                                               count,
1493                                                               drawable->loaderPrivate);
1494          if (!*buffers)
1495             return;
1496
1497          /*
1498           * I don't know how to recover from the failure assertion below.
1499           * Rather than fail gradually and unexpectedly, we should just die
1500           * now.
1501           */
1502          assert(*count == old_count + 1);
1503
1504          /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */
1505          __DRIbuffer *depth_stencil_buffer = NULL;
1506          for (int i = 0; i < *count; ++i) {
1507             if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
1508                depth_stencil_buffer = &(*buffers)[i];
1509                break;
1510             }
1511          }
1512          struct intel_region *region =
1513             intel_region_alloc_for_handle(intel->intelScreen,
1514                                           depth_stencil_buffer->cpp,
1515                                           drawable->w,
1516                                           drawable->h,
1517                                           depth_stencil_buffer->pitch
1518                                              / depth_stencil_buffer->cpp,
1519                                           depth_stencil_buffer->name,
1520                                           "dri2 depth / stencil buffer");
1521          intel_renderbuffer_set_region(intel,
1522                                        intel_get_renderbuffer(fb, BUFFER_DEPTH),
1523                                        region);
1524          intel_renderbuffer_set_region(intel,
1525                                        intel_get_renderbuffer(fb, BUFFER_STENCIL),
1526                                        region);
1527          intel_region_release(&region);
1528       }
1529    }
1530
1531    if (intel_framebuffer_has_hiz(fb)) {
1532       /*
1533        * In the future, the driver may advertise a GL config with hiz
1534        * compatible depth bits and 0 stencil bits (for example, when the
1535        * driver gains support for float32 depth buffers). When that day comes,
1536        * here we need to verify that the X driver does in fact support hiz and
1537        * clean up if it doesn't.
1538        *
1539        * Presently, however, no verification or clean up is necessary, and
1540        * execution should not reach here. If the framebuffer still has a hiz
1541        * region, then we have already set dri2_has_hiz to true after
1542        * confirming above that the stencil buffer is W tiled.
1543        */
1544       assert(0);
1545    }
1546 }