2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
28 #include "main/macros.h"
29 #include "intel_batchbuffer.h"
32 upload_sbe_state(struct brw_context *brw)
34 struct intel_context *intel = &brw->intel;
35 struct gl_context *ctx = &intel->ctx;
36 /* CACHE_NEW_VS_PROG */
37 uint32_t num_inputs = brw_count_bits(brw->vs.prog_data->outputs_written);
38 /* BRW_NEW_FRAGMENT_PROGRAM */
39 uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
40 uint32_t dw1, dw10, dw11;
42 int attr = 0, input_index = 0;
44 int urb_start = ctx->Transform.ClipPlanesEnabled ? 2 : 1;
46 int two_side_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide);
47 uint16_t attr_overrides[FRAG_ATTRIB_MAX];
49 /* FINISHME: Attribute Swizzle Control Mode? */
51 GEN7_SBE_SWIZZLE_ENABLE |
52 num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
53 (num_inputs + 1) / 2 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
54 urb_start << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
57 if (ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
58 dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
63 /* Create the mapping from the FS inputs we produce to the VS outputs
66 for (; attr < FRAG_ATTRIB_MAX; attr++) {
67 if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
70 if (ctx->Point.PointSprite &&
71 attr >= FRAG_ATTRIB_TEX0 && attr <= FRAG_ATTRIB_TEX7 &&
72 ctx->Point.CoordReplace[attr - FRAG_ATTRIB_TEX0]) {
73 dw10 |= (1 << input_index);
76 if (attr == FRAG_ATTRIB_PNTC)
77 dw10 |= (1 << input_index);
80 if (ctx->Light.ShadeModel == GL_FLAT) {
82 * Setup the Constant Interpolation Enable bit mask for each
83 * corresponding attribute(currently, we only care two attrs:
84 * FRAG_BIT_COL0 and FRAG_BIT_COL1).
86 * FIXME: should we care other attributes?
88 if (attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1)
89 dw11 |= (1 << input_index);
92 /* The hardware can only do the overrides on 16 overrides at a
93 * time, and the other up to 16 have to be lined up so that the
94 * input index = the output index. We'll need to do some
95 * tweaking to make sure that's the case.
97 assert(input_index < 16 || attr == input_index);
99 attr_overrides[input_index++] = get_attr_override(brw, attr,
103 for (; attr < FRAG_ATTRIB_MAX; attr++)
104 attr_overrides[input_index++] = 0;
107 OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
110 /* Output dwords 2 through 9 */
111 for (i = 0; i < 8; i++) {
112 OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
115 OUT_BATCH(dw10); /* point sprite texcoord bitmask */
116 OUT_BATCH(dw11); /* constant interp bitmask */
117 OUT_BATCH(0); /* wrapshortest enables 0-7 */
118 OUT_BATCH(0); /* wrapshortest enables 8-15 */
122 const struct brw_tracked_state gen7_sbe_state = {
124 .mesa = (_NEW_LIGHT |
127 .brw = (BRW_NEW_CONTEXT |
128 BRW_NEW_FRAGMENT_PROGRAM),
129 .cache = CACHE_NEW_VS_PROG
131 .emit = upload_sbe_state,
135 upload_sf_state(struct brw_context *brw)
137 struct intel_context *intel = &brw->intel;
138 struct gl_context *ctx = &intel->ctx;
139 uint32_t dw1, dw2, dw3;
142 bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
144 dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
147 dw1 |= (gen7_depth_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
150 if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
151 dw1 |= GEN6_SF_WINDING_CCW;
153 if (ctx->Polygon.OffsetFill)
154 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
156 if (ctx->Polygon.OffsetLine)
157 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
159 if (ctx->Polygon.OffsetPoint)
160 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
162 switch (ctx->Polygon.FrontMode) {
164 dw1 |= GEN6_SF_FRONT_SOLID;
168 dw1 |= GEN6_SF_FRONT_WIREFRAME;
172 dw1 |= GEN6_SF_FRONT_POINT;
180 switch (ctx->Polygon.BackMode) {
182 dw1 |= GEN6_SF_BACK_SOLID;
186 dw1 |= GEN6_SF_BACK_WIREFRAME;
190 dw1 |= GEN6_SF_BACK_POINT;
200 if (ctx->Polygon.CullFlag) {
201 switch (ctx->Polygon.CullFaceMode) {
203 dw2 |= GEN6_SF_CULL_FRONT;
206 dw2 |= GEN6_SF_CULL_BACK;
208 case GL_FRONT_AND_BACK:
209 dw2 |= GEN6_SF_CULL_BOTH;
216 dw2 |= GEN6_SF_CULL_NONE;
220 if (ctx->Scissor.Enabled)
221 dw2 |= GEN6_SF_SCISSOR_ENABLE;
224 dw2 |= U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7) <<
225 GEN6_SF_LINE_WIDTH_SHIFT;
226 if (ctx->Line.SmoothFlag) {
227 dw2 |= GEN6_SF_LINE_AA_ENABLE;
228 dw2 |= GEN6_SF_LINE_AA_MODE_TRUE;
229 dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
232 /* FINISHME: Last Pixel Enable? Vertex Sub Pixel Precision Select?
233 * FINISHME: AA Line Distance Mode?
239 if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
240 dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
242 /* Clamp to ARB_point_parameters user limits */
243 point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
245 /* Clamp to the hardware limits and convert to fixed point */
246 dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
249 if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
251 (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
252 (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
253 (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
255 dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
259 OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2));
263 OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
264 OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
265 OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
269 const struct brw_tracked_state gen7_sf_state = {
271 .mesa = (_NEW_LIGHT |
277 .brw = (BRW_NEW_CONTEXT),
278 .cache = CACHE_NEW_VS_PROG
280 .emit = upload_sf_state,