2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
33 #include "program/prog_parameter.h"
34 #include "program/prog_statevars.h"
35 #include "intel_batchbuffer.h"
38 gen6_prepare_wm_push_constants(struct brw_context *brw)
40 struct intel_context *intel = &brw->intel;
41 struct gl_context *ctx = &intel->ctx;
42 /* BRW_NEW_FRAGMENT_PROGRAM */
43 const struct brw_fragment_program *fp =
44 brw_fragment_program_const(brw->fragment_program);
46 /* Updates the ParameterValues[i] pointers for all parameters of the
47 * basic type of PROGRAM_STATE_VAR.
49 /* XXX: Should this happen somewhere before to get our state flag set? */
50 _mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
52 /* CACHE_NEW_WM_PROG */
53 if (brw->wm.prog_data->nr_params != 0) {
57 constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS,
58 brw->wm.prog_data->nr_params *
60 32, &brw->wm.push_const_offset);
62 for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
63 constants[i] = convert_param(brw->wm.prog_data->param_convert[i],
64 brw->wm.prog_data->param[i]);
68 printf("WM constants:\n");
69 for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
71 printf("g%d: ", brw->wm.prog_data->first_curbe_grf + i / 8);
72 printf("%8f ", constants[i]);
83 const struct brw_tracked_state gen6_wm_constants = {
85 .mesa = _NEW_PROGRAM_CONSTANTS,
86 .brw = (BRW_NEW_BATCH |
87 BRW_NEW_FRAGMENT_PROGRAM),
88 .cache = CACHE_NEW_WM_PROG,
90 .prepare = gen6_prepare_wm_push_constants,
94 upload_wm_state(struct brw_context *brw)
96 struct intel_context *intel = &brw->intel;
97 struct gl_context *ctx = &intel->ctx;
98 const struct brw_fragment_program *fp =
99 brw_fragment_program_const(brw->fragment_program);
100 uint32_t dw2, dw4, dw5, dw6;
102 /* CACHE_NEW_WM_PROG */
103 if (brw->wm.prog_data->nr_params == 0) {
104 /* Disable the push constant buffers. */
106 OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));
114 OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 |
115 GEN6_CONSTANT_BUFFER_0_ENABLE |
117 /* Pointer to the WM constant buffer. Covered by the set of
118 * state flags from gen6_prepare_wm_constants
120 OUT_BATCH(brw->wm.push_const_offset +
121 ALIGN(brw->wm.prog_data->nr_params,
122 brw->wm.prog_data->dispatch_width) / 8 - 1);
129 dw2 = dw4 = dw5 = dw6 = 0;
130 dw4 |= GEN6_WM_STATISTICS_ENABLE;
131 dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
132 dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
134 /* OpenGL non-ieee floating point mode */
135 dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
137 /* BRW_NEW_NR_WM_SURFACES */
138 dw2 |= brw->wm.nr_surfaces << GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT;
140 /* CACHE_NEW_SAMPLER */
141 dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
142 dw4 |= (brw->wm.prog_data->first_curbe_grf <<
143 GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
144 dw4 |= (brw->wm.prog_data->first_curbe_grf_16 <<
145 GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
147 dw5 |= (brw->wm_max_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
149 /* CACHE_NEW_WM_PROG */
150 if (brw->wm.prog_data->dispatch_width == 8) {
151 dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
152 if (brw->wm.prog_data->prog_offset_16)
153 dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
155 dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
159 if (ctx->Line.StippleFlag)
160 dw5 |= GEN6_WM_LINE_STIPPLE_ENABLE;
163 if (ctx->Polygon.StippleFlag)
164 dw5 |= GEN6_WM_POLYGON_STIPPLE_ENABLE;
166 /* BRW_NEW_FRAGMENT_PROGRAM */
167 if (fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
168 dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
169 if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
170 dw5 |= GEN6_WM_COMPUTED_DEPTH;
173 if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
174 dw5 |= GEN6_WM_KILL_ENABLE;
176 if (brw_color_buffer_write_enabled(brw) ||
177 dw5 & (GEN6_WM_KILL_ENABLE | GEN6_WM_COMPUTED_DEPTH)) {
178 dw5 |= GEN6_WM_DISPATCH_ENABLE;
181 dw6 |= GEN6_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
183 dw6 |= _mesa_bitcount_64(brw->fragment_program->Base.InputsRead) <<
184 GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
187 OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2));
188 OUT_BATCH(brw->wm.prog_offset);
190 if (brw->wm.prog_data->total_scratch) {
191 OUT_RELOC(brw->wm.scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
192 ffs(brw->wm.prog_data->total_scratch) - 11);
199 OUT_BATCH(0); /* kernel 1 pointer */
200 /* kernel 2 pointer */
201 OUT_BATCH(brw->wm.prog_offset + brw->wm.prog_data->prog_offset_16);
205 const struct brw_tracked_state gen6_wm_state = {
210 _NEW_PROGRAM_CONSTANTS |
212 .brw = (BRW_NEW_FRAGMENT_PROGRAM |
213 BRW_NEW_NR_WM_SURFACES |
216 .cache = (CACHE_NEW_SAMPLER |
219 .emit = upload_wm_state,