2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 #include "main/macros.h"
29 #include "shader/program.h"
30 #include "shader/prog_parameter.h"
31 #include "shader/prog_print.h"
32 #include "brw_context.h"
33 #include "brw_defines.h"
37 is_single_channel_dp4(struct brw_instruction *insn)
39 if (insn->header.opcode != BRW_OPCODE_DP4 ||
40 insn->header.execution_size != BRW_EXECUTE_8 ||
41 insn->header.access_mode != BRW_ALIGN_16 ||
42 insn->bits1.da1.dest_reg_file != BRW_GENERAL_REGISTER_FILE)
45 if (!is_power_of_two(insn->bits1.da16.dest_writemask))
52 * Sets the dependency control fields on DP4 instructions.
54 * The hardware only tracks dependencies on a register basis, so when
62 * It will wait to do the DP4 dst.y until the dst.x is resolved, etc.
63 * We can examine our instruction stream and set the dependency
64 * control fields to tell the hardware when to do it.
66 * We may want to extend this to other instructions that are used to
67 * fill in a channel at a time of the destination register.
70 brw_set_dp4_dependency_control(struct brw_compile *p)
74 for (i = 1; i < p->nr_insn; i++) {
75 struct brw_instruction *insn = &p->store[i];
76 struct brw_instruction *prev = &p->store[i - 1];
78 if (!is_single_channel_dp4(prev))
81 if (!is_single_channel_dp4(insn)) {
86 /* Only avoid hw dep control if the write masks are different
87 * channels of one reg.
89 if (insn->bits1.da16.dest_writemask == prev->bits1.da16.dest_writemask)
91 if (insn->bits1.da16.dest_reg_nr != prev->bits1.da16.dest_reg_nr)
94 /* Check if the second instruction depends on the previous one
97 if (insn->bits1.da1.src0_reg_file == BRW_GENERAL_REGISTER_FILE &&
98 (insn->bits2.da1.src0_address_mode != BRW_ADDRESS_DIRECT ||
99 insn->bits2.da1.src0_reg_nr == insn->bits1.da16.dest_reg_nr))
101 if (insn->bits1.da1.src1_reg_file == BRW_GENERAL_REGISTER_FILE &&
102 (insn->bits3.da1.src1_address_mode != BRW_ADDRESS_DIRECT ||
103 insn->bits3.da1.src1_reg_nr == insn->bits1.da16.dest_reg_nr))
106 prev->header.dependency_control |= BRW_DEPENDENCY_NOTCLEARED;
107 insn->header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED;
112 brw_optimize(struct brw_compile *p)
114 brw_set_dp4_dependency_control(p);