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3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
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28 /** @file i915_tex_layout.c
29 * Code to layout images in a mipmap tree for i830M-GM915 and G945 and beyond.
32 #include "intel_mipmap_tree.h"
33 #include "intel_tex_layout.h"
34 #include "main/macros.h"
35 #include "intel_context.h"
37 #define FILE_DEBUG_FLAG DEBUG_TEXTURE
39 static GLint initial_offsets[6][2] = {
40 [FACE_POS_X] = {0, 0},
41 [FACE_POS_Y] = {1, 0},
42 [FACE_POS_Z] = {1, 1},
43 [FACE_NEG_X] = {0, 2},
44 [FACE_NEG_Y] = {1, 2},
45 [FACE_NEG_Z] = {1, 3},
49 static GLint step_offsets[6][2] = {
50 [FACE_POS_X] = {0, 2},
51 [FACE_POS_Y] = {-1, 2},
52 [FACE_POS_Z] = {-1, 1},
53 [FACE_NEG_X] = {0, 2},
54 [FACE_NEG_Y] = {-1, 2},
55 [FACE_NEG_Z] = {-1, 1},
59 static GLint bottom_offsets[6] = {
60 [FACE_POS_X] = 16 + 0 * 8,
61 [FACE_POS_Y] = 16 + 1 * 8,
62 [FACE_POS_Z] = 16 + 2 * 8,
63 [FACE_NEG_X] = 16 + 3 * 8,
64 [FACE_NEG_Y] = 16 + 4 * 8,
65 [FACE_NEG_Z] = 16 + 5 * 8,
70 * Cube texture map layout for i830M-GM915 and
71 * non-compressed cube texture map on GM945.
73 * Hardware layout looks like:
115 i915_miptree_layout_cube(struct intel_context *intel,
116 struct intel_mipmap_tree * mt,
119 const GLuint dim = mt->width0;
121 GLuint lvlWidth = mt->width0, lvlHeight = mt->height0;
124 assert(lvlWidth == lvlHeight); /* cubemap images are square */
126 /* double pitch for cube layouts */
127 mt->total_width = dim * 2;
128 mt->total_height = dim * 4;
130 for (level = mt->first_level; level <= mt->last_level; level++) {
131 intel_miptree_set_level_info(mt, level, 6,
139 for (face = 0; face < 6; face++) {
140 GLuint x = initial_offsets[face][0] * dim;
141 GLuint y = initial_offsets[face][1] * dim;
144 for (level = mt->first_level; level <= mt->last_level; level++) {
145 intel_miptree_set_image_offset(mt, level, face, x, y);
148 printf("cube mipmap %d/%d (%d..%d) is 0x0\n",
149 face, level, mt->first_level, mt->last_level);
152 x += step_offsets[face][0] * d;
153 y += step_offsets[face][1] * d;
159 i915_miptree_layout_3d(struct intel_context *intel,
160 struct intel_mipmap_tree * mt,
163 GLuint width = mt->width0;
164 GLuint height = mt->height0;
165 GLuint depth = mt->depth0;
166 GLuint stack_height = 0;
169 /* Calculate the size of a single slice. */
170 mt->total_width = mt->width0;
172 /* XXX: hardware expects/requires 9 levels at minimum. */
173 for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) {
174 intel_miptree_set_level_info(mt, level, depth, 0, mt->total_height,
175 width, height, depth);
177 stack_height += MAX2(2, height);
179 width = minify(width);
180 height = minify(height);
181 depth = minify(depth);
184 /* Fixup depth image_offsets: */
186 for (level = mt->first_level; level <= mt->last_level; level++) {
188 for (i = 0; i < depth; i++) {
189 intel_miptree_set_image_offset(mt, level, i,
190 0, i * stack_height);
193 depth = minify(depth);
196 /* Multiply slice size by texture depth for total size. It's
197 * remarkable how wasteful of memory the i915 texture layouts
198 * are. They are largely fixed in the i945.
200 mt->total_height = stack_height * mt->depth0;
204 i915_miptree_layout_2d(struct intel_context *intel,
205 struct intel_mipmap_tree * mt,
208 GLuint width = mt->width0;
209 GLuint height = mt->height0;
213 mt->total_width = mt->width0;
214 mt->total_height = 0;
216 for (level = mt->first_level; level <= mt->last_level; level++) {
217 intel_miptree_set_level_info(mt, level, 1,
222 img_height = ALIGN(height, 4) / 4;
224 img_height = ALIGN(height, 2);
226 mt->total_height += img_height;
228 width = minify(width);
229 height = minify(height);
234 i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
237 switch (mt->target) {
238 case GL_TEXTURE_CUBE_MAP:
239 i915_miptree_layout_cube(intel, mt, tiling);
242 i915_miptree_layout_3d(intel, mt, tiling);
246 case GL_TEXTURE_RECTANGLE_ARB:
247 i915_miptree_layout_2d(intel, mt, tiling);
250 _mesa_problem(NULL, "Unexpected tex target in i915_miptree_layout()");
254 DBG("%s: %dx%dx%d\n", __FUNCTION__,
255 mt->total_width, mt->total_height, mt->cpp);
262 * Compressed cube texture map layout for GM945 and later.
264 * The hardware layout looks like the 830-915 layout, except for the small
265 * sizes. A zoomed in view of the layout for 945 is:
307 * +---+ +---+---+---+---+---+---+---+---+---+
308 * |4x4| |4x4| |2x2| |2x2| |2x2| |2x2|
309 * | +z| | -z| | +x| | +y| | +z| | -x| ...
310 * | | | | | | | | | | | |
311 * +---+ +---+ +---+ +---+ +---+ +---+
313 * The bottom row continues with the remaining 2x2 then the 1x1 mip contents
314 * in order, with each of them aligned to a 8x8 block boundary. Thus, for
315 * 32x32 cube maps and smaller, the bottom row layout is going to dictate the
316 * pitch of the tree. For a tree with 4x4 images, the pitch is at least
317 * 14 * 8 = 112 texels, for 2x2 it is at least 12 * 8 texels, and for 1x1
318 * it is 6 * 8 texels.
322 i945_miptree_layout_cube(struct intel_context *intel,
323 struct intel_mipmap_tree * mt,
326 const GLuint dim = mt->width0;
328 GLuint lvlWidth = mt->width0, lvlHeight = mt->height0;
331 assert(lvlWidth == lvlHeight); /* cubemap images are square */
333 /* Depending on the size of the largest images, pitch can be
334 * determined either by the old-style packing of cubemap faces,
335 * or the final row of 4x4, 2x2 and 1x1 faces below this.
338 mt->total_width = dim * 2;
340 mt->total_width = 14 * 8;
343 mt->total_height = dim * 4 + 4;
345 mt->total_height = 4;
347 /* Set all the levels to effectively occupy the whole rectangular region. */
348 for (level = mt->first_level; level <= mt->last_level; level++) {
349 intel_miptree_set_level_info(mt, level, 6,
351 lvlWidth, lvlHeight, 1);
356 for (face = 0; face < 6; face++) {
357 GLuint x = initial_offsets[face][0] * dim;
358 GLuint y = initial_offsets[face][1] * dim;
361 if (dim == 4 && face >= 4) {
362 y = mt->total_height - 4;
364 } else if (dim < 4 && (face > 0 || mt->first_level > 0)) {
365 y = mt->total_height - 4;
369 for (level = mt->first_level; level <= mt->last_level; level++) {
370 intel_miptree_set_image_offset(mt, level, face, x, y);
379 x += step_offsets[face][0] * d;
380 y += step_offsets[face][1] * d;
389 y = mt->total_height - 4;
396 y = mt->total_height - 4;
397 x = bottom_offsets[face];
405 x += step_offsets[face][0] * d;
406 y += step_offsets[face][1] * d;
414 i945_miptree_layout_3d(struct intel_context *intel,
415 struct intel_mipmap_tree * mt,
418 GLuint width = mt->width0;
419 GLuint height = mt->height0;
420 GLuint depth = mt->depth0;
421 GLuint pack_x_pitch, pack_x_nr;
425 mt->total_width = mt->width0;
426 mt->total_height = 0;
428 pack_y_pitch = MAX2(mt->height0, 2);
429 pack_x_pitch = mt->total_width;
432 for (level = mt->first_level; level <= mt->last_level; level++) {
437 intel_miptree_set_level_info(mt, level, depth,
439 width, height, depth);
441 for (q = 0; q < depth;) {
442 for (j = 0; j < pack_x_nr && q < depth; j++, q++) {
443 intel_miptree_set_image_offset(mt, level, q, x, y);
451 mt->total_height += y;
453 if (pack_x_pitch > 4) {
456 assert(pack_x_pitch * pack_x_nr <= mt->total_width);
459 if (pack_y_pitch > 2) {
463 width = minify(width);
464 height = minify(height);
465 depth = minify(depth);
470 i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
473 switch (mt->target) {
474 case GL_TEXTURE_CUBE_MAP:
476 i945_miptree_layout_cube(intel, mt, tiling);
478 i915_miptree_layout_cube(intel, mt, tiling);
481 i945_miptree_layout_3d(intel, mt, tiling);
485 case GL_TEXTURE_RECTANGLE_ARB:
486 i945_miptree_layout_2d(intel, mt, tiling, 1);
489 _mesa_problem(NULL, "Unexpected tex target in i945_miptree_layout()");
493 DBG("%s: %dx%dx%d\n", __FUNCTION__,
494 mt->total_width, mt->total_height, mt->cpp);