src/mesa/drivers/dri/i915/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34 #include "main/state.h"
  35 #include "tnl/tnl.h"
  36 #include "tnl/t_context.h"
  37
  38 #include "texmem.h"
  39
  40 #include "drivers/common/driverfuncs.h"
  41
  42 #include "intel_fbo.h"
  43 #include "intel_screen.h"
  44 #include "intel_batchbuffer.h"
  45 #include "intel_buffers.h"
  46
  47 #include "i915_context.h"
  48 #include "i915_reg.h"
  49
  50 #define FILE_DEBUG_FLAG DEBUG_STATE
  51
  52 void
  53 i915_update_stencil(struct gl_context * ctx)
  54 {
  55    struct i915_context *i915 = I915_CONTEXT(ctx);
  56    GLuint front_ref, front_writemask, front_mask;
  57    GLenum front_func, front_fail, front_pass_z_fail, front_pass_z_pass;
  58    GLuint back_ref, back_writemask, back_mask;
  59    GLenum back_func, back_fail, back_pass_z_fail, back_pass_z_pass;
  60    GLuint dirty = 0;
  61
  62    /* The 915 considers CW to be "front" for two-sided stencil, so choose
  63     * appropriately.
  64     */
  65    /* _NEW_POLYGON | _NEW_STENCIL */
  66    if (ctx->Polygon.FrontFace == GL_CW) {
  67       front_ref = ctx->Stencil.Ref[0];
  68       front_mask = ctx->Stencil.ValueMask[0];
  69       front_writemask = ctx->Stencil.WriteMask[0];
  70       front_func = ctx->Stencil.Function[0];
  71       front_fail = ctx->Stencil.FailFunc[0];
  72       front_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  73       front_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  74       back_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  75       back_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  76       back_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  77       back_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  78       back_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  79       back_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  80       back_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  81    } else {
  82       front_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
  83       front_mask = ctx->Stencil.ValueMask[ctx->Stencil._BackFace];
  84       front_writemask = ctx->Stencil.WriteMask[ctx->Stencil._BackFace];
  85       front_func = ctx->Stencil.Function[ctx->Stencil._BackFace];
  86       front_fail = ctx->Stencil.FailFunc[ctx->Stencil._BackFace];
  87       front_pass_z_fail = ctx->Stencil.ZFailFunc[ctx->Stencil._BackFace];
  88       front_pass_z_pass = ctx->Stencil.ZPassFunc[ctx->Stencil._BackFace];
  89       back_ref = ctx->Stencil.Ref[0];
  90       back_mask = ctx->Stencil.ValueMask[0];
  91       back_writemask = ctx->Stencil.WriteMask[0];
  92       back_func = ctx->Stencil.Function[0];
  93       back_fail = ctx->Stencil.FailFunc[0];
  94       back_pass_z_fail = ctx->Stencil.ZFailFunc[0];
  95       back_pass_z_pass = ctx->Stencil.ZPassFunc[0];
  96    }
  97 #define set_ctx_bits(reg, mask, set) do{ \
  98    GLuint dw = i915->state.Ctx[reg]; \
  99    dw &= ~(mask); \
 100    dw |= (set); \
 101    dirty |= dw != i915->state.Ctx[reg]; \
 102    i915->state.Ctx[reg] = dw; \
 103 } while(0)
 104
 105    /* Set front state. */
 106    set_ctx_bits(I915_CTXREG_STATE4,
 107                 MODE4_ENABLE_STENCIL_TEST_MASK |
 108                 MODE4_ENABLE_STENCIL_WRITE_MASK,
 109                 ENABLE_STENCIL_TEST_MASK |
 110                 ENABLE_STENCIL_WRITE_MASK |
 111                 STENCIL_TEST_MASK(front_mask) |
 112                 STENCIL_WRITE_MASK(front_writemask));
 113
 114    set_ctx_bits(I915_CTXREG_LIS5,
 115                 S5_STENCIL_REF_MASK |
 116                 S5_STENCIL_TEST_FUNC_MASK |
 117                 S5_STENCIL_FAIL_MASK |
 118                 S5_STENCIL_PASS_Z_FAIL_MASK |
 119                 S5_STENCIL_PASS_Z_PASS_MASK,
 120                 (front_ref << S5_STENCIL_REF_SHIFT) |
 121                 (intel_translate_compare_func(front_func) << S5_STENCIL_TEST_FUNC_SHIFT) |
 122                 (intel_translate_stencil_op(front_fail) << S5_STENCIL_FAIL_SHIFT) |
 123                 (intel_translate_stencil_op(front_pass_z_fail) <<
 124                  S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 125                 (intel_translate_stencil_op(front_pass_z_pass) <<
 126                  S5_STENCIL_PASS_Z_PASS_SHIFT));
 127
 128    /* Set back state if different from front. */
 129    if (ctx->Stencil._TestTwoSide) {
 130       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 131                    BFO_STENCIL_REF_MASK |
 132                    BFO_STENCIL_TEST_MASK |
 133                    BFO_STENCIL_FAIL_MASK |
 134                    BFO_STENCIL_PASS_Z_FAIL_MASK |
 135                    BFO_STENCIL_PASS_Z_PASS_MASK,
 136                    BFO_STENCIL_TWO_SIDE |
 137                    (back_ref << BFO_STENCIL_REF_SHIFT) |
 138                    (intel_translate_compare_func(back_func) << BFO_STENCIL_TEST_SHIFT) |
 139                    (intel_translate_stencil_op(back_fail) << BFO_STENCIL_FAIL_SHIFT) |
 140                    (intel_translate_stencil_op(back_pass_z_fail) <<
 141                     BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
 142                    (intel_translate_stencil_op(back_pass_z_pass) <<
 143                     BFO_STENCIL_PASS_Z_PASS_SHIFT));
 144
 145       set_ctx_bits(I915_CTXREG_BF_STENCIL_MASKS,
 146                    BFM_STENCIL_TEST_MASK_MASK |
 147                    BFM_STENCIL_WRITE_MASK_MASK,
 148                    BFM_STENCIL_TEST_MASK(back_mask) |
 149                    BFM_STENCIL_WRITE_MASK(back_writemask));
 150    } else {
 151       set_ctx_bits(I915_CTXREG_BF_STENCIL_OPS,
 152                    BFO_STENCIL_TWO_SIDE, 0);
 153    }
 154
 155 #undef set_ctx_bits
 156
 157    if (dirty)
 158       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 159 }
 160
 161 static void
 162 i915StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint ref,
 163                         GLuint mask)
 164 {
 165 }
 166
 167 static void
 168 i915StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
 169 {
 170 }
 171
 172 static void
 173 i915StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum zfail,
 174                       GLenum zpass)
 175 {
 176 }
 177
 178 static void
 179 i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
 180 {
 181    struct i915_context *i915 = I915_CONTEXT(ctx);
 182    int test = intel_translate_compare_func(func);
 183    GLubyte refByte;
 184    GLuint dw;
 185
 186    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 187
 188    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 189    dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
 190    dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 191           (((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
 192    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 193       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 194       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 195    }
 196 }
 197
 198 /* This function makes sure that the proper enables are
 199  * set for LogicOp, Independant Alpha Blend, and Blending.
 200  * It needs to be called from numerous places where we
 201  * could change the LogicOp or Independant Alpha Blend without subsequent
 202  * calls to glEnable.
 203  */
 204 static void
 205 i915EvalLogicOpBlendState(struct gl_context * ctx)
 206 {
 207    struct i915_context *i915 = I915_CONTEXT(ctx);
 208    GLuint dw0, dw1;
 209
 210    dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
 211    dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
 212
 213    if (_mesa_rgba_logicop_enabled(ctx)) {
 214       dw0 |= S5_LOGICOP_ENABLE;
 215       dw1 &= ~S6_CBUF_BLEND_ENABLE;
 216    }
 217    else {
 218       dw0 &= ~S5_LOGICOP_ENABLE;
 219
 220       if (ctx->Color.BlendEnabled) {
 221          dw1 |= S6_CBUF_BLEND_ENABLE;
 222       }
 223       else {
 224          dw1 &= ~S6_CBUF_BLEND_ENABLE;
 225       }
 226    }
 227    if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
 228        dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 229       i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
 230       i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
 231
 232       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 233    }
 234 }
 235
 236 static void
 237 i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
 238 {
 239    struct i915_context *i915 = I915_CONTEXT(ctx);
 240    GLubyte r, g, b, a;
 241    GLuint dw;
 242
 243    DBG("%s\n", __FUNCTION__);
 244
 245    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 246    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 247    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 248    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 249
 250    dw = (a << 24) | (r << 16) | (g << 8) | b;
 251    if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
 252       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
 253       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 254    }
 255 }
 256
 257
 258 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 259 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 260 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 261 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 262
 263
 264
 265 static GLuint
 266 translate_blend_equation(GLenum mode)
 267 {
 268    switch (mode) {
 269    case GL_FUNC_ADD:
 270       return BLENDFUNC_ADD;
 271    case GL_MIN:
 272       return BLENDFUNC_MIN;
 273    case GL_MAX:
 274       return BLENDFUNC_MAX;
 275    case GL_FUNC_SUBTRACT:
 276       return BLENDFUNC_SUBTRACT;
 277    case GL_FUNC_REVERSE_SUBTRACT:
 278       return BLENDFUNC_REVERSE_SUBTRACT;
 279    default:
 280       return 0;
 281    }
 282 }
 283
 284 static void
 285 i915UpdateBlendState(struct gl_context * ctx)
 286 {
 287    struct i915_context *i915 = I915_CONTEXT(ctx);
 288    GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
 289                  ~(IAB_SRC_FACTOR_MASK |
 290                    IAB_DST_FACTOR_MASK |
 291                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 292
 293    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 294                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 295                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 296
 297    GLuint eqRGB = ctx->Color.Blend[0].EquationRGB;
 298    GLuint eqA = ctx->Color.Blend[0].EquationA;
 299    GLuint srcRGB = ctx->Color.Blend[0].SrcRGB;
 300    GLuint dstRGB = ctx->Color.Blend[0].DstRGB;
 301    GLuint srcA = ctx->Color.Blend[0].SrcA;
 302    GLuint dstA = ctx->Color.Blend[0].DstA;
 303
 304    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 305       srcRGB = dstRGB = GL_ONE;
 306    }
 307
 308    if (eqA == GL_MIN || eqA == GL_MAX) {
 309       srcA = dstA = GL_ONE;
 310    }
 311
 312    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 313    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 314    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 315
 316    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 317    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 318    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 319
 320    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 321       iab |= IAB_ENABLE;
 322
 323    if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
 324       i915->state.Blend[I915_BLENDREG_IAB] = iab;
 325       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 326    }
 327    if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 328       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 329       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 330    }
 331
 332    /* This will catch a logicop blend equation */
 333    i915EvalLogicOpBlendState(ctx);
 334 }
 335
 336
 337 static void
 338 i915BlendFuncSeparate(struct gl_context * ctx, GLenum srcRGB,
 339                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 340 {
 341    i915UpdateBlendState(ctx);
 342 }
 343
 344
 345 static void
 346 i915BlendEquationSeparate(struct gl_context * ctx, GLenum eqRGB, GLenum eqA)
 347 {
 348    i915UpdateBlendState(ctx);
 349 }
 350
 351
 352 static void
 353 i915DepthFunc(struct gl_context * ctx, GLenum func)
 354 {
 355    struct i915_context *i915 = I915_CONTEXT(ctx);
 356    int test = intel_translate_compare_func(func);
 357    GLuint dw;
 358
 359    DBG("%s\n", __FUNCTION__);
 360
 361    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 362    dw &= ~S6_DEPTH_TEST_FUNC_MASK;
 363    dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 364    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 365       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 366       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 367    }
 368 }
 369
 370 static void
 371 i915DepthMask(struct gl_context * ctx, GLboolean flag)
 372 {
 373    struct i915_context *i915 = I915_CONTEXT(ctx);
 374    GLuint dw;
 375
 376    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 377
 378    if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 379       flag = false;
 380
 381    dw = i915->state.Ctx[I915_CTXREG_LIS6];
 382    if (flag && ctx->Depth.Test)
 383       dw |= S6_DEPTH_WRITE_ENABLE;
 384    else
 385       dw &= ~S6_DEPTH_WRITE_ENABLE;
 386    if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 387       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 388       i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 389    }
 390 }
 391
 392
 393
 394 /**
 395  * Update the viewport transformation matrix.  Depends on:
 396  *  - viewport pos/size
 397  *  - depthrange
 398  *  - window pos/size or FBO size
 399  */
 400 void
 401 intelCalcViewport(struct gl_context * ctx)
 402 {
 403    struct intel_context *intel = intel_context(ctx);
 404
 405    if (ctx->DrawBuffer->Name == 0) {
 406       _math_matrix_viewport(&intel->ViewportMatrix,
 407                             ctx->Viewport.X,
 408                             ctx->DrawBuffer->Height - ctx->Viewport.Y,
 409                             ctx->Viewport.Width,
 410                             -ctx->Viewport.Height,
 411                             ctx->Viewport.Near,
 412                             ctx->Viewport.Far,
 413                             1.0);
 414    } else {
 415       _math_matrix_viewport(&intel->ViewportMatrix,
 416                             ctx->Viewport.X,
 417                             ctx->Viewport.Y,
 418                             ctx->Viewport.Width,
 419                             ctx->Viewport.Height,
 420                             ctx->Viewport.Near,
 421                             ctx->Viewport.Far,
 422                             1.0);
 423    }
 424 }
 425
 426
 427 /** Called from ctx->Driver.Viewport() */
 428 static void
 429 i915Viewport(struct gl_context * ctx,
 430               GLint x, GLint y, GLsizei width, GLsizei height)
 431 {
 432    intelCalcViewport(ctx);
 433 }
 434
 435
 436 /** Called from ctx->Driver.DepthRange() */
 437 static void
 438 i915DepthRange(struct gl_context * ctx, GLclampd nearval, GLclampd farval)
 439 {
 440    intelCalcViewport(ctx);
 441 }
 442
 443
 444 /* =============================================================
 445  * Polygon stipple
 446  *
 447  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 448  * Fortunately stipple is usually a repeating pattern.
 449  */
 450 static void
 451 i915PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
 452 {
 453    struct i915_context *i915 = I915_CONTEXT(ctx);
 454    const GLubyte *m;
 455    GLubyte p[4];
 456    int i, j, k;
 457    int active = (ctx->Polygon.StippleFlag &&
 458                  i915->intel.reduced_primitive == GL_TRIANGLES);
 459    GLuint newMask;
 460
 461    if (active) {
 462       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 463       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 464    }
 465
 466    /* Use the already unpacked stipple data from the context rather than the
 467     * uninterpreted mask passed in.
 468     */
 469    mask = (const GLubyte *)ctx->PolygonStipple;
 470    m = mask;
 471
 472    p[0] = mask[12] & 0xf;
 473    p[0] |= p[0] << 4;
 474    p[1] = mask[8] & 0xf;
 475    p[1] |= p[1] << 4;
 476    p[2] = mask[4] & 0xf;
 477    p[2] |= p[2] << 4;
 478    p[3] = mask[0] & 0xf;
 479    p[3] |= p[3] << 4;
 480
 481    for (k = 0; k < 8; k++)
 482       for (j = 3; j >= 0; j--)
 483          for (i = 0; i < 4; i++, m++)
 484             if (*m != p[j]) {
 485                i915->intel.hw_stipple = 0;
 486                return;
 487             }
 488
 489    newMask = (((p[0] & 0xf) << 0) |
 490               ((p[1] & 0xf) << 4) |
 491               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 492
 493
 494    if (newMask == 0xffff || newMask == 0x0) {
 495       /* this is needed to make conform pass */
 496       i915->intel.hw_stipple = 0;
 497       return;
 498    }
 499
 500    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 501    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 502    i915->intel.hw_stipple = 1;
 503
 504    if (active)
 505       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 506 }
 507
 508
 509 /* =============================================================
 510  * Hardware clipping
 511  */
 512 static void
 513 i915Scissor(struct gl_context * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 514 {
 515    struct i915_context *i915 = I915_CONTEXT(ctx);
 516    int x1, y1, x2, y2;
 517
 518    if (!ctx->DrawBuffer)
 519       return;
 520
 521    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 522
 523    if (ctx->DrawBuffer->Name == 0) {
 524       x1 = x;
 525       y1 = ctx->DrawBuffer->Height - (y + h);
 526       x2 = x + w - 1;
 527       y2 = y1 + h - 1;
 528       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 529    }
 530    else {
 531       /* FBO - not inverted
 532        */
 533       x1 = x;
 534       y1 = y;
 535       x2 = x + w - 1;
 536       y2 = y + h - 1;
 537       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 538    }
 539
 540    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 541    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 542    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 543    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 544
 545    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 546
 547    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 548    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 549    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 550 }
 551
 552 static void
 553 i915LogicOp(struct gl_context * ctx, GLenum opcode)
 554 {
 555    struct i915_context *i915 = I915_CONTEXT(ctx);
 556    int tmp = intel_translate_logic_op(opcode);
 557
 558    DBG("%s\n", __FUNCTION__);
 559
 560    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 561    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 562    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 563 }
 564
 565
 566
 567 static void
 568 i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
 569 {
 570    struct i915_context *i915 = I915_CONTEXT(ctx);
 571    GLuint mode, dw;
 572
 573    DBG("%s %d\n", __FUNCTION__,
 574        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 575
 576    if (!ctx->Polygon.CullFlag) {
 577       mode = S4_CULLMODE_NONE;
 578    }
 579    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 580       mode = S4_CULLMODE_CW;
 581
 582       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 583          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 584       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 585          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 586       if (ctx->Polygon.FrontFace != GL_CCW)
 587          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 588    }
 589    else {
 590       mode = S4_CULLMODE_BOTH;
 591    }
 592
 593    dw = i915->state.Ctx[I915_CTXREG_LIS4];
 594    dw &= ~S4_CULLMODE_MASK;
 595    dw |= mode;
 596    if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 597       i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 598       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 599    }
 600 }
 601
 602 static void
 603 i915LineWidth(struct gl_context * ctx, GLfloat widthf)
 604 {
 605    struct i915_context *i915 = I915_CONTEXT(ctx);
 606    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 607    int width;
 608
 609    DBG("%s\n", __FUNCTION__);
 610
 611    width = (int) (widthf * 2);
 612    width = CLAMP(width, 1, 0xf);
 613    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 614
 615    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 616       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 617       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 618    }
 619 }
 620
 621 static void
 622 i915PointSize(struct gl_context * ctx, GLfloat size)
 623 {
 624    struct i915_context *i915 = I915_CONTEXT(ctx);
 625    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 626    GLint point_size = (int) round(size);
 627
 628    DBG("%s\n", __FUNCTION__);
 629
 630    point_size = CLAMP(point_size, 1, 255);
 631    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 632
 633    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 634       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 635       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 636    }
 637 }
 638
 639
 640 static void
 641 i915PointParameterfv(struct gl_context * ctx, GLenum pname, const GLfloat *params)
 642 {
 643    struct i915_context *i915 = I915_CONTEXT(ctx);
 644
 645    switch (pname) {
 646    case GL_POINT_SPRITE_COORD_ORIGIN:
 647       /* This could be supported, but it would require modifying the fragment
 648        * program to invert the y component of the texture coordinate by
 649        * inserting a 'SUB tc.y, {1.0}.xxxx, tc' instruction.
 650        */
 651       FALLBACK(&i915->intel, I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN,
 652                (params[0] != GL_UPPER_LEFT));
 653       break;
 654    }
 655 }
 656
 657
 658 /* =============================================================
 659  * Color masks
 660  */
 661
 662 static void
 663 i915ColorMask(struct gl_context * ctx,
 664               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 665 {
 666    struct i915_context *i915 = I915_CONTEXT(ctx);
 667    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 668
 669    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 670        a);
 671
 672    if (!r)
 673       tmp |= S5_WRITEDISABLE_RED;
 674    if (!g)
 675       tmp |= S5_WRITEDISABLE_GREEN;
 676    if (!b)
 677       tmp |= S5_WRITEDISABLE_BLUE;
 678    if (!a)
 679       tmp |= S5_WRITEDISABLE_ALPHA;
 680
 681    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 682       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 683       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 684    }
 685 }
 686
 687 static void
 688 update_specular(struct gl_context * ctx)
 689 {
 690    /* A hack to trigger the rebuild of the fragment program.
 691     */
 692    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 693 }
 694
 695 static void
 696 i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 697 {
 698    DBG("%s\n", __FUNCTION__);
 699
 700    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 701       update_specular(ctx);
 702    }
 703 }
 704
 705 static void
 706 i915ShadeModel(struct gl_context * ctx, GLenum mode)
 707 {
 708    struct i915_context *i915 = I915_CONTEXT(ctx);
 709    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 710
 711    if (mode == GL_SMOOTH) {
 712       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 713                                              S4_FLATSHADE_COLOR |
 714                                              S4_FLATSHADE_SPECULAR);
 715    }
 716    else {
 717       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 718                                             S4_FLATSHADE_COLOR |
 719                                             S4_FLATSHADE_SPECULAR);
 720    }
 721 }
 722
 723 /* =============================================================
 724  * Fog
 725  *
 726  * This empty function remains because _mesa_init_driver_state calls
 727  * dd_function_table::Fogfv unconditionally.  We have to have some function
 728  * there so that it doesn't try to call a NULL pointer.
 729  */
 730 static void
 731 i915Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
 732 {
 733    (void) ctx;
 734    (void) pname;
 735    (void) param;
 736 }
 737
 738 /* =============================================================
 739  */
 740
 741 static void
 742 i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
 743 {
 744    struct i915_context *i915 = I915_CONTEXT(ctx);
 745    GLuint dw;
 746
 747    switch (cap) {
 748    case GL_TEXTURE_2D:
 749       break;
 750
 751    case GL_LIGHTING:
 752    case GL_COLOR_SUM:
 753       update_specular(ctx);
 754       break;
 755
 756    case GL_ALPHA_TEST:
 757       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 758       if (state)
 759          dw |= S6_ALPHA_TEST_ENABLE;
 760       else
 761          dw &= ~S6_ALPHA_TEST_ENABLE;
 762       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 763          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 764          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 765       }
 766       break;
 767
 768    case GL_BLEND:
 769       i915EvalLogicOpBlendState(ctx);
 770       break;
 771
 772    case GL_COLOR_LOGIC_OP:
 773       i915EvalLogicOpBlendState(ctx);
 774
 775       /* Logicop doesn't seem to work at 16bpp:
 776        */
 777       if (ctx->Visual.rgbBits == 16)
 778          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 779       break;
 780
 781    case GL_FRAGMENT_PROGRAM_ARB:
 782       break;
 783
 784    case GL_DITHER:
 785       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 786       if (state)
 787          dw |= S5_COLOR_DITHER_ENABLE;
 788       else
 789          dw &= ~S5_COLOR_DITHER_ENABLE;
 790       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 791          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 792          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 793       }
 794       break;
 795
 796    case GL_DEPTH_TEST:
 797       dw = i915->state.Ctx[I915_CTXREG_LIS6];
 798
 799       if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
 800          state = false;
 801
 802       if (state)
 803          dw |= S6_DEPTH_TEST_ENABLE;
 804       else
 805          dw &= ~S6_DEPTH_TEST_ENABLE;
 806       if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
 807          i915->state.Ctx[I915_CTXREG_LIS6] = dw;
 808          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 809       }
 810
 811       i915DepthMask(ctx, ctx->Depth.Mask);
 812       break;
 813
 814    case GL_SCISSOR_TEST:
 815       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 816       if (state)
 817          i915->state.Buffer[I915_DESTREG_SENABLE] =
 818             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 819       else
 820          i915->state.Buffer[I915_DESTREG_SENABLE] =
 821             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 822       break;
 823
 824    case GL_LINE_SMOOTH:
 825       dw = i915->state.Ctx[I915_CTXREG_LIS4];
 826       if (state)
 827          dw |= S4_LINE_ANTIALIAS_ENABLE;
 828       else
 829          dw &= ~S4_LINE_ANTIALIAS_ENABLE;
 830       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 831          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 832          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 833       }
 834       break;
 835
 836    case GL_CULL_FACE:
 837       i915CullFaceFrontFace(ctx, 0);
 838       break;
 839
 840    case GL_STENCIL_TEST:
 841       if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.stencilBits)
 842          state = false;
 843
 844       dw = i915->state.Ctx[I915_CTXREG_LIS5];
 845       if (state)
 846          dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 847       else
 848          dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
 849       if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
 850          i915->state.Ctx[I915_CTXREG_LIS5] = dw;
 851          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 852       }
 853       break;
 854
 855    case GL_POLYGON_STIPPLE:
 856       /* The stipple command worked on my 855GM box, but not my 845G.
 857        * I'll do more testing later to find out exactly which hardware
 858        * supports it.  Disabled for now.
 859        */
 860       if (i915->intel.hw_stipple &&
 861           i915->intel.reduced_primitive == GL_TRIANGLES) {
 862          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 863          if (state)
 864             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 865          else
 866             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 867       }
 868       break;
 869
 870    case GL_POLYGON_SMOOTH:
 871       break;
 872
 873    case GL_POINT_SPRITE:
 874       /* This state change is handled in i915_reduced_primitive_state because
 875        * the hardware bit should only be set when rendering points.
 876        */
 877          dw = i915->state.Ctx[I915_CTXREG_LIS4];
 878       if (state)
 879          dw |= S4_SPRITE_POINT_ENABLE;
 880       else
 881          dw &= ~S4_SPRITE_POINT_ENABLE;
 882       if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
 883          i915->state.Ctx[I915_CTXREG_LIS4] = dw;
 884          I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 885       }
 886       break;
 887
 888    case GL_POINT_SMOOTH:
 889       break;
 890
 891    default:
 892       ;
 893    }
 894 }
 895
 896
 897 static void
 898 i915_init_packets(struct i915_context *i915)
 899 {
 900    /* Zero all state */
 901    memset(&i915->state, 0, sizeof(i915->state));
 902
 903
 904    {
 905       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 906       I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
 907       /* Probably don't want to upload all this stuff every time one
 908        * piece changes.
 909        */
 910       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 911                                          I1_LOAD_S(2) |
 912                                          I1_LOAD_S(4) |
 913                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 914       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 915       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 916       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 917
 918       if (i915->intel.ctx.Visual.rgbBits == 16)
 919          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 920
 921
 922       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 923                                            (2 << S6_TRISTRIP_PV_SHIFT));
 924
 925       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 926                                              ENABLE_LOGIC_OP_FUNC |
 927                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 928                                              ENABLE_STENCIL_TEST_MASK |
 929                                              STENCIL_TEST_MASK(0xff) |
 930                                              ENABLE_STENCIL_WRITE_MASK |
 931                                              STENCIL_WRITE_MASK(0xff));
 932
 933       i915->state.Blend[I915_BLENDREG_IAB] =
 934          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 935           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 936
 937       i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
 938          _3DSTATE_CONST_BLEND_COLOR_CMD;
 939       i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
 940
 941       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
 942          _3DSTATE_BACKFACE_STENCIL_MASKS |
 943          BFM_ENABLE_STENCIL_TEST_MASK |
 944          BFM_ENABLE_STENCIL_WRITE_MASK |
 945          (0xff << BFM_STENCIL_WRITE_MASK_SHIFT) |
 946          (0xff << BFM_STENCIL_TEST_MASK_SHIFT);
 947       i915->state.Ctx[I915_CTXREG_BF_STENCIL_OPS] =
 948          _3DSTATE_BACKFACE_STENCIL_OPS |
 949          BFO_ENABLE_STENCIL_REF |
 950          BFO_ENABLE_STENCIL_FUNCS |
 951          BFO_ENABLE_STENCIL_TWO_SIDE;
 952    }
 953
 954    {
 955       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 956       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 957    }
 958
 959    {
 960       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 961
 962       /* scissor */
 963       i915->state.Buffer[I915_DESTREG_SENABLE] =
 964          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 965       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 966       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 967       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 968    }
 969
 970    i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD |
 971       ENABLE_POINT_RASTER_RULE |
 972       OGL_POINT_RASTER_RULE |
 973       ENABLE_LINE_STRIP_PROVOKE_VRTX |
 974       ENABLE_TRI_FAN_PROVOKE_VRTX |
 975       LINE_STRIP_PROVOKE_VRTX(1) |
 976       TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D;
 977
 978 #if 0
 979    {
 980       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 981       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 982       i915->state.Default[I915_DEFREG_C1] = 0;
 983       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 984       i915->state.Default[I915_DEFREG_S1] = 0;
 985       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
 986       i915->state.Default[I915_DEFREG_Z1] = 0;
 987    }
 988 #endif
 989
 990
 991    /* These will be emitted every at the head of every buffer, unless
 992     * we get hardware contexts working.
 993     */
 994    i915->state.active = (I915_UPLOAD_PROGRAM |
 995                          I915_UPLOAD_STIPPLE |
 996                          I915_UPLOAD_CTX |
 997                          I915_UPLOAD_BLEND |
 998                          I915_UPLOAD_BUFFERS |
 999                          I915_UPLOAD_INVARIENT |
1000                          I915_UPLOAD_RASTER_RULES);
1001 }
1002
1003 void
1004 i915_update_provoking_vertex(struct gl_context * ctx)
1005 {
1006    struct i915_context *i915 = I915_CONTEXT(ctx);
1007
1008    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
1009    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_TRISTRIP_PV_MASK);
1010
1011    I915_STATECHANGE(i915, I915_UPLOAD_RASTER_RULES);
1012    i915->state.RasterRules[I915_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1013                                                    TRI_FAN_PROVOKE_VRTX_MASK);
1014
1015    /* _NEW_LIGHT */
1016    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1017       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1018                                                      TRI_FAN_PROVOKE_VRTX(2));
1019       i915->state.Ctx[I915_CTXREG_LIS6] |= (2 << S6_TRISTRIP_PV_SHIFT);
1020    } else {
1021       i915->state.RasterRules[I915_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1022                                                      TRI_FAN_PROVOKE_VRTX(1));
1023       i915->state.Ctx[I915_CTXREG_LIS6] |= (0 << S6_TRISTRIP_PV_SHIFT);
1024     }
1025 }
1026
1027 void
1028 i915InitStateFunctions(struct dd_function_table *functions)
1029 {
1030    functions->AlphaFunc = i915AlphaFunc;
1031    functions->BlendColor = i915BlendColor;
1032    functions->BlendEquationSeparate = i915BlendEquationSeparate;
1033    functions->BlendFuncSeparate = i915BlendFuncSeparate;
1034    functions->ColorMask = i915ColorMask;
1035    functions->CullFace = i915CullFaceFrontFace;
1036    functions->DepthFunc = i915DepthFunc;
1037    functions->DepthMask = i915DepthMask;
1038    functions->Enable = i915Enable;
1039    functions->Fogfv = i915Fogfv;
1040    functions->FrontFace = i915CullFaceFrontFace;
1041    functions->LightModelfv = i915LightModelfv;
1042    functions->LineWidth = i915LineWidth;
1043    functions->LogicOpcode = i915LogicOp;
1044    functions->PointSize = i915PointSize;
1045    functions->PointParameterfv = i915PointParameterfv;
1046    functions->PolygonStipple = i915PolygonStipple;
1047    functions->Scissor = i915Scissor;
1048    functions->ShadeModel = i915ShadeModel;
1049    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1050    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1051    functions->StencilOpSeparate = i915StencilOpSeparate;
1052    functions->DepthRange = i915DepthRange;
1053    functions->Viewport = i915Viewport;
1054 }
1055
1056
1057 void
1058 i915InitState(struct i915_context *i915)
1059 {
1060    struct gl_context *ctx = &i915->intel.ctx;
1061
1062    i915_init_packets(i915);
1063
1064    _mesa_init_driver_state(ctx);
1065 }