ARB prog parser: Delete the old parser
[profile/ivi/mesa.git] / src / mesa / drivers / dri / i915 / i915_context.h
1  /**************************************************************************
2  * 
3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
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15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
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27
28 #ifndef I915CONTEXT_INC
29 #define I915CONTEXT_INC
30
31 #include "intel_context.h"
32 #include "i915_reg.h"
33
34 #define I915_FALLBACK_TEXTURE            0x1000
35 #define I915_FALLBACK_COLORMASK          0x2000
36 #define I915_FALLBACK_STENCIL            0x4000
37 #define I915_FALLBACK_STIPPLE            0x8000
38 #define I915_FALLBACK_PROGRAM            0x10000
39 #define I915_FALLBACK_LOGICOP            0x20000
40 #define I915_FALLBACK_POLYGON_SMOOTH     0x40000
41 #define I915_FALLBACK_POINT_SMOOTH       0x80000
42
43 #define I915_UPLOAD_CTX              0x1
44 #define I915_UPLOAD_BUFFERS          0x2
45 #define I915_UPLOAD_STIPPLE          0x4
46 #define I915_UPLOAD_PROGRAM          0x8
47 #define I915_UPLOAD_CONSTANTS        0x10
48 #define I915_UPLOAD_FOG              0x20
49 #define I915_UPLOAD_INVARIENT        0x40
50 #define I915_UPLOAD_DEFAULTS         0x80
51 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
52 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
53 #define I915_UPLOAD_TEX_0_SHIFT      16
54
55
56 /* State structure offsets - these will probably disappear.
57  */
58 #define I915_DESTREG_CBUFADDR0 0
59 #define I915_DESTREG_CBUFADDR1 1
60 #define I915_DESTREG_DBUFADDR0 3
61 #define I915_DESTREG_DBUFADDR1 4
62 #define I915_DESTREG_DV0 6
63 #define I915_DESTREG_DV1 7
64 #define I915_DESTREG_SENABLE 8
65 #define I915_DESTREG_SR0 9
66 #define I915_DESTREG_SR1 10
67 #define I915_DESTREG_SR2 11
68 #define I915_DESTREG_DRAWRECT0 12
69 #define I915_DESTREG_DRAWRECT1 13
70 #define I915_DESTREG_DRAWRECT2 14
71 #define I915_DESTREG_DRAWRECT3 15
72 #define I915_DESTREG_DRAWRECT4 16
73 #define I915_DESTREG_DRAWRECT5 17
74 #define I915_DEST_SETUP_SIZE 18
75
76 #define I915_CTXREG_STATE4              0
77 #define I915_CTXREG_LI                  1
78 #define I915_CTXREG_LIS2                        2
79 #define I915_CTXREG_LIS4                        3
80 #define I915_CTXREG_LIS5                        4
81 #define I915_CTXREG_LIS6                        5
82 #define I915_CTXREG_IAB                 6
83 #define I915_CTXREG_BLENDCOLOR0         7
84 #define I915_CTXREG_BLENDCOLOR1         8
85 #define I915_CTX_SETUP_SIZE             9
86
87 #define I915_FOGREG_COLOR               0
88 #define I915_FOGREG_MODE0               1
89 #define I915_FOGREG_MODE1               2
90 #define I915_FOGREG_MODE2               3
91 #define I915_FOGREG_MODE3               4
92 #define I915_FOG_SETUP_SIZE             5
93
94 #define I915_STPREG_ST0        0
95 #define I915_STPREG_ST1        1
96 #define I915_STP_SETUP_SIZE    2
97
98 #define I915_TEXREG_MS3        1
99 #define I915_TEXREG_MS4        2
100 #define I915_TEXREG_SS2        3
101 #define I915_TEXREG_SS3        4
102 #define I915_TEXREG_SS4        5
103 #define I915_TEX_SETUP_SIZE    6
104
105 #define I915_DEFREG_C0    0
106 #define I915_DEFREG_C1    1
107 #define I915_DEFREG_S0    2
108 #define I915_DEFREG_S1    3
109 #define I915_DEFREG_Z0    4
110 #define I915_DEFREG_Z1    5
111 #define I915_DEF_SETUP_SIZE    6
112
113
114 #define I915_MAX_CONSTANT      32
115 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
116
117
118 #define I915_PROGRAM_SIZE      192
119
120 #define I915_MAX_INSN          (I915_MAX_TEX_INSN+I915_MAX_ALU_INSN)
121
122 /* Hardware version of a parsed fragment program.  "Derived" from the
123  * mesa fragment_program struct.
124  */
125 struct i915_fragment_program
126 {
127    struct gl_fragment_program FragProg;
128
129    GLboolean translated;
130    GLboolean params_uptodate;
131    GLboolean on_hardware;
132    GLboolean error;             /* If program is malformed for any reason. */
133
134    /** Record of which phases R registers were last written in. */
135    GLuint register_phases[16];
136    GLuint indirections;
137    GLuint nr_tex_indirect;
138    GLuint nr_tex_insn;
139    GLuint nr_alu_insn;
140    GLuint nr_decl_insn;
141
142
143
144
145    /* TODO: split between the stored representation of a program and
146     * the state used to build that representation.
147     */
148    GLcontext *ctx;
149
150    GLuint declarations[I915_PROGRAM_SIZE];
151    GLuint program[I915_PROGRAM_SIZE];
152
153    GLfloat constant[I915_MAX_CONSTANT][4];
154    GLuint constant_flags[I915_MAX_CONSTANT];
155    GLuint nr_constants;
156
157    GLuint *csr;                 /* Cursor, points into program.
158                                  */
159
160    GLuint *decl;                /* Cursor, points into declarations.
161                                  */
162
163    GLuint decl_s;               /* flags for which s regs need to be decl'd */
164    GLuint decl_t;               /* flags for which t regs need to be decl'd */
165
166    GLuint temp_flag;            /* Tracks temporary regs which are in
167                                  * use.
168                                  */
169
170    GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
171                                  * use.
172                                  */
173
174
175    /* Track which R registers are "live" for each instruction.
176     * A register is live between the time it's written to and the last time
177     * it's read. */
178    GLuint usedRegs[I915_MAX_INSN];
179
180    /* Helpers for i915_fragprog.c:
181     */
182    GLuint wpos_tex;
183    GLboolean depth_written;
184
185    struct
186    {
187       GLuint reg;               /* Hardware constant idx */
188       const GLfloat *values;    /* Pointer to tracked values */
189    } param[I915_MAX_CONSTANT];
190    GLuint nr_params;
191 };
192
193
194
195
196
197
198
199 #define I915_TEX_UNITS 8
200
201
202 struct i915_hw_state
203 {
204    GLuint Ctx[I915_CTX_SETUP_SIZE];
205    GLuint Buffer[I915_DEST_SETUP_SIZE];
206    GLuint Stipple[I915_STP_SETUP_SIZE];
207    GLuint Fog[I915_FOG_SETUP_SIZE];
208    GLuint Defaults[I915_DEF_SETUP_SIZE];
209    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
210    GLuint Constant[I915_CONSTANT_SIZE];
211    GLuint ConstantSize;
212    GLuint Program[I915_PROGRAM_SIZE];
213    GLuint ProgramSize;
214
215    /* Region pointers for relocation: 
216     */
217    struct intel_region *draw_region;
218    struct intel_region *depth_region;
219 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
220
221    /* Regions aren't actually that appropriate here as the memory may
222     * be from a PBO or FBO.  Will have to do this for draw and depth for
223     * FBO's...
224     */
225    dri_bo *tex_buffer[I915_TEX_UNITS];
226    GLuint tex_offset[I915_TEX_UNITS];
227
228
229    GLuint active;               /* I915_UPLOAD_* */
230    GLuint emitted;              /* I915_UPLOAD_* */
231 };
232
233 #define I915_FOG_PIXEL  2
234 #define I915_FOG_VERTEX 1
235 #define I915_FOG_NONE   0
236
237 struct i915_context
238 {
239    struct intel_context intel;
240
241    GLuint last_ReallyEnabled;
242    GLuint vertex_fog;
243    GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
244
245
246    struct i915_fragment_program *current_program;
247
248    struct i915_hw_state meta, initial, state, *current;
249 };
250
251
252 #define I915_STATECHANGE(i915, flag)                                    \
253 do {                                                                    \
254    INTEL_FIREVERTICES( &(i915)->intel );                                        \
255    (i915)->state.emitted &= ~(flag);                                    \
256 } while (0)
257
258 #define I915_ACTIVESTATE(i915, flag, mode)                      \
259 do {                                                            \
260    INTEL_FIREVERTICES( &(i915)->intel );                                \
261    if (mode)                                                    \
262       (i915)->state.active |= (flag);                           \
263    else                                                         \
264       (i915)->state.active &= ~(flag);                          \
265 } while (0)
266
267
268 /*======================================================================
269  * i915_vtbl.c
270  */
271 extern void i915InitVtbl(struct i915_context *i915);
272
273 extern void
274 i915_state_draw_region(struct intel_context *intel,
275                        struct i915_hw_state *state,
276                        struct intel_region *color_region,
277                        struct intel_region *depth_region);
278
279
280
281 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
282 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
283 #define EMIT_ATTR( ATTR, STYLE, S4, SZ )                                \
284 do {                                                                    \
285    intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);       \
286    intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);      \
287    s4 |= S4;                                                            \
288    intel->vertex_attr_count++;                                          \
289    offset += (SZ);                                                      \
290 } while (0)
291
292 #define EMIT_PAD( N )                                                   \
293 do {                                                                    \
294    intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;            \
295    intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;     \
296    intel->vertex_attrs[intel->vertex_attr_count].offset = (N);          \
297    intel->vertex_attr_count++;                                          \
298    offset += (N);                                                       \
299 } while (0)
300
301
302
303 /*======================================================================
304  * i915_context.c
305  */
306 extern GLboolean i915CreateContext(const __GLcontextModes * mesaVis,
307                                    __DRIcontextPrivate * driContextPriv,
308                                    void *sharedContextPrivate);
309
310
311 /*======================================================================
312  * i915_debug.c
313  */
314 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
315 extern void i915_print_ureg(const char *msg, GLuint ureg);
316
317
318 /*======================================================================
319  * i915_state.c
320  */
321 extern void i915InitStateFunctions(struct dd_function_table *functions);
322 extern void i915InitState(struct i915_context *i915);
323 extern void i915_update_fog(GLcontext * ctx);
324
325
326 /*======================================================================
327  * i915_tex.c
328  */
329 extern void i915UpdateTextureState(struct intel_context *intel);
330 extern void i915InitTextureFuncs(struct dd_function_table *functions);
331
332 /*======================================================================
333  * i915_metaops.c
334  */
335 void i915InitMetaFuncs(struct i915_context *i915);
336
337
338 /*======================================================================
339  * i915_fragprog.c
340  */
341 extern void i915ValidateFragmentProgram(struct i915_context *i915);
342 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
343
344 /*======================================================================
345  * Inline conversion functions.  These are better-typed than the
346  * macros used previously:
347  */
348 static INLINE struct i915_context *
349 i915_context(GLcontext * ctx)
350 {
351    return (struct i915_context *) ctx;
352 }
353
354
355
356 #define I915_CONTEXT(ctx)       i915_context(ctx)
357
358
359
360 #endif